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Merge branch 'master' of git://git.denx.de/u-boot-arm
[platform/kernel/u-boot.git]
/
arch
/
arm
/
cpu
/
tegra-common
/
ap.c
diff --git
a/arch/arm/cpu/tegra-common/ap.c
b/arch/arm/cpu/tegra-common/ap.c
index
6fb11cb
..
91d70da
100644
(file)
--- a/
arch/arm/cpu/tegra-common/ap.c
+++ b/
arch/arm/cpu/tegra-common/ap.c
@@
-1,5
+1,5
@@
/*
/*
-* (C) Copyright 2010-201
1
+* (C) Copyright 2010-201
4
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0+
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0+
@@
-27,7
+27,7
@@
int tegra_get_chip(void)
/*
* This is undocumented, Chip ID is bits 15:8 of the register
* APB_MISC + 0x804, and has value 0x20 for Tegra20, 0x30 for
/*
* This is undocumented, Chip ID is bits 15:8 of the register
* APB_MISC + 0x804, and has value 0x20 for Tegra20, 0x30 for
- * Tegra30,
and 0x35 for T11
4.
+ * Tegra30,
0x35 for T114, and 0x40 for Tegra12
4.
*/
rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT;
debug("%s: CHIPID is 0x%02X\n", __func__, rev);
*/
rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT;
debug("%s: CHIPID is 0x%02X\n", __func__, rev);
@@
-71,6
+71,8
@@
int tegra_get_chip_sku(void)
switch (sku_id) {
case SKU_ID_T33:
case SKU_ID_T30:
switch (sku_id) {
case SKU_ID_T33:
case SKU_ID_T30:
+ case SKU_ID_TM30MQS_P_A3:
+ default:
return TEGRA_SOC_T30;
}
break;
return TEGRA_SOC_T30;
}
break;
@@
-78,10
+80,19
@@
int tegra_get_chip_sku(void)
switch (sku_id) {
case SKU_ID_T114_ENG:
case SKU_ID_T114_1:
switch (sku_id) {
case SKU_ID_T114_ENG:
case SKU_ID_T114_1:
+ default:
return TEGRA_SOC_T114;
}
break;
return TEGRA_SOC_T114;
}
break;
+ case CHIPID_TEGRA124:
+ switch (sku_id) {
+ case SKU_ID_T124_ENG:
+ default:
+ return TEGRA_SOC_T124;
+ }
+ break;
}
}
+
/* unknown chip/sku id */
printf("%s: ERROR: UNKNOWN CHIP/SKU ID COMBO (0x%02X/0x%02X)\n",
__func__, chip_id, sku_id);
/* unknown chip/sku id */
printf("%s: ERROR: UNKNOWN CHIP/SKU ID COMBO (0x%02X/0x%02X)\n",
__func__, chip_id, sku_id);
@@
-116,8
+127,8
@@
static u32 get_odmdata(void)
* ODMDATA is stored in the BCT in IRAM by the BootROM.
* The BCT start and size are stored in the BIT in IRAM.
* Read the data @ bct_start + (bct_size - 12). This works
* ODMDATA is stored in the BCT in IRAM by the BootROM.
* The BCT start and size are stored in the BIT in IRAM.
* Read the data @ bct_start + (bct_size - 12). This works
- * on
T20 and T30 BCTs, which are locked down. If this changes
- *
in new chips (T114, etc.)
, we can revisit this algorithm.
+ * on
BCTs for currently supported SoCs, which are locked down.
+ *
If this changes in new chips
, we can revisit this algorithm.
*/
u32 bct_start, odmdata;
*/
u32 bct_start, odmdata;