+#ifdef CONFIG_FSPI_AHB_EN_4BYTE
+int fspi_ahb_init(void)
+{
+ /* Enable 4bytes address support and fast read */
+ u32 *fspi_lut, lut_key, *fspi_key;
+
+ fspi_key = (void *)SYS_NXP_FSPI_ADDR + SYS_NXP_FSPI_LUTKEY_BASE_ADDR;
+ fspi_lut = (void *)SYS_NXP_FSPI_ADDR + SYS_NXP_FSPI_LUT_BASE_ADDR;
+
+ lut_key = in_be32(fspi_key);
+
+ if (lut_key == SYS_NXP_FSPI_LUTKEY) {
+ /* That means the register is BE */
+ out_be32(fspi_key, SYS_NXP_FSPI_LUTKEY);
+ /* Unlock the lut table */
+ out_be32(fspi_key + 1, SYS_NXP_FSPI_LUTCR_UNLOCK);
+ /* Create READ LUT */
+ out_be32(fspi_lut, 0x0820040c);
+ out_be32(fspi_lut + 1, 0x24003008);
+ out_be32(fspi_lut + 2, 0x00000000);
+ /* Lock the lut table */
+ out_be32(fspi_key, SYS_NXP_FSPI_LUTKEY);
+ out_be32(fspi_key + 1, SYS_NXP_FSPI_LUTCR_LOCK);
+ } else {
+ /* That means the register is LE */
+ out_le32(fspi_key, SYS_NXP_FSPI_LUTKEY);
+ /* Unlock the lut table */
+ out_le32(fspi_key + 1, SYS_NXP_FSPI_LUTCR_UNLOCK);
+ /* Create READ LUT */
+ out_le32(fspi_lut, 0x0820040c);
+ out_le32(fspi_lut + 1, 0x24003008);
+ out_le32(fspi_lut + 2, 0x00000000);
+ /* Lock the lut table */
+ out_le32(fspi_key, SYS_NXP_FSPI_LUTKEY);
+ out_le32(fspi_key + 1, SYS_NXP_FSPI_LUTCR_LOCK);
+ }
+
+ return 0;
+}
+#endif
+