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Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians...
[platform/kernel/u-boot.git]
/
arch
/
arm
/
cpu
/
armv8
/
fsl-layerscape
/
cpu.c
diff --git
a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index
3fcedd5
..
1a5d26b
100644
(file)
--- a/
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@
-1,6
+1,6
@@
// SPDX-License-Identifier: GPL-2.0+
/*
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2017-20
19
NXP
+ * Copyright 2017-20
20
NXP
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*/
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*/
@@
-79,6
+79,9
@@
static struct cpu_type cpu_type_list[] = {
CPU_TYPE_ENTRY(LX2160A, LX2160A, 16),
CPU_TYPE_ENTRY(LX2120A, LX2120A, 12),
CPU_TYPE_ENTRY(LX2080A, LX2080A, 8),
CPU_TYPE_ENTRY(LX2160A, LX2160A, 16),
CPU_TYPE_ENTRY(LX2120A, LX2120A, 12),
CPU_TYPE_ENTRY(LX2080A, LX2080A, 8),
+ CPU_TYPE_ENTRY(LX2162A, LX2162A, 16),
+ CPU_TYPE_ENTRY(LX2122A, LX2122A, 12),
+ CPU_TYPE_ENTRY(LX2082A, LX2082A, 8),
};
#define EARLY_PGTABLE_SIZE 0x5000
};
#define EARLY_PGTABLE_SIZE 0x5000
@@
-403,7
+406,7
@@
void cpu_name(char *name)
for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++)
if ((cpu_type_list[i].soc_ver & SVR_WO_E) == ver) {
strcpy(name, cpu_type_list[i].name);
for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++)
if ((cpu_type_list[i].soc_ver & SVR_WO_E) == ver) {
strcpy(name, cpu_type_list[i].name);
-#if
def CONFIG_ARCH_LX2160A
+#if
defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
if (IS_C_PROCESSOR(svr))
strcat(name, "C");
#endif
if (IS_C_PROCESSOR(svr))
strcat(name, "C");
#endif
@@
-1040,13
+1043,13
@@
int print_cpuinfo(void)
#endif
#ifdef CONFIG_FSL_ESDHC
#endif
#ifdef CONFIG_FSL_ESDHC
-int cpu_mmc_init(
bd_t
*bis)
+int cpu_mmc_init(
struct bd_info
*bis)
{
return fsl_esdhc_mmc_init(bis);
}
#endif
{
return fsl_esdhc_mmc_init(bis);
}
#endif
-int cpu_eth_init(
bd_t
*bis)
+int cpu_eth_init(
struct bd_info
*bis)
{
int error = 0;
{
int error = 0;
@@
-1147,15
+1150,15
@@
int arch_early_init_r(void)
* EC*_PMUX(rgmii) bits in RCW.
* e.g. dpmac 17 and 18 in LX2160A can be configured as SGMII from
* serdes bits and as RGMII via EC1_PMUX/EC2_PMUX bits
* EC*_PMUX(rgmii) bits in RCW.
* e.g. dpmac 17 and 18 in LX2160A can be configured as SGMII from
* serdes bits and as RGMII via EC1_PMUX/EC2_PMUX bits
- * Now if a dpmac is enabled
by serdes bits then it takes precedence
- *
over EC*_PMUX bits. i.e. in LX2160A if we select serdes protocol
- *
that configures dpmac17 as SGMII and set the EC1_PMUX as RGMII,
- *
then the dpmac is SGMII and not R
GMII.
+ * Now if a dpmac is enabled
as RGMII through ECx_PMUX then it takes
+ *
precedence over SerDes protocol. i.e. in LX2160A if we select serdes
+ *
protocol that configures dpmac17 as SGMII and set the EC1_PMUX as
+ *
RGMII, then the dpmac is RGMII and not S
GMII.
*
*
- * Therefore,
move the fsl_rgmii_init after fsl_serdes_init. in
- * f
sl_rgmii_init function of SOC, we will check if the dpmac is enabled
- *
or not? if it is (fsl_serdes_init has already enabled the dpmac),
- *
then don't enable it
.
+ * Therefore,
even thought fsl_rgmii_init is after fsl_serdes_init
+ * f
unction of SOC, the dpmac will be enabled as RGMII even if it was
+ *
also enabled before as SGMII. If ECx_PMUX is not configured for
+ *
RGMII, DPMAC will remain configured as SGMII from fsl_serdes_init()
.
*/
fsl_rgmii_init();
#endif
*/
fsl_rgmii_init();
#endif
@@
-1229,13
+1232,15
@@
__efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR;
void __efi_runtime reset_cpu(ulong addr)
{
void __efi_runtime reset_cpu(ulong addr)
{
- u32 val;
+#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
+ /* clear the RST_REQ_MSK and SW_RST_REQ */
+ out_le32(rstcr, 0x0);
-#ifdef CONFIG_ARCH_LX2160A
- val = in_le32(rstcr);
- val |= 0x01;
- out_le32(rstcr, val);
+ /* initiate the sw reset request */
+ out_le32(rstcr, 0x1);
#else
#else
+ u32 val;
+
/* Raise RESET_REQ_B */
val = scfg_in32(rstcr);
val |= 0x02;
/* Raise RESET_REQ_B */
val = scfg_in32(rstcr);
val |= 0x02;