vf610: add support for Phytec PCM052

[platform/kernel/u-boot.git] / README

diff --git a/README b/README
index 95f2d9d..c22b60b 100644 (file)
--- a/README
+++ b/README
@@ -840,18 +840,6 @@ The following options need to be configured:
                define this to a list of base addresses for each (supported)
                port. See e.g. include/configs/versatile.h
 
                define this to a list of base addresses for each (supported)
                port. See e.g. include/configs/versatile.h
 

-               CONFIG_PL011_SERIAL_RLCR
-
-               Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
-               have separate receive and transmit line control registers.  Set
-               this variable to initialize the extra register.
-
-               CONFIG_PL011_SERIAL_FLUSH_ON_INIT
-
-               On some platforms (e.g. U8500) U-Boot is loaded by a second stage
-               boot loader that has already initialized the UART.  Define this
-               variable to flush the UART at init time.
-

                CONFIG_SERIAL_HW_FLOW_CONTROL
 
                Define this variable to enable hw flow control in serial driver.
                CONFIG_SERIAL_HW_FLOW_CONTROL
 
                Define this variable to enable hw flow control in serial driver.


@@ -1382,9 +1370,6 @@ The following options need to be configured:
                Management command for E1000 devices.  When used on devices
                with SPI support you can reprogram the EEPROM from U-Boot.
 
                Management command for E1000 devices.  When used on devices
                with SPI support you can reprogram the EEPROM from U-Boot.
 

-               CONFIG_E1000_FALLBACK_MAC
-               default MAC for empty EEPROM after production.
-

                CONFIG_EEPRO100
                Support for Intel 82557/82559/82559ER chips.
                Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
                CONFIG_EEPRO100
                Support for Intel 82557/82559/82559ER chips.
                Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM


@@ -1497,12 +1482,6 @@ The following options need to be configured:
                Support for i2c bus TPM devices. Only one device
                per system is supported at this time.
 
                Support for i2c bus TPM devices. Only one device
                per system is supported at this time.
 

-                       CONFIG_TPM_TIS_I2C_BUS_NUMBER
-                       Define the the i2c bus number for the TPM device
-
-                       CONFIG_TPM_TIS_I2C_SLAVE_ADDRESS
-                       Define the TPM's address on the i2c bus
-

                        CONFIG_TPM_TIS_I2C_BURST_LIMITATION
                        Define the burst count bytes upper limit
 
                        CONFIG_TPM_TIS_I2C_BURST_LIMITATION
                        Define the burst count bytes upper limit
 


@@ -2380,16 +2359,20 @@ CBFS (Coreboot Filesystem) support
 
                - drivers/i2c/i2c_mxc.c
                  - activate this driver with CONFIG_SYS_I2C_MXC
 
                - drivers/i2c/i2c_mxc.c
                  - activate this driver with CONFIG_SYS_I2C_MXC

+                 - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
+                 - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
+                 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
+                 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4

                  - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
                  - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
                  - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
                  - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
                  - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
                  - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
                  - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
                  - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
                  - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
                  - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
                  - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
                  - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE

+                 - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
+                 - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE

                If those defines are not set, default value is 100000
                for speed, and 0 for slave.
                If those defines are not set, default value is 100000
                for speed, and 0 for slave.

-                 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
-                 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4

 
                - drivers/i2c/rcar_i2c.c:
                  - activate this driver with CONFIG_SYS_I2C_RCAR
 
                - drivers/i2c/rcar_i2c.c:
                  - activate this driver with CONFIG_SYS_I2C_RCAR