- - drivers/i2c/fsl_i2c.c:
- - activate i2c driver with CONFIG_SYS_I2C_FSL
- define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
- offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
- CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
- bus.
- - If your board supports a second fsl i2c bus, define
- CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
- CONFIG_SYS_FSL_I2C2_SPEED for the speed and
- CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
- second bus.
-
- - drivers/i2c/tegra_i2c.c:
- - activate this driver with CONFIG_SYS_I2C_TEGRA
- - This driver adds 4 i2c buses with a fix speed from
- 100000 and the slave addr 0!
-
- - drivers/i2c/ppc4xx_i2c.c
- - activate this driver with CONFIG_SYS_I2C_PPC4XX
- - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
- - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
-
- - drivers/i2c/rcar_i2c.c:
- - activate this driver with CONFIG_SYS_I2C_RCAR
- - This driver adds 4 i2c buses
-
- - drivers/i2c/sh_i2c.c:
- - activate this driver with CONFIG_SYS_I2C_SH
- - This driver adds from 2 to 5 i2c buses
-
- - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
- - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
- - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
- - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
- - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
- - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
- - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
- - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
- - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
- - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
- - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
-
- - drivers/i2c/s3c24x0_i2c.c:
- - activate this driver with CONFIG_SYS_I2C_S3C24X0
- - This driver adds i2c buses (11 for Exynos5250, Exynos5420
- 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
- with a fix speed from 100000 and the slave addr 0!
-
- additional defines:
-