2011-04-21 DJ Delorie * rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs. * rx-decode.c: Regenerate. 2011-04-20 H.J. Lu * i386-init.h: Regenerated. 2011-04-19 Quentin Neill * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits from bdver1 flags. 2011-04-13 Nick Clifton * v850-dis.c (disassemble): Always print a closing square brace if an opening square brace was printed. 2011-04-12 Nick Clifton PR binutils/12534 * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn patterns. (print_insn_thumb32): Handle %L. 2011-04-11 Julian Brown * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX. (print_insn_thumb32): Add APSR bitmask support. 2011-04-07 Paul Carroll * arm-dis.c (print_insn): init vars moved into private_data structure. 2011-03-24 Mike Frysinger * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic. 2011-03-22 Eric B. Weddington * avr-dis.c (avr_operand): Add opcode_str parameter. Check for post-increment to support LPM Z+ instruction. Add support for 'E' constraint for DES instruction. (print_insn_avr): Adjust calls to avr_operand. Rename variable. 2011-03-14 Richard Sandiford * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code. 2011-03-14 Richard Sandiford * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC. Use branch types instead. (print_insn): Likewise. 2011-02-28 Maciej W. Rozycki * mips-opc.c (mips_builtin_opcodes): Correct register use annotation of "alnv.ps". 2011-02-28 Maciej W. Rozycki * mips-opc.c (mips_builtin_opcodes): Add "pref" macro. 2011-02-22 Mike Frysinger * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check. 2011-02-22 Mike Frysinger * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS. 2011-02-19 Mike Frysinger * bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1, av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts, exception, end_of_registers, msize, memory, bfd_mach. (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG, LB0REG, LC1REG, LT1REG, LB1REG): Delete (AXREG, AWREG, LCREG, LTREG, LBREG): Define. (get_allreg): Change to new defines. Fallback to abort(). 2011-02-14 Mike Frysinger * bfin-dis.c: Add whitespace/parenthesis where needed. 2011-02-14 Mike Frysinger * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater than 7. 2011-02-13 Ralf Wildenhues * configure: Regenerate. 2011-02-13 Mike Frysinger * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg. 2011-02-13 Mike Frysinger * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output dregs only when P is set, and dregs_lo otherwise. 2011-02-13 Mike Frysinger * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code. 2011-02-12 Mike Frysinger * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT. 2011-02-12 Mike Frysinger * bfin-dis.c (machine_registers): Delete REG_GP. (reg_names): Delete "GP". (decode_allregs): Change REG_GP to REG_LASTREG. 2011-02-12 Mike Frysinger * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, M_IH, M_IU): Delete. 2011-02-11 Mike Frysinger * bfin-dis.c (reg_names): Add const. (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte, decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs, decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits, decode_counters, decode_allregs): Likewise. 2011-02-09 Michael Snyder * i386-dis.c (OP_J): Parenthesize expression to prevent truncated addresses. (print_insn): Fix indentation off-by-one. 2011-02-01 Nick Clifton * po/da.po: Updated Danish translation. 2011-01-21 Dave Murphy * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS. 2011-01-18 H.J. Lu * i386-dis.c (sIbT): New. (b_T_mode): Likewise. (dis386): Replace sIb with sIbT on "pushT". (x86_64_table): Replace sIb with Ib on "aam" and "aad". (OP_sI): Handle b_T_mode. Properly sign-extend byte. 2011-01-18 Jan Kratochvil * i386-init.h: Regenerated. * i386-tbl.h: Regenerated 2011-01-17 Quentin Neill * i386-dis.c (REG_XOP_TBM_01): New. (REG_XOP_TBM_02): New. (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables. (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02 entries, and add bextr instruction. * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM. (cpu_flags): Add CpuTBM. * i386-opc.h (CpuTBM) New. (i386_cpu_flags): Add bit cputbm. * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk, blcs, blsfill, blsic, t1mskc, and tzmsk. 2011-01-12 DJ Delorie * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg. 2011-01-11 Mingjie Xing * mips-dis.c (print_insn_args): Adjust the value to print the real offset for "+c" argument. 2011-01-10 Nick Clifton * po/da.po: Updated Danish translation. 2011-01-05 Nathan Sidwell * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear. 2011-01-04 H.J. Lu * i386-dis.c (REG_VEX_38F3): New. (PREFIX_0FBC): Likewise. (PREFIX_VEX_38F2): Likewise. (PREFIX_VEX_38F3_REG_1): Likewise. (PREFIX_VEX_38F3_REG_2): Likewise. (PREFIX_VEX_38F3_REG_3): Likewise. (PREFIX_VEX_38F7): Likewise. (VEX_LEN_38F2_P_0): Likewise. (VEX_LEN_38F3_R_1_P_0): Likewise. (VEX_LEN_38F3_R_2_P_0): Likewise. (VEX_LEN_38F3_R_3_P_0): Likewise. (VEX_LEN_38F7_P_0): Likewise. (dis386_twobyte): Use PREFIX_0FBC. (reg_table): Add REG_VEX_38F3. (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2, PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2, PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7. (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and PREFIX_VEX_38F7. (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0, VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and VEX_LEN_38F7_P_0. * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS. (cpu_flags): Add CpuBMI. * i386-opc.h (CpuBMI): New. (i386_cpu_flags): Add cpubmi. * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. 2011-01-04 H.J. Lu * i386-dis.c (VexGdq): New. (OP_VEX): Handle dq_mode. 2011-01-01 H.J. Lu * i386-gen.c (process_copyright): Update copyright to 2011. For older changes see ChangeLog-2010 Local Variables: mode: change-log left-margin: 8 fill-column: 74 version-control: never End: