SPARC Dependent Features
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Options
=======

The SPARC chip family includes several successive levels (or other variants) of chip, using the same core instruction set, but including a few additional instructions at each level.

By default, AS assumes the core instruction set (SPARC v6), but ``bumps'' the architecture level as needed: it switches to successively higher architectures as it encounters instructions that only exist in the higher levels.

-Av6 | -Av7 | -Av8 | -Av9 | -Asparclite
     Use one of the -A options to select one of the SPARC architectures explicitly.  If you select an architecture explicitly, AS reports a fatal error if it encounters an instruction or feature requiring a higher level.

-bump
     Permit the assembler to ``bump'' the architecture level as required, but warn whenever it is necessary to switch to another level.

Floating Point
==============

The Sparc uses IEEE floating-point numbers.

Sparc Machine Directives
========================

The Sparc version of AS supports the following additional machine directives:

.align
     This must be followed by the desired alignment in bytes.

.common
     This must be followed by a symbol name, a positive number, and "bss".  This behaves somewhat like .comm, but the syntax is different.

.half
     This is functionally identical to .short.

.proc
     This directive is ignored.  Any text following it on the same line is also ignored.

.reserve
     This must be followed by a symbol name, a positive number, and "bss".  This behaves somewhat like .lcomm, but the syntax is different.

.seg
     This must be followed by "text", "data", or "data1".  It behaves like .text, .data, or .data 1.

.skip
     This is functionally identical to the .space directive.

.word
     On the Sparc, the .word directive produces 32 bit values, instead of the 16 bit values it produces on many other machines.

.xword
     On the Sparc V9 processor, the .xword directive produces 64 bit values.