1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -instcombine -S | FileCheck %s
4 ; https://bugs.llvm.org/show_bug.cgi?id=38708
8 ; Should be transformed into:
11 ; ============================================================================ ;
12 ; Basic positive tests
13 ; ============================================================================ ;
15 define i1 @p0(i8 %val, i8 %bits) {
17 ; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
18 ; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[T0]], [[VAL:%.*]]
19 ; CHECK-NEXT: ret i1 [[R]]
22 %r = icmp ugt i8 %t0, %val
26 ; ============================================================================ ;
28 ; ============================================================================ ;
30 define <2 x i1> @p1_vec(<2 x i8> %val, <2 x i8> %bits) {
31 ; CHECK-LABEL: @p1_vec(
32 ; CHECK-NEXT: [[T0:%.*]] = shl <2 x i8> <i8 1, i8 1>, [[BITS:%.*]]
33 ; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[T0]], [[VAL:%.*]]
34 ; CHECK-NEXT: ret <2 x i1> [[R]]
36 %t0 = shl <2 x i8> <i8 1, i8 1>, %bits
37 %r = icmp ugt <2 x i8> %t0, %val
41 define <3 x i1> @p2_vec_undef(<3 x i8> %val, <3 x i8> %bits) {
42 ; CHECK-LABEL: @p2_vec_undef(
43 ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 undef, i8 1>, [[BITS:%.*]]
44 ; CHECK-NEXT: [[R:%.*]] = icmp ugt <3 x i8> [[T0]], [[VAL:%.*]]
45 ; CHECK-NEXT: ret <3 x i1> [[R]]
47 %t0 = shl <3 x i8> <i8 1, i8 undef, i8 1>, %bits
48 %r = icmp ugt <3 x i8> %t0, %val
52 ; ============================================================================ ;
53 ; Commutativity tests.
54 ; ============================================================================ ;
58 define i1 @c0(i8 %bits) {
60 ; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
61 ; CHECK-NEXT: [[VAL:%.*]] = call i8 @gen8()
62 ; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[VAL]], [[T0]]
63 ; CHECK-NEXT: ret i1 [[R]]
66 %val = call i8 @gen8()
67 %r = icmp ult i8 %val, %t0 ; swapped order and predicate
71 ; ============================================================================ ;
73 ; ============================================================================ ;
75 declare void @use8(i8)
77 define i1 @oneuse0(i8 %val, i8 %bits) {
78 ; CHECK-LABEL: @oneuse0(
79 ; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
80 ; CHECK-NEXT: call void @use8(i8 [[T0]])
81 ; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[T0]], [[VAL:%.*]]
82 ; CHECK-NEXT: ret i1 [[R]]
85 call void @use8(i8 %t0)
86 %r = icmp ugt i8 %t0, %val
90 ; ============================================================================ ;
92 ; ============================================================================ ;
94 define i1 @n0(i8 %val, i8 %bits) {
96 ; CHECK-NEXT: [[T0:%.*]] = shl i8 2, [[BITS:%.*]]
97 ; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[T0]], [[VAL:%.*]]
98 ; CHECK-NEXT: ret i1 [[R]]
100 %t0 = shl i8 2, %bits ; constant is not 1
101 %r = icmp ugt i8 %t0, %val
105 define <2 x i1> @n1_vec_nonsplat(<2 x i8> %val, <2 x i8> %bits) {
106 ; CHECK-LABEL: @n1_vec_nonsplat(
107 ; CHECK-NEXT: [[T0:%.*]] = shl <2 x i8> <i8 1, i8 2>, [[BITS:%.*]]
108 ; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[T0]], [[VAL:%.*]]
109 ; CHECK-NEXT: ret <2 x i1> [[R]]
111 %t0 = shl <2 x i8> <i8 1, i8 2>, %bits ; again, wrong constant
112 %r = icmp ugt <2 x i8> %t0, %val
116 define i1 @n2(i8 %val, i8 %bits) {
118 ; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
119 ; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[T0]], [[VAL:%.*]]
120 ; CHECK-NEXT: ret i1 [[R]]
122 %t0 = shl i8 1, %bits
123 %r = icmp uge i8 %t0, %val ; wrong predicate
127 define i1 @n3(i8 %bits) {
129 ; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
130 ; CHECK-NEXT: [[VAL:%.*]] = call i8 @gen8()
131 ; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[VAL]], [[T0]]
132 ; CHECK-NEXT: ret i1 [[R]]
134 %t0 = shl i8 1, %bits
135 %val = call i8 @gen8()
136 %r = icmp ule i8 %val, %t0 ; swapped order and [wrong] predicate