1 C x86_64/md5-compress.asm
4 Copyright (C) 2005, 2013 Niels Möller
6 This file is part of GNU Nettle.
8 GNU Nettle is free software: you can redistribute it and/or
9 modify it under the terms of either:
11 * the GNU Lesser General Public License as published by the Free
12 Software Foundation; either version 3 of the License, or (at your
13 option) any later version.
17 * the GNU General Public License as published by the Free
18 Software Foundation; either version 2 of the License, or (at your
19 option) any later version.
21 or both in parallel, as here.
23 GNU Nettle is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
26 General Public License for more details.
28 You should have received copies of the GNU General Public License and
29 the GNU Lesser General Public License along with this program. If
30 not, see http://www.gnu.org/licenses/.
35 define(<STATE>, <%rdi>)
36 define(<INPUT>, <%rsi>)
43 C F1(x,y,z) = (z ^ (x & (y ^ z)))
45 movl XREG($3), XREG(TMP)
46 xorl XREG($2), XREG(TMP)
47 andl XREG($1), XREG(TMP)
48 xorl XREG($3), XREG(TMP)>)
50 define(<F2>,<F1($3, $1, $2)>)
52 C F3(x,y,z) = x ^ y ^ z
54 movl XREG($1), XREG(TMP)
55 xorl XREG($2), XREG(TMP)
56 xorl XREG($3), XREG(TMP)>)
58 C F4(x,y,z) = y ^ (x | ~z)
60 movl XREG($3), XREG(TMP)
62 orl XREG($1), XREG(TMP)
63 xorl XREG($2), XREG(TMP)>)
65 C Index to 4*i, or to the empty string if zero
66 define(<REF>,<ifelse($1,0,,eval(4*$1))(INPUT)>)
68 C ROUND(f, w, x, y, z, k, data, s):
69 C w += f(x,y,z) + data + k
76 addl XREG(TMP), XREG($2)
78 addl XREG($3), XREG($2)>)
80 .file "md5-compress.asm"
82 C _nettle_md5_compress(uint32_t *state, uint8_t *input)
85 PROLOGUE(_nettle_md5_compress)
87 C save all registers that need to be saved
91 C load the state vector
92 movl (STATE), XREG(SA)
93 movl 4(STATE), XREG(SB)
94 movl 8(STATE), XREG(SC)
95 movl 12(STATE), XREG(SD)
97 ROUND(<F1>, SA, SB, SC, SD, REF( 0), 0xd76aa478, 7)
98 ROUND(<F1>, SD, SA, SB, SC, REF( 1), 0xe8c7b756, 12)
99 ROUND(<F1>, SC, SD, SA, SB, REF( 2), 0x242070db, 17)
100 ROUND(<F1>, SB, SC, SD, SA, REF( 3), 0xc1bdceee, 22)
101 ROUND(<F1>, SA, SB, SC, SD, REF( 4), 0xf57c0faf, 7)
102 ROUND(<F1>, SD, SA, SB, SC, REF( 5), 0x4787c62a, 12)
103 ROUND(<F1>, SC, SD, SA, SB, REF( 6), 0xa8304613, 17)
104 ROUND(<F1>, SB, SC, SD, SA, REF( 7), 0xfd469501, 22)
105 ROUND(<F1>, SA, SB, SC, SD, REF( 8), 0x698098d8, 7)
106 ROUND(<F1>, SD, SA, SB, SC, REF( 9), 0x8b44f7af, 12)
107 ROUND(<F1>, SC, SD, SA, SB, REF(10), 0xffff5bb1, 17)
108 ROUND(<F1>, SB, SC, SD, SA, REF(11), 0x895cd7be, 22)
109 ROUND(<F1>, SA, SB, SC, SD, REF(12), 0x6b901122, 7)
110 ROUND(<F1>, SD, SA, SB, SC, REF(13), 0xfd987193, 12)
111 ROUND(<F1>, SC, SD, SA, SB, REF(14), 0xa679438e, 17)
112 ROUND(<F1>, SB, SC, SD, SA, REF(15), 0x49b40821, 22)
114 ROUND(<F2>, SA, SB, SC, SD, REF( 1), 0xf61e2562, 5)
115 ROUND(<F2>, SD, SA, SB, SC, REF( 6), 0xc040b340, 9)
116 ROUND(<F2>, SC, SD, SA, SB, REF(11), 0x265e5a51, 14)
117 ROUND(<F2>, SB, SC, SD, SA, REF( 0), 0xe9b6c7aa, 20)
118 ROUND(<F2>, SA, SB, SC, SD, REF( 5), 0xd62f105d, 5)
119 ROUND(<F2>, SD, SA, SB, SC, REF(10), 0x02441453, 9)
120 ROUND(<F2>, SC, SD, SA, SB, REF(15), 0xd8a1e681, 14)
121 ROUND(<F2>, SB, SC, SD, SA, REF( 4), 0xe7d3fbc8, 20)
122 ROUND(<F2>, SA, SB, SC, SD, REF( 9), 0x21e1cde6, 5)
123 ROUND(<F2>, SD, SA, SB, SC, REF(14), 0xc33707d6, 9)
124 ROUND(<F2>, SC, SD, SA, SB, REF( 3), 0xf4d50d87, 14)
125 ROUND(<F2>, SB, SC, SD, SA, REF( 8), 0x455a14ed, 20)
126 ROUND(<F2>, SA, SB, SC, SD, REF(13), 0xa9e3e905, 5)
127 ROUND(<F2>, SD, SA, SB, SC, REF( 2), 0xfcefa3f8, 9)
128 ROUND(<F2>, SC, SD, SA, SB, REF( 7), 0x676f02d9, 14)
129 ROUND(<F2>, SB, SC, SD, SA, REF(12), 0x8d2a4c8a, 20)
131 ROUND(<F3>, SA, SB, SC, SD, REF( 5), 0xfffa3942, 4)
132 ROUND(<F3>, SD, SA, SB, SC, REF( 8), 0x8771f681, 11)
133 ROUND(<F3>, SC, SD, SA, SB, REF(11), 0x6d9d6122, 16)
134 ROUND(<F3>, SB, SC, SD, SA, REF(14), 0xfde5380c, 23)
135 ROUND(<F3>, SA, SB, SC, SD, REF( 1), 0xa4beea44, 4)
136 ROUND(<F3>, SD, SA, SB, SC, REF( 4), 0x4bdecfa9, 11)
137 ROUND(<F3>, SC, SD, SA, SB, REF( 7), 0xf6bb4b60, 16)
138 ROUND(<F3>, SB, SC, SD, SA, REF(10), 0xbebfbc70, 23)
139 ROUND(<F3>, SA, SB, SC, SD, REF(13), 0x289b7ec6, 4)
140 ROUND(<F3>, SD, SA, SB, SC, REF( 0), 0xeaa127fa, 11)
141 ROUND(<F3>, SC, SD, SA, SB, REF( 3), 0xd4ef3085, 16)
142 ROUND(<F3>, SB, SC, SD, SA, REF( 6), 0x04881d05, 23)
143 ROUND(<F3>, SA, SB, SC, SD, REF( 9), 0xd9d4d039, 4)
144 ROUND(<F3>, SD, SA, SB, SC, REF(12), 0xe6db99e5, 11)
145 ROUND(<F3>, SC, SD, SA, SB, REF(15), 0x1fa27cf8, 16)
146 ROUND(<F3>, SB, SC, SD, SA, REF( 2), 0xc4ac5665, 23)
148 ROUND(<F4>, SA, SB, SC, SD, REF( 0), 0xf4292244, 6)
149 ROUND(<F4>, SD, SA, SB, SC, REF( 7), 0x432aff97, 10)
150 ROUND(<F4>, SC, SD, SA, SB, REF(14), 0xab9423a7, 15)
151 ROUND(<F4>, SB, SC, SD, SA, REF( 5), 0xfc93a039, 21)
152 ROUND(<F4>, SA, SB, SC, SD, REF(12), 0x655b59c3, 6)
153 ROUND(<F4>, SD, SA, SB, SC, REF( 3), 0x8f0ccc92, 10)
154 ROUND(<F4>, SC, SD, SA, SB, REF(10), 0xffeff47d, 15)
155 ROUND(<F4>, SB, SC, SD, SA, REF( 1), 0x85845dd1, 21)
156 ROUND(<F4>, SA, SB, SC, SD, REF( 8), 0x6fa87e4f, 6)
157 ROUND(<F4>, SD, SA, SB, SC, REF(15), 0xfe2ce6e0, 10)
158 ROUND(<F4>, SC, SD, SA, SB, REF( 6), 0xa3014314, 15)
159 ROUND(<F4>, SB, SC, SD, SA, REF(13), 0x4e0811a1, 21)
160 ROUND(<F4>, SA, SB, SC, SD, REF( 4), 0xf7537e82, 6)
161 ROUND(<F4>, SD, SA, SB, SC, REF(11), 0xbd3af235, 10)
162 ROUND(<F4>, SC, SD, SA, SB, REF( 2), 0x2ad7d2bb, 15)
163 ROUND(<F4>, SB, SC, SD, SA, REF( 9), 0xeb86d391, 21)
165 C Update the state vector
166 addl XREG(SA), (STATE)
167 addl XREG(SB), 4(STATE)
168 addl XREG(SC), 8(STATE)
169 addl XREG(SD), 12(STATE)
176 EPILOGUE(_nettle_md5_compress)