2 * Copyright (C) 2001 MandrakeSoft S.A.
3 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
8 * http://www.linux-mandrake.com/
9 * http://www.mandrakesoft.com/
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License as published by the Free Software Foundation; either
14 * version 2 of the License, or (at your option) any later version.
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * Lesser General Public License for more details.
21 * You should have received a copy of the GNU Lesser General Public
22 * License along with this library; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * Yunhong Jiang <yunhong.jiang@intel.com>
26 * Yaozu (Eddie) Dong <eddie.dong@intel.com>
27 * Based on Xen 3.1 code.
30 #include <linux/kvm_host.h>
31 #include <linux/kvm.h>
33 #include <linux/highmem.h>
34 #include <linux/smp.h>
35 #include <linux/hrtimer.h>
37 #include <linux/slab.h>
38 #include <linux/export.h>
39 #include <asm/processor.h>
41 #include <asm/current.h>
42 #include <trace/events/kvm.h>
49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
51 #define ioapic_debug(fmt, arg...)
53 static int ioapic_deliver(struct kvm_ioapic *vioapic, int irq,
56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
60 unsigned long result = 0;
62 switch (ioapic->ioregsel) {
63 case IOAPIC_REG_VERSION:
64 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
65 | (IOAPIC_VERSION_ID & 0xff));
68 case IOAPIC_REG_APIC_ID:
69 case IOAPIC_REG_ARB_ID:
70 result = ((ioapic->id & 0xf) << 24);
75 u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
78 if (redir_index < IOAPIC_NUM_PINS)
80 ioapic->redirtbl[redir_index].bits;
82 redir_content = ~0ULL;
84 result = (ioapic->ioregsel & 0x1) ?
85 (redir_content >> 32) & 0xffffffff :
86 redir_content & 0xffffffff;
94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
96 ioapic->rtc_status.pending_eoi = 0;
97 bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS);
100 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
102 bool new_val, old_val;
103 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
104 union kvm_ioapic_redirect_entry *e;
106 e = &ioapic->redirtbl[RTC_GSI];
107 if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
108 e->fields.dest_mode))
111 new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
112 old_val = test_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
114 if (new_val == old_val)
118 __set_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
119 ioapic->rtc_status.pending_eoi++;
121 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
122 ioapic->rtc_status.pending_eoi--;
125 WARN_ON(ioapic->rtc_status.pending_eoi < 0);
128 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
130 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
132 spin_lock(&ioapic->lock);
133 __rtc_irq_eoi_tracking_restore_one(vcpu);
134 spin_unlock(&ioapic->lock);
137 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
139 struct kvm_vcpu *vcpu;
142 if (RTC_GSI >= IOAPIC_NUM_PINS)
145 rtc_irq_eoi_tracking_reset(ioapic);
146 kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
147 __rtc_irq_eoi_tracking_restore_one(vcpu);
150 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
152 if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map))
153 --ioapic->rtc_status.pending_eoi;
155 WARN_ON(ioapic->rtc_status.pending_eoi < 0);
158 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
160 if (ioapic->rtc_status.pending_eoi > 0)
161 return true; /* coalesced */
166 static int ioapic_service(struct kvm_ioapic *ioapic, unsigned int idx,
169 union kvm_ioapic_redirect_entry *pent;
172 pent = &ioapic->redirtbl[idx];
174 if (!pent->fields.mask) {
175 injected = ioapic_deliver(ioapic, idx, line_status);
176 if (injected && pent->fields.trig_mode == IOAPIC_LEVEL_TRIG)
177 pent->fields.remote_irr = 1;
183 static void update_handled_vectors(struct kvm_ioapic *ioapic)
185 DECLARE_BITMAP(handled_vectors, 256);
188 memset(handled_vectors, 0, sizeof(handled_vectors));
189 for (i = 0; i < IOAPIC_NUM_PINS; ++i)
190 __set_bit(ioapic->redirtbl[i].fields.vector, handled_vectors);
191 memcpy(ioapic->handled_vectors, handled_vectors,
192 sizeof(handled_vectors));
196 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
199 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
200 union kvm_ioapic_redirect_entry *e;
203 spin_lock(&ioapic->lock);
204 for (index = 0; index < IOAPIC_NUM_PINS; index++) {
205 e = &ioapic->redirtbl[index];
206 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
207 kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
209 if (kvm_apic_match_dest(vcpu, NULL, 0,
210 e->fields.dest_id, e->fields.dest_mode)) {
211 __set_bit(e->fields.vector,
212 (unsigned long *)eoi_exit_bitmap);
213 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG)
214 __set_bit(e->fields.vector,
215 (unsigned long *)tmr);
219 spin_unlock(&ioapic->lock);
223 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
225 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
229 kvm_make_scan_ioapic_request(kvm);
232 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
238 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
241 bool mask_before, mask_after;
242 union kvm_ioapic_redirect_entry *e;
244 switch (ioapic->ioregsel) {
245 case IOAPIC_REG_VERSION:
246 /* Writes are ignored. */
249 case IOAPIC_REG_APIC_ID:
250 ioapic->id = (val >> 24) & 0xf;
253 case IOAPIC_REG_ARB_ID:
257 index = (ioapic->ioregsel - 0x10) >> 1;
259 ioapic_debug("change redir index %x val %x\n", index, val);
260 if (index >= IOAPIC_NUM_PINS)
262 e = &ioapic->redirtbl[index];
263 mask_before = e->fields.mask;
264 if (ioapic->ioregsel & 1) {
265 e->bits &= 0xffffffff;
266 e->bits |= (u64) val << 32;
268 e->bits &= ~0xffffffffULL;
269 e->bits |= (u32) val;
270 e->fields.remote_irr = 0;
272 update_handled_vectors(ioapic);
273 mask_after = e->fields.mask;
274 if (mask_before != mask_after)
275 kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
276 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
277 && ioapic->irr & (1 << index))
278 ioapic_service(ioapic, index, false);
279 kvm_vcpu_request_scan_ioapic(ioapic->kvm);
284 static int ioapic_deliver(struct kvm_ioapic *ioapic, int irq, bool line_status)
286 union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
287 struct kvm_lapic_irq irqe;
290 ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
291 "vector=%x trig_mode=%x\n",
292 entry->fields.dest_id, entry->fields.dest_mode,
293 entry->fields.delivery_mode, entry->fields.vector,
294 entry->fields.trig_mode);
296 irqe.dest_id = entry->fields.dest_id;
297 irqe.vector = entry->fields.vector;
298 irqe.dest_mode = entry->fields.dest_mode;
299 irqe.trig_mode = entry->fields.trig_mode;
300 irqe.delivery_mode = entry->fields.delivery_mode << 8;
304 if (irq == RTC_GSI && line_status) {
305 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
306 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
307 ioapic->rtc_status.dest_map);
308 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
310 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
315 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
316 int level, bool line_status)
320 union kvm_ioapic_redirect_entry entry;
323 BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
325 spin_lock(&ioapic->lock);
326 old_irr = ioapic->irr;
327 irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
328 irq_source_id, level);
329 entry = ioapic->redirtbl[irq];
330 irq_level ^= entry.fields.polarity;
332 ioapic->irr &= ~mask;
335 int edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
337 if (irq == RTC_GSI && line_status &&
338 rtc_irq_check_coalesced(ioapic)) {
339 ret = 0; /* coalesced */
343 if ((edge && old_irr != ioapic->irr) ||
344 (!edge && !entry.fields.remote_irr))
345 ret = ioapic_service(ioapic, irq, line_status);
347 ret = 0; /* report coalesced interrupt */
350 trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
351 spin_unlock(&ioapic->lock);
356 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
360 spin_lock(&ioapic->lock);
361 for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
362 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
363 spin_unlock(&ioapic->lock);
366 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
367 struct kvm_ioapic *ioapic, int vector, int trigger_mode)
371 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
372 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
374 if (ent->fields.vector != vector)
378 rtc_irq_eoi(ioapic, vcpu);
380 * We are dropping lock while calling ack notifiers because ack
381 * notifier callbacks for assigned devices call into IOAPIC
382 * recursively. Since remote_irr is cleared only after call
383 * to notifiers if the same vector will be delivered while lock
384 * is dropped it will be put into irr and will be delivered
385 * after ack notifier returns.
387 spin_unlock(&ioapic->lock);
388 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
389 spin_lock(&ioapic->lock);
391 if (trigger_mode != IOAPIC_LEVEL_TRIG)
394 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
395 ent->fields.remote_irr = 0;
396 if (!ent->fields.mask && (ioapic->irr & (1 << i)))
397 ioapic_service(ioapic, i, false);
401 bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector)
403 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
405 return test_bit(vector, ioapic->handled_vectors);
408 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
410 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
412 spin_lock(&ioapic->lock);
413 __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
414 spin_unlock(&ioapic->lock);
417 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
419 return container_of(dev, struct kvm_ioapic, dev);
422 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
424 return ((addr >= ioapic->base_address &&
425 (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
428 static int ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
431 struct kvm_ioapic *ioapic = to_ioapic(this);
433 if (!ioapic_in_range(ioapic, addr))
436 ioapic_debug("addr %lx\n", (unsigned long)addr);
437 ASSERT(!(addr & 0xf)); /* check alignment */
440 spin_lock(&ioapic->lock);
442 case IOAPIC_REG_SELECT:
443 result = ioapic->ioregsel;
446 case IOAPIC_REG_WINDOW:
447 result = ioapic_read_indirect(ioapic, addr, len);
454 spin_unlock(&ioapic->lock);
458 *(u64 *) val = result;
463 memcpy(val, (char *)&result, len);
466 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
471 static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
474 struct kvm_ioapic *ioapic = to_ioapic(this);
476 if (!ioapic_in_range(ioapic, addr))
479 ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
480 (void*)addr, len, val);
481 ASSERT(!(addr & 0xf)); /* check alignment */
495 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
500 spin_lock(&ioapic->lock);
502 case IOAPIC_REG_SELECT:
503 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
506 case IOAPIC_REG_WINDOW:
507 ioapic_write_indirect(ioapic, data);
511 __kvm_ioapic_update_eoi(NULL, ioapic, data, IOAPIC_LEVEL_TRIG);
518 spin_unlock(&ioapic->lock);
522 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
526 for (i = 0; i < IOAPIC_NUM_PINS; i++)
527 ioapic->redirtbl[i].fields.mask = 1;
528 ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
529 ioapic->ioregsel = 0;
532 rtc_irq_eoi_tracking_reset(ioapic);
533 update_handled_vectors(ioapic);
536 static const struct kvm_io_device_ops ioapic_mmio_ops = {
537 .read = ioapic_mmio_read,
538 .write = ioapic_mmio_write,
541 int kvm_ioapic_init(struct kvm *kvm)
543 struct kvm_ioapic *ioapic;
546 ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
549 spin_lock_init(&ioapic->lock);
550 kvm->arch.vioapic = ioapic;
551 kvm_ioapic_reset(ioapic);
552 kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
554 mutex_lock(&kvm->slots_lock);
555 ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
556 IOAPIC_MEM_LENGTH, &ioapic->dev);
557 mutex_unlock(&kvm->slots_lock);
559 kvm->arch.vioapic = NULL;
566 void kvm_ioapic_destroy(struct kvm *kvm)
568 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
571 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
572 kvm->arch.vioapic = NULL;
577 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
579 struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
583 spin_lock(&ioapic->lock);
584 memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
585 spin_unlock(&ioapic->lock);
589 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
591 struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
595 spin_lock(&ioapic->lock);
596 memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
597 update_handled_vectors(ioapic);
598 kvm_vcpu_request_scan_ioapic(kvm);
599 kvm_rtc_eoi_tracking_restore_all(ioapic);
600 spin_unlock(&ioapic->lock);