3 * Print out PMC event information
5 * @remark Copyright 2002 OProfile authors
6 * @remark Read the file COPYING
9 * @author Philippe Elie
18 #include "op_version.h"
19 #include "op_events.h"
21 #include "op_cpufreq.h"
22 #include "op_hw_config.h"
23 #include "op_string.h"
24 #include "op_alloc_counter.h"
25 #include "op_parse_event.h"
26 #include "op_libiberty.h"
27 #include "op_xml_events.h"
29 static char const ** chosen_events;
30 static int num_chosen_events;
31 struct parsed_event * parsed_events;
32 static op_cpu cpu_type = CPU_NO_GOOD;
33 static char * cpu_string;
34 static int callgraph_depth;
36 static int ignore_count;
38 static poptContext optcon;
41 /// return the Hamming weight (number of set bits)
42 static size_t hweight(size_t mask)
56 static void word_wrap(int indent, int *column, char *msg)
59 int wlen = strcspn(msg, " ");
60 if (*column + wlen > LINE_LEN) {
61 printf("\n%*s", indent, "");
64 printf("%.*s", wlen, msg);
67 wlen = strspn(msg, " ");
75 * help_for_event - output event name and description
76 * @param i event number
78 * output an help string for the event @i
80 static void help_for_event(struct op_event * event)
88 nr_counters = op_get_nr_counters(cpu_type);
94 printf("%s", event->name);
96 if(event->counter_mask != 0) {
97 printf(": (counter: ");
99 mask = event->counter_mask;
100 if (hweight(mask) == nr_counters) {
103 for (i = 0; i < CHAR_BIT * sizeof(event->counter_mask); ++i) {
104 if (mask & (1 << i)) {
112 } else if (event->ext != NULL) {
113 /* Handling extended feature interface */
114 printf(": (ext: %s", event->ext);
116 /* Handling arch_perfmon case */
117 printf(": (counter: all");
122 word_wrap(8, &column, event->desc);
123 snprintf(buf, sizeof buf, " (min count: %d)", event->min_count);
124 word_wrap(8, &column, buf);
127 if (strcmp(event->unit->name, "zero")) {
129 if (event->unit->default_mask_name) {
130 printf("\tUnit masks (default %s)\n",
131 event->unit->default_mask_name);
133 printf("\tUnit masks (default 0x%x)\n",
134 event->unit->default_mask);
136 printf("\t----------\n");
138 for (j = 0; j < event->unit->num; j++) {
140 event->unit->um[j].value);
144 if (event->unit->um[j].name) {
145 word_wrap(14, &column, "(name=");
146 word_wrap(14, &column,
147 event->unit->um[j].name);
148 word_wrap(14, &column, ") ");
151 word_wrap(14, &column, event->unit->um[j].desc);
158 static void check_event(struct parsed_event * pev,
159 struct op_event const * event)
163 int const callgraph_min_count_scale = 15;
166 event = find_event_by_name(pev->name, 0, 0);
168 fprintf(stderr, "Invalid unit mask %x for event %s\n",
169 pev->unit_mask, pev->name);
171 fprintf(stderr, "No event named %s is available.\n",
176 op_resolve_unit_mask(pev, NULL);
178 // If a named UM is passed, op_resolve_unit_mask will resolve that into a
179 // valid unit mask, so we don't need to call op_check_events.
180 if (pev->unit_mask_name)
183 ret = op_check_events(pev->name, 0, event->val, pev->unit_mask, cpu_type);
185 if (ret & OP_INVALID_UM) {
186 fprintf(stderr, "Invalid unit mask 0x%x for event %s\n",
187 pev->unit_mask, pev->name);
191 min_count = event->min_count;
193 min_count *= callgraph_min_count_scale;
194 if (!ignore_count && pev->count < min_count) {
195 fprintf(stderr, "Count %d for event %s is below the "
196 "minimum %d\n", pev->count, pev->name, min_count);
202 static void resolve_events(void)
204 size_t count, count_events;
206 size_t * counter_map;
207 size_t nr_counters = op_get_nr_counters(cpu_type);
208 struct op_event const * selected_events[num_chosen_events];
210 count = parse_events(parsed_events, num_chosen_events, chosen_events,
211 ignore_count ? 0 : 1);
213 for (i = 0; i < count; ++i) {
214 op_resolve_unit_mask(&parsed_events[i], NULL);
215 for (j = i + 1; j < count; ++j) {
216 struct parsed_event * pev1 = &parsed_events[i];
217 struct parsed_event * pev2 = &parsed_events[j];
219 if (!strcmp(pev1->name, pev2->name) &&
220 pev1->count == pev2->count &&
221 pev1->unit_mask == pev2->unit_mask &&
222 pev1->kernel == pev2->kernel &&
223 pev1->user == pev2->user) {
224 fprintf(stderr, "All events must be distinct.\n");
230 for (i = 0, count_events = 0; i < count; ++i) {
231 struct parsed_event * pev = &parsed_events[i];
233 /* For 0 unit mask always do wild card match */
234 selected_events[i] = find_event_by_name(pev->name, pev->unit_mask,
235 pev->unit_mask ? pev->unit_mask_valid : 0);
236 check_event(pev, selected_events[i]);
238 if (selected_events[i]->ext == NULL) {
242 if (count_events > nr_counters) {
243 fprintf(stderr, "Not enough hardware counters. "
244 "Need %lu counters but only has %lu.\n",
245 (unsigned long) count_events,
246 (unsigned long) nr_counters);
250 counter_map = map_event_to_counter(selected_events, count, cpu_type);
253 fprintf(stderr, "Couldn't allocate hardware counters for the selected events.\n");
257 for (i = 0; i < count; ++i)
258 if(counter_map[i] == (size_t)-1)
259 if (selected_events[i]->ext != NULL)
260 printf("%s ", (char*) selected_events[i]->ext);
264 printf("%d ", (unsigned int) counter_map[i]);
271 static void show_unit_mask(void)
275 count = parse_events(parsed_events, num_chosen_events, chosen_events, ignore_count ? 0 : 1);
277 fprintf(stderr, "More than one event specified.\n");
281 op_resolve_unit_mask(parsed_events, NULL);
282 if (parsed_events[0].unit_mask_name)
283 printf("%s\n", parsed_events[0].unit_mask_name);
285 printf("%d\n", parsed_events[0].unit_mask);
288 static void show_extra_mask(void)
293 count = parse_events(parsed_events, num_chosen_events, chosen_events, ignore_count ? 0 : 1);
295 fprintf(stderr, "More than one event specified.\n");
299 op_resolve_unit_mask(parsed_events, &extra);
300 printf ("%d\n", extra);
303 static void show_default_event(void)
305 struct op_default_event_descr descr;
307 op_default_event(cpu_type, &descr);
309 if (descr.name[0] == '\0')
312 printf("%s:%lu:%lu:1:1\n", descr.name, descr.count, descr.um);
316 static int show_vers;
317 static int get_cpu_type;
318 static int check_events;
319 static int unit_mask;
320 static int get_default_event;
321 static int extra_mask;
323 static struct poptOption options[] = {
324 { "cpu-type", 'c', POPT_ARG_STRING, &cpu_string, 0,
325 "use the given CPU type", "cpu type", },
326 { "check-events", 'e', POPT_ARG_NONE, &check_events, 0,
327 "check the given event descriptions for validity", NULL, },
328 { "ignore-count", 'i', POPT_ARG_NONE, &ignore_count, 0,
329 "do not validate count value (used by ocount)", NULL},
330 { "unit-mask", 'u', POPT_ARG_NONE, &unit_mask, 0,
331 "default unit mask for the given event", NULL, },
332 { "get-cpu-type", 'r', POPT_ARG_NONE, &get_cpu_type, 0,
333 "show the auto-detected CPU type", NULL, },
334 { "get-default-event", 'd', POPT_ARG_NONE, &get_default_event, 0,
335 "get the default event", NULL, },
336 { "callgraph", '\0', POPT_ARG_INT, &callgraph_depth, 0,
337 "use this callgraph depth", "callgraph depth", },
338 { "version", 'v', POPT_ARG_NONE, &show_vers, 0,
339 "show version", NULL, },
340 { "xml", 'X', POPT_ARG_NONE, &want_xml, 0,
341 "list events as XML", NULL, },
342 { "extra-mask", 'E', POPT_ARG_NONE, &extra_mask, 0,
343 "print extra mask for event", NULL, },
345 { NULL, 0, 0, NULL, 0, NULL, NULL, },
349 * get_options - process command line
350 * @param argc program arg count
351 * @param argv program arg array
353 * Process the arguments, fatally complaining on error.
355 static void get_options(int argc, char const * argv[])
357 optcon = op_poptGetContext(NULL, argc, argv, options, 0);
360 show_version(argv[0]);
362 /* non-option, must be a valid event name or event specs */
363 chosen_events = poptGetArgs(optcon);
366 num_chosen_events = 0;
367 while (chosen_events[num_chosen_events] != NULL)
371 /* don't free the context now, we need chosen_events */
375 /** make valgrind happy */
376 static void cleanup(void)
380 for (i = 0; i < num_chosen_events; ++i) {
381 if (parsed_events[i].name)
382 free(parsed_events[i].name);
387 poptFreeContext(optcon);
394 int main(int argc, char const * argv[])
396 struct list_head * events;
397 struct list_head * pos;
399 char title[10 * MAX_LINE];
400 char const * event_doc = "";
404 get_options(argc, argv);
406 /* usefull for testing purpose to allow to force the cpu type
409 cpu_type = op_get_cpu_number(cpu_string);
411 cpu_type = op_get_cpu_type();
414 if (cpu_type == CPU_NO_GOOD) {
415 fprintf(stderr, "cpu_type '%s' is not valid\n",
416 cpu_string ? cpu_string : "unset");
417 fprintf(stderr, "you should upgrade oprofile or force the "
418 "use of timer mode\n");
422 parsed_events = (struct parsed_event *)xcalloc(num_chosen_events,
423 sizeof(struct parsed_event));
425 pretty = op_get_cpu_type_str(cpu_type);
428 printf("%s\n", pretty);
432 if (get_default_event) {
433 show_default_event();
437 if (cpu_type == CPU_TIMER_INT) {
439 printf("CPU type 'timer' was detected, but this is no longer a supported mode for oprofile.\n"
440 "Ensure the obsolete opcontrol profiler (available in pre-1.0 oprofile releases)\n"
441 "is not running on the system. To check for this, look for the file\n"
442 "/dev/oprofile/cpu_type; if this file exists, locate the pre-1.0 oprofile\n"
443 "installation, and use its 'opcontrol' command with the --deinit option.\n");
448 events = op_events(cpu_type);
450 if (!chosen_events && (unit_mask || check_events || extra_mask)) {
451 fprintf(stderr, "No events given.\n");
470 /* without --check-events, the only argument must be an event name */
471 if (chosen_events && chosen_events[0]) {
472 if (chosen_events[1]) {
473 fprintf(stderr, "Too many arguments.\n");
477 list_for_each(pos, events) {
478 struct op_event * event = list_entry(pos, struct op_event, event_next);
480 if (strcmp(event->name, chosen_events[0]) == 0) {
481 char const * map = find_mapping_for_event(event->val, cpu_type);
483 printf("%d %s\n", event->val, map);
485 printf("%d\n", event->val);
490 fprintf(stderr, "No such event \"%s\"\n", chosen_events[0]);
494 /* default: list all events */
499 "See BIOS and Kernel Developer's Guide for AMD Athlon and AMD Opteron Processors\n"
500 "(26094.pdf), Section 10.2\n\n";
504 "See BIOS and Kernel Developer's Guide for AMD Family 10h Processors\n"
505 "(31116.pdf), Section 3.14\n\n";
509 "See BIOS and Kernel Developer's Guide for AMD Family 11h Processors\n"
510 "(41256.pdf), Section 3.14\n\n";
514 "See BIOS and Kernel Developer's Guide for AMD Family 12h Processors\n";
518 "See BIOS and Kernel Developer's Guide for AMD Family 14h Processors\n";
522 "See BIOS and Kernel Developer's Guide for AMD Family 15h Processors\n";
524 case CPU_AMD64_GENERIC:
526 "See BIOS and Kernel Developer's Guide for AMD Processors\n";
530 "See AMD Athlon Processor x86 Code Optimization Guide\n"
531 "(22007.pdf), Appendix D\n\n";
548 case CPU_GOLDMONTPLUS:
550 case CPU_SANDYBRIDGE:
554 "See Intel Architecture Developer's Manual Volume 3B, Appendix A and\n"
555 "Intel Architecture Optimization Reference Manual\n\n";
558 case CPU_KNIGHTSLANDING:
560 "See Intel Xeon Phi(TM) Processor Performance Monitoring Reference and\n"
561 "Intel Architecture Optimization Reference Manual\n\n";
564 case CPU_ARCH_PERFMON:
566 "See Intel 64 and IA-32 Architectures Software Developer's Manual\n"
567 "Volume 3B Chapter 18 for architectural perfmon events\n"
568 "This is a limited set of fallback events because oprofile doesn't know your CPU\n";
573 "See Alpha Architecture Reference Manual\n"
574 "http://download.majix.org/dec/alpha_arch_ref.pdf\n";
576 case CPU_ARM_XSCALE1:
577 case CPU_ARM_XSCALE2:
579 "See Intel XScale Core Developer's Manual\n"
580 "Chapter 8 Performance Monitoring\n";
584 "See ARM11 MPCore Processor Technical Reference Manual r1p0\n"
585 "Page 3-70, performance counters\n";
589 event_doc = "See ARM11 Technical Reference Manual\n";
594 "See Cortex-A8 Technical Reference Manual\n"
595 "Cortex A8 DDI (ARM DDI 0344B, revision r1p1)\n";
598 case CPU_ARM_SCORPION:
600 "See ARM Architecture Reference Manual ARMv7-A and ARMv7-R Edition\n"
601 "Scorpion Processor Family Programmer's Reference Manual (PRM)\n";
604 case CPU_ARM_SCORPIONMP:
606 "See ARM Architecture Reference Manual ARMv7-A and ARMv7-R Edition\n"
607 "Scorpion Processor Family Programmer's Reference Manual (PRM)\n";
612 "See ARM Architecture Reference Manual ARMv7-A and ARMv7-R Edition\n"
613 "Krait Processor Family Programmer's Reference Manual (PRM)\n";
618 "See Cortex-A9 Technical Reference Manual\n"
619 "Cortex A9 DDI (ARM DDI 0388E, revision r2p0)\n";
624 "See Cortex-A5 Technical Reference Manual\n"
625 "Cortex A5 DDI (ARM DDI 0433B, revision r0p1)\n";
630 "See Cortex-A7 MPCore Technical Reference Manual\n"
631 "Cortex A7 DDI (ARM DDI 0464D, revision r0p3)\n";
634 case CPU_ARM_V7_CA15:
636 "See Cortex-A15 MPCore Technical Reference Manual\n"
637 "Cortex A15 DDI (ARM DDI 0438F, revision r3p1)\n";
640 case CPU_ARM_V7_CA17:
642 "See Cortex-A17 MPCore Technical Reference Manual\n"
643 "Cortex A17 DDI (ARM DDI 0535C, revision r1p1)\n";
646 case CPU_ARM_V8_APM_XGENE:
648 "See ARM Architecture Reference Manual \n"
649 "ARMv8, for ARMv8-A architecture profile\n"
650 "DDI (ARM DDI0487A.a)\n";
653 case CPU_ARM_V8_CA57:
655 "See Cortex-A57 MPCore Technical Reference Manual\n"
656 "Cortex A57 DDI (ARM DDI 0488D, revision r1p1)\n";
659 case CPU_ARM_V8_CA53:
661 "See Cortex-A53 MPCore Technical Reference Manual\n"
662 "Cortex A57 DDI (ARM DDI 0500D, revision r0p2)\n";
665 case CPU_ARM_V8_CAVIUM_THUNDERX2:
667 "See ARM Architecture Reference Manual \n"
668 "ARMv8, for ARMv8-A architecture profile\n"
669 "DDI (ARM DDI0487D.a)\n";
672 case CPU_PPC64_POWER4:
673 case CPU_PPC64_POWER5:
674 case CPU_PPC64_POWER6:
675 case CPU_PPC64_POWER5p:
676 case CPU_PPC64_POWER5pp:
678 case CPU_PPC64_970MP:
679 case CPU_PPC64_POWER7:
681 "When using operf, events may be specified without a '_GRP<n>' suffix.\n"
682 "If _GRP<n> (i.e., group number) is not specified, one will be automatically\n"
683 "selected for use by the profiler. OProfile post-processing tools will\n"
684 "always show real event names that include the group number suffix.\n\n"
685 "Documentation for IBM POWER7 can be obtained at:\n"
686 "http://www.power.org/events/Power7/\n"
687 "No public performance monitoring doc available for older processors.\n";
690 case CPU_PPC64_ARCH_V1:
691 case CPU_PPC64_POWER8:
693 "This processor type is fully supported with operf.\n"
694 "See Power ISA 3.0B at "
695 "https://openpowerfoundation.org/?submit=Search&s=ISA \n"
696 "And the P8 Users Manual at "
697 "https://www-355.ibm.com/systems/power/openpower \n\n";
700 case CPU_PPC64_POWER9:
702 "This processor type is fully supported with operf.\n"
703 "See Power ISA 3.0B at "
704 "https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0\n";
709 "See Programming the MIPS64 20Kc Processor Core User's "
710 "manual available from www.mips.com\n";
714 "See Programming the MIPS32 24K Core "
715 "available from www.mips.com\n";
719 "See Programming the MIPS64 25Kf Processor Core User's "
720 "manual available from www.mips.com\n";
724 "See Programming the MIPS32 34K Core Family "
725 "available from www.mips.com\n";
729 "See Programming the MIPS32 74K Core Family "
730 "available from www.mips.com\n";
734 "See Programming the MIPS32 1004K Core Family "
735 "available from www.mips.com\n";
739 "See Programming the MIPS64 5K Processor Core Family "
740 "Software User's manual available from www.mips.com\n";
742 case CPU_MIPS_R10000:
743 case CPU_MIPS_R12000:
745 "See NEC R10000 / R12000 User's Manual\n"
746 "http://www.necelam.com/docs/files/U10278EJ3V0UM00.pdf\n";
748 case CPU_MIPS_RM7000:
750 "See RM7000 Family User Manual "
751 "available from www.pmc-sierra.com\n";
753 case CPU_MIPS_RM9000:
755 "See RM9000x2 Family User Manual "
756 "available from www.pmc-sierra.com\n";
759 case CPU_MIPS_VR5432:
761 "See NEC VR5443 User's Manual, Volume 1\n"
762 "http://www.necelam.com/docs/files/1375_V1.pdf\n";
764 case CPU_MIPS_VR5500:
766 "See NEC R10000 / R12000 User's Manual\n"
767 "http://www.necel.com/nesdis/image/U16677EJ3V0UM00.pdf\n";
770 case CPU_MIPS_LOONGSON2:
772 "See loongson2 RISC Microprocessor Family Reference Manual\n";
780 "See PowerPC e500 Core Complex Reference Manual\n"
781 "Chapter 7: Performance Monitor\n"
782 "Downloadable from http://www.freescale.com\n";
787 "See PowerPC e300 Core Reference Manual\n"
788 "Downloadable from http://www.freescale.com\n";
793 "See MPC7450 RISC Microprocessor Family Reference "
795 "Chapter 11: Performance Monitor\n"
796 "Downloadable from http://www.freescale.com\n";
799 case CPU_TILE_TILE64:
800 case CPU_TILE_TILEPRO:
801 case CPU_TILE_TILEGX:
803 "See Tilera development doc: Multicore Development "
804 "Environment Optimization Guide.\n"
805 "Contact Tilera Corporation or visit "
806 "http://www.tilera.com for more information.\n";
813 event_doc = "IBM System z CPU Measurement Facility\n"
814 "http://www-01.ibm.com/support/docview.wss"
815 "?uid=isg26fcd1cc32246f4c8852574ce0044734a\n";
818 // don't use default, if someone add a cpu he wants a compiler warning
819 // if he forgets to handle it here.
823 printf("%d is not a valid processor type.\n", cpu_type);
827 sprintf(title, "oprofile: available events for CPU type \"%s\"\n\n", pretty);
829 open_xml_events(title, event_doc, cpu_type);
831 printf("%s%s", title, event_doc);
832 printf("For architectures using unit masks, you may be able to specify\n"
833 "unit masks by name. See 'operf' or 'ocount' man page for more details.\n\n");
836 list_for_each(pos, events) {
837 struct op_event * event = list_entry(pos, struct op_event, event_next);
839 xml_help_for_event(event);
841 help_for_event(event);