4 #include <linux/types.h>
7 /* Definitions of frame buffers */
9 #define FB_MAX 32 /* sufficient for now */
13 #define FBIOGET_VSCREENINFO 0x4600
14 #define FBIOPUT_VSCREENINFO 0x4601
15 #define FBIOGET_FSCREENINFO 0x4602
16 #define FBIOGETCMAP 0x4604
17 #define FBIOPUTCMAP 0x4605
18 #define FBIOPAN_DISPLAY 0x4606
19 #define FBIO_CURSOR _IOWR('F', 0x08, struct fb_cursor)
20 /* 0x4607-0x460B are defined below */
21 /* #define FBIOGET_MONITORSPEC 0x460C */
22 /* #define FBIOPUT_MONITORSPEC 0x460D */
23 /* #define FBIOSWITCH_MONIBIT 0x460E */
24 #define FBIOGET_CON2FBMAP 0x460F
25 #define FBIOPUT_CON2FBMAP 0x4610
26 #define FBIOBLANK 0x4611 /* arg: 0 or vesa level + 1 */
27 #define FBIOGET_VBLANK _IOR('F', 0x12, struct fb_vblank)
28 #define FBIO_ALLOC 0x4613
29 #define FBIO_FREE 0x4614
30 #define FBIOGET_GLYPH 0x4615
31 #define FBIOGET_HWCINFO 0x4616
32 #define FBIOPUT_MODEINFO 0x4617
33 #define FBIOGET_DISPINFO 0x4618
34 #define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32)
36 #define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
37 #define FB_TYPE_PLANES 1 /* Non interleaved planes */
38 #define FB_TYPE_INTERLEAVED_PLANES 2 /* Interleaved planes */
39 #define FB_TYPE_TEXT 3 /* Text/attributes */
40 #define FB_TYPE_VGA_PLANES 4 /* EGA/VGA planes */
41 #define FB_TYPE_FOURCC 5 /* Type identified by a V4L2 FOURCC */
43 #define FB_AUX_TEXT_MDA 0 /* Monochrome text */
44 #define FB_AUX_TEXT_CGA 1 /* CGA/EGA/VGA Color text */
45 #define FB_AUX_TEXT_S3_MMIO 2 /* S3 MMIO fasttext */
46 #define FB_AUX_TEXT_MGA_STEP16 3 /* MGA Millenium I: text, attr, 14 reserved bytes */
47 #define FB_AUX_TEXT_MGA_STEP8 4 /* other MGAs: text, attr, 6 reserved bytes */
48 #define FB_AUX_TEXT_SVGA_GROUP 8 /* 8-15: SVGA tileblit compatible modes */
49 #define FB_AUX_TEXT_SVGA_MASK 7 /* lower three bits says step */
50 #define FB_AUX_TEXT_SVGA_STEP2 8 /* SVGA text mode: text, attr */
51 #define FB_AUX_TEXT_SVGA_STEP4 9 /* SVGA text mode: text, attr, 2 reserved bytes */
52 #define FB_AUX_TEXT_SVGA_STEP8 10 /* SVGA text mode: text, attr, 6 reserved bytes */
53 #define FB_AUX_TEXT_SVGA_STEP16 11 /* SVGA text mode: text, attr, 14 reserved bytes */
54 #define FB_AUX_TEXT_SVGA_LAST 15 /* reserved up to 15 */
56 #define FB_AUX_VGA_PLANES_VGA4 0 /* 16 color planes (EGA/VGA) */
57 #define FB_AUX_VGA_PLANES_CFB4 1 /* CFB4 in planes (VGA) */
58 #define FB_AUX_VGA_PLANES_CFB8 2 /* CFB8 in planes (VGA) */
60 #define FB_VISUAL_MONO01 0 /* Monochr. 1=Black 0=White */
61 #define FB_VISUAL_MONO10 1 /* Monochr. 1=White 0=Black */
62 #define FB_VISUAL_TRUECOLOR 2 /* True color */
63 #define FB_VISUAL_PSEUDOCOLOR 3 /* Pseudo color (like atari) */
64 #define FB_VISUAL_DIRECTCOLOR 4 /* Direct color */
65 #define FB_VISUAL_STATIC_PSEUDOCOLOR 5 /* Pseudo color readonly */
66 #define FB_VISUAL_FOURCC 6 /* Visual identified by a V4L2 FOURCC */
68 #define FB_ACCEL_NONE 0 /* no hardware accelerator */
69 #define FB_ACCEL_ATARIBLITT 1 /* Atari Blitter */
70 #define FB_ACCEL_AMIGABLITT 2 /* Amiga Blitter */
71 #define FB_ACCEL_S3_TRIO64 3 /* Cybervision64 (S3 Trio64) */
72 #define FB_ACCEL_NCR_77C32BLT 4 /* RetinaZ3 (NCR 77C32BLT) */
73 #define FB_ACCEL_S3_VIRGE 5 /* Cybervision64/3D (S3 ViRGE) */
74 #define FB_ACCEL_ATI_MACH64GX 6 /* ATI Mach 64GX family */
75 #define FB_ACCEL_DEC_TGA 7 /* DEC 21030 TGA */
76 #define FB_ACCEL_ATI_MACH64CT 8 /* ATI Mach 64CT family */
77 #define FB_ACCEL_ATI_MACH64VT 9 /* ATI Mach 64CT family VT class */
78 #define FB_ACCEL_ATI_MACH64GT 10 /* ATI Mach 64CT family GT class */
79 #define FB_ACCEL_SUN_CREATOR 11 /* Sun Creator/Creator3D */
80 #define FB_ACCEL_SUN_CGSIX 12 /* Sun cg6 */
81 #define FB_ACCEL_SUN_LEO 13 /* Sun leo/zx */
82 #define FB_ACCEL_IMS_TWINTURBO 14 /* IMS Twin Turbo */
83 #define FB_ACCEL_3DLABS_PERMEDIA2 15 /* 3Dlabs Permedia 2 */
84 #define FB_ACCEL_MATROX_MGA2064W 16 /* Matrox MGA2064W (Millenium) */
85 #define FB_ACCEL_MATROX_MGA1064SG 17 /* Matrox MGA1064SG (Mystique) */
86 #define FB_ACCEL_MATROX_MGA2164W 18 /* Matrox MGA2164W (Millenium II) */
87 #define FB_ACCEL_MATROX_MGA2164W_AGP 19 /* Matrox MGA2164W (Millenium II) */
88 #define FB_ACCEL_MATROX_MGAG100 20 /* Matrox G100 (Productiva G100) */
89 #define FB_ACCEL_MATROX_MGAG200 21 /* Matrox G200 (Myst, Mill, ...) */
90 #define FB_ACCEL_SUN_CG14 22 /* Sun cgfourteen */
91 #define FB_ACCEL_SUN_BWTWO 23 /* Sun bwtwo */
92 #define FB_ACCEL_SUN_CGTHREE 24 /* Sun cgthree */
93 #define FB_ACCEL_SUN_TCX 25 /* Sun tcx */
94 #define FB_ACCEL_MATROX_MGAG400 26 /* Matrox G400 */
95 #define FB_ACCEL_NV3 27 /* nVidia RIVA 128 */
96 #define FB_ACCEL_NV4 28 /* nVidia RIVA TNT */
97 #define FB_ACCEL_NV5 29 /* nVidia RIVA TNT2 */
98 #define FB_ACCEL_CT_6555x 30 /* C&T 6555x */
99 #define FB_ACCEL_3DFX_BANSHEE 31 /* 3Dfx Banshee */
100 #define FB_ACCEL_ATI_RAGE128 32 /* ATI Rage128 family */
101 #define FB_ACCEL_IGS_CYBER2000 33 /* CyberPro 2000 */
102 #define FB_ACCEL_IGS_CYBER2010 34 /* CyberPro 2010 */
103 #define FB_ACCEL_IGS_CYBER5000 35 /* CyberPro 5000 */
104 #define FB_ACCEL_SIS_GLAMOUR 36 /* SiS 300/630/540 */
105 #define FB_ACCEL_3DLABS_PERMEDIA3 37 /* 3Dlabs Permedia 3 */
106 #define FB_ACCEL_ATI_RADEON 38 /* ATI Radeon family */
107 #define FB_ACCEL_I810 39 /* Intel 810/815 */
108 #define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 650, 740 */
109 #define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre") */
110 #define FB_ACCEL_I830 42 /* Intel 830M/845G/85x/865G */
111 #define FB_ACCEL_NV_10 43 /* nVidia Arch 10 */
112 #define FB_ACCEL_NV_20 44 /* nVidia Arch 20 */
113 #define FB_ACCEL_NV_30 45 /* nVidia Arch 30 */
114 #define FB_ACCEL_NV_40 46 /* nVidia Arch 40 */
115 #define FB_ACCEL_XGI_VOLARI_V 47 /* XGI Volari V3XT, V5, V8 */
116 #define FB_ACCEL_XGI_VOLARI_Z 48 /* XGI Volari Z7 */
117 #define FB_ACCEL_OMAP1610 49 /* TI OMAP16xx */
118 #define FB_ACCEL_TRIDENT_TGUI 50 /* Trident TGUI */
119 #define FB_ACCEL_TRIDENT_3DIMAGE 51 /* Trident 3DImage */
120 #define FB_ACCEL_TRIDENT_BLADE3D 52 /* Trident Blade3D */
121 #define FB_ACCEL_TRIDENT_BLADEXP 53 /* Trident BladeXP */
122 #define FB_ACCEL_CIRRUS_ALPINE 53 /* Cirrus Logic 543x/544x/5480 */
123 #define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
124 #define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
125 #define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
126 #define FB_ACCEL_NEOMAGIC_NM2097 93 /* NeoMagic NM2097 */
127 #define FB_ACCEL_NEOMAGIC_NM2160 94 /* NeoMagic NM2160 */
128 #define FB_ACCEL_NEOMAGIC_NM2200 95 /* NeoMagic NM2200 */
129 #define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230 */
130 #define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360 */
131 #define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380 */
132 #define FB_ACCEL_PXA3XX 99 /* PXA3xx */
134 #define FB_ACCEL_SAVAGE4 0x80 /* S3 Savage4 */
135 #define FB_ACCEL_SAVAGE3D 0x81 /* S3 Savage3D */
136 #define FB_ACCEL_SAVAGE3D_MV 0x82 /* S3 Savage3D-MV */
137 #define FB_ACCEL_SAVAGE2000 0x83 /* S3 Savage2000 */
138 #define FB_ACCEL_SAVAGE_MX_MV 0x84 /* S3 Savage/MX-MV */
139 #define FB_ACCEL_SAVAGE_MX 0x85 /* S3 Savage/MX */
140 #define FB_ACCEL_SAVAGE_IX_MV 0x86 /* S3 Savage/IX-MV */
141 #define FB_ACCEL_SAVAGE_IX 0x87 /* S3 Savage/IX */
142 #define FB_ACCEL_PROSAVAGE_PM 0x88 /* S3 ProSavage PM133 */
143 #define FB_ACCEL_PROSAVAGE_KM 0x89 /* S3 ProSavage KM133 */
144 #define FB_ACCEL_S3TWISTER_P 0x8a /* S3 Twister */
145 #define FB_ACCEL_S3TWISTER_K 0x8b /* S3 TwisterK */
146 #define FB_ACCEL_SUPERSAVAGE 0x8c /* S3 Supersavage */
147 #define FB_ACCEL_PROSAVAGE_DDR 0x8d /* S3 ProSavage DDR */
148 #define FB_ACCEL_PROSAVAGE_DDRK 0x8e /* S3 ProSavage DDR-K */
150 #define FB_ACCEL_PUV3_UNIGFX 0xa0 /* PKUnity-v3 Unigfx */
152 #define FB_CAP_FOURCC 1 /* Device supports FOURCC-based formats */
154 struct fb_fix_screeninfo {
155 char id[16]; /* identification string eg "TT Builtin" */
156 unsigned long smem_start; /* Start of frame buffer mem */
157 /* (physical address) */
158 __u32 smem_len; /* Length of frame buffer mem */
159 __u32 type; /* see FB_TYPE_* */
160 __u32 type_aux; /* Interleave for interleaved Planes */
161 __u32 visual; /* see FB_VISUAL_* */
162 __u16 xpanstep; /* zero if no hardware panning */
163 __u16 ypanstep; /* zero if no hardware panning */
164 __u16 ywrapstep; /* zero if no hardware ywrap */
165 __u32 line_length; /* length of a line in bytes */
166 unsigned long mmio_start; /* Start of Memory Mapped I/O */
167 /* (physical address) */
168 __u32 mmio_len; /* Length of Memory Mapped I/O */
169 __u32 accel; /* Indicate to driver which */
170 /* specific chip/card we have */
171 __u16 capabilities; /* see FB_CAP_* */
172 __u16 reserved[2]; /* Reserved for future compatibility */
175 /* Interpretation of offset for color fields: All offsets are from the right,
176 * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
177 * can use the offset as right argument to <<). A pixel afterwards is a bit
178 * stream and is written to video memory as that unmodified.
180 * For pseudocolor: offset and length should be the same for all color
181 * components. Offset specifies the position of the least significant bit
182 * of the pallette index in a pixel value. Length indicates the number
183 * of available palette entries (i.e. # of entries = 1 << length).
186 __u32 offset; /* beginning of bitfield */
187 __u32 length; /* length of bitfield */
188 __u32 msb_right; /* != 0 : Most significant bit is */
192 #define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */
193 #define FB_NONSTD_REV_PIX_IN_B 2 /* order of pixels in each byte is reversed */
195 #define FB_ACTIVATE_NOW 0 /* set values immediately (or vbl)*/
196 #define FB_ACTIVATE_NXTOPEN 1 /* activate on next open */
197 #define FB_ACTIVATE_TEST 2 /* don't set, round up impossible */
198 #define FB_ACTIVATE_MASK 15
200 #define FB_ACTIVATE_VBL 16 /* activate values on next vbl */
201 #define FB_CHANGE_CMAP_VBL 32 /* change colormap on vbl */
202 #define FB_ACTIVATE_ALL 64 /* change all VCs on this fb */
203 #define FB_ACTIVATE_FORCE 128 /* force apply even when no change*/
204 #define FB_ACTIVATE_INV_MODE 256 /* invalidate videomode */
206 #define FB_ACCELF_TEXT 1 /* (OBSOLETE) see fb_info.flags and vc_mode */
208 #define FB_SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */
209 #define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
210 #define FB_SYNC_EXT 4 /* external sync */
211 #define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
212 #define FB_SYNC_BROADCAST 16 /* broadcast video timings */
213 /* vtotal = 144d/288n/576i => PAL */
214 /* vtotal = 121d/242n/484i => NTSC */
215 #define FB_SYNC_ON_GREEN 32 /* sync on green */
217 #define FB_VMODE_NONINTERLACED 0 /* non interlaced */
218 #define FB_VMODE_INTERLACED 1 /* interlaced */
219 #define FB_VMODE_DOUBLE 2 /* double scan */
220 #define FB_VMODE_ODD_FLD_FIRST 4 /* interlaced: top line first */
221 #define FB_VMODE_MASK 255
223 #define FB_VMODE_YWRAP 256 /* ywrap instead of panning */
224 #define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */
225 #define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */
228 * Display rotation support
230 #define FB_ROTATE_UR 0
231 #define FB_ROTATE_CW 1
232 #define FB_ROTATE_UD 2
233 #define FB_ROTATE_CCW 3
235 #define PICOS2KHZ(a) (1000000000UL/(a))
236 #define KHZ2PICOS(a) (1000000000UL/(a))
238 struct fb_var_screeninfo {
239 __u32 xres; /* visible resolution */
241 __u32 xres_virtual; /* virtual resolution */
243 __u32 xoffset; /* offset from virtual to visible */
244 __u32 yoffset; /* resolution */
246 __u32 bits_per_pixel; /* guess what */
247 __u32 grayscale; /* 0 = color, 1 = grayscale, */
249 struct fb_bitfield red; /* bitfield in fb mem if true color, */
250 struct fb_bitfield green; /* else only length is significant */
251 struct fb_bitfield blue;
252 struct fb_bitfield transp; /* transparency */
254 __u32 nonstd; /* != 0 Non standard pixel format */
256 __u32 activate; /* see FB_ACTIVATE_* */
258 __u32 height; /* height of picture in mm */
259 __u32 width; /* width of picture in mm */
261 __u32 accel_flags; /* (OBSOLETE) see fb_info.flags */
263 /* Timing: All values in pixclocks, except pixclock (of course) */
264 __u32 pixclock; /* pixel clock in ps (pico seconds) */
265 __u32 left_margin; /* time from sync to picture */
266 __u32 right_margin; /* time from picture to sync */
267 __u32 upper_margin; /* time from sync to picture */
269 __u32 hsync_len; /* length of horizontal sync */
270 __u32 vsync_len; /* length of vertical sync */
271 __u32 sync; /* see FB_SYNC_* */
272 __u32 vmode; /* see FB_VMODE_* */
273 __u32 rotate; /* angle we rotate counter clockwise */
274 __u32 colorspace; /* colorspace for FOURCC-based modes */
275 __u32 reserved[4]; /* Reserved for future compatibility */
279 __u32 start; /* First entry */
280 __u32 len; /* Number of entries */
281 __u16 *red; /* Red values */
284 __u16 *transp; /* transparency, can be NULL */
287 struct fb_con2fbmap {
292 /* VESA Blanking Levels */
293 #define VESA_NO_BLANKING 0
294 #define VESA_VSYNC_SUSPEND 1
295 #define VESA_HSYNC_SUSPEND 2
296 #define VESA_POWERDOWN 3
300 /* screen: unblanked, hsync: on, vsync: on */
301 FB_BLANK_UNBLANK = VESA_NO_BLANKING,
303 /* screen: blanked, hsync: on, vsync: on */
304 FB_BLANK_NORMAL = VESA_NO_BLANKING + 1,
306 /* screen: blanked, hsync: on, vsync: off */
307 FB_BLANK_VSYNC_SUSPEND = VESA_VSYNC_SUSPEND + 1,
309 /* screen: blanked, hsync: off, vsync: on */
310 FB_BLANK_HSYNC_SUSPEND = VESA_HSYNC_SUSPEND + 1,
312 /* screen: blanked, hsync: off, vsync: off */
313 FB_BLANK_POWERDOWN = VESA_POWERDOWN + 1
316 #define FB_VBLANK_VBLANKING 0x001 /* currently in a vertical blank */
317 #define FB_VBLANK_HBLANKING 0x002 /* currently in a horizontal blank */
318 #define FB_VBLANK_HAVE_VBLANK 0x004 /* vertical blanks can be detected */
319 #define FB_VBLANK_HAVE_HBLANK 0x008 /* horizontal blanks can be detected */
320 #define FB_VBLANK_HAVE_COUNT 0x010 /* global retrace counter is available */
321 #define FB_VBLANK_HAVE_VCOUNT 0x020 /* the vcount field is valid */
322 #define FB_VBLANK_HAVE_HCOUNT 0x040 /* the hcount field is valid */
323 #define FB_VBLANK_VSYNCING 0x080 /* currently in a vsync */
324 #define FB_VBLANK_HAVE_VSYNC 0x100 /* verical syncs can be detected */
327 __u32 flags; /* FB_VBLANK flags */
328 __u32 count; /* counter of retraces since boot */
329 __u32 vcount; /* current scanline position */
330 __u32 hcount; /* current scandot position */
331 __u32 reserved[4]; /* reserved for future compatibility */
334 /* Internal HW accel */
348 __u32 dx; /* screen-relative */
357 __u32 dx; /* Where to place image */
359 __u32 width; /* Size of image */
361 __u32 fg_color; /* Only used when a mono bitmap */
363 __u8 depth; /* Depth of the image */
364 const char *data; /* Pointer to image data */
365 struct fb_cmap cmap; /* color map info */
369 * hardware cursor control
372 #define FB_CUR_SETIMAGE 0x01
373 #define FB_CUR_SETPOS 0x02
374 #define FB_CUR_SETHOT 0x04
375 #define FB_CUR_SETCMAP 0x08
376 #define FB_CUR_SETSHAPE 0x10
377 #define FB_CUR_SETSIZE 0x20
378 #define FB_CUR_SETALL 0xFF
385 __u16 set; /* what to set */
386 __u16 enable; /* cursor on/off */
387 __u16 rop; /* bitop operation */
388 const char *mask; /* cursor mask bits */
389 struct fbcurpos hot; /* cursor hot spot */
390 struct fb_image image; /* Cursor image */
393 #ifdef CONFIG_FB_BACKLIGHT
394 /* Settings for the generic backlight code */
395 #define FB_BACKLIGHT_LEVELS 128
396 #define FB_BACKLIGHT_MAX 0xFF
400 #endif /* _LINUX_FB_H */