1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2014 Charles Manning <cdhmanning@gmail.com>
6 * Cyclone V SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-v/cv_5400a.pdf
7 * Arria V SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-v/av_5400a.pdf
8 * Arria 10 SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-10/a10_5400a.pdf
10 * Bootable SoCFPGA image requires a structure of the following format
11 * positioned at offset 0x40 of the bootable image. Endian is LSB.
13 * There are two versions of the SoCFPGA header format, v0 and v1.
14 * The version 0 is used by Cyclone V SoC and Arria V SoC, while
15 * the version 1 is used by the Arria 10 SoC.
19 * -----------------------
20 * 0x40 4 Validation word (0x31305341)
21 * 0x44 1 Version (0x0)
22 * 0x45 1 Flags (unused, zero is fine)
23 * 0x46 2 Length (in units of u32, including the end checksum).
25 * 0x4A 2 Checksum over the header. NB Not CRC32
29 * -----------------------
30 * 0x40 4 Validation word (0x31305341)
31 * 0x44 1 Version (0x1)
32 * 0x45 1 Flags (unused, zero is fine)
33 * 0x46 2 Header length (in units of u8).
34 * 0x48 4 Length (in units of u8).
35 * 0x4C 4 Image entry offset from standard of header
37 * 0x52 2 Checksum over the header. NB Not CRC32
39 * At the end of the code we have a 32-bit CRC checksum over whole binary
42 * Note that the CRC used here is **not** the zlib/Adler crc32. It is the
43 * CRC-32 used in bzip2, ethernet and elsewhere.
45 * The Image entry offset in version 1 image is relative the the start of
46 * the header, 0x40, and must not be a negative number. Therefore, it is
47 * only possible to make the SoCFPGA jump forward. The U-Boot bootloader
48 * places a trampoline instruction at offset 0x5c, 0x14 bytes from the
49 * start of the SoCFPGA header, which jumps to the reset vector.
51 * The image is padded out to 64k, because that is what is
52 * typically used to write the image to the boot medium.
55 #include "pbl_crc32.h"
56 #include "imagetool.h"
58 #include <u-boot/crc.h>
62 #define HEADER_OFFSET 0x40
63 #define VALIDATION_WORD 0x31305341
65 /* Minimum and default entry point offset */
66 #define ENTRY_POINT_OFFSET 0x14
68 static uint8_t buffer_v0[0x10000];
69 static uint8_t buffer_v1[0x40000];
71 struct socfpga_header_v0 {
80 struct socfpga_header_v1 {
86 uint32_t entry_offset;
91 static unsigned int sfp_hdr_size(uint8_t ver)
94 return sizeof(struct socfpga_header_v0);
96 return sizeof(struct socfpga_header_v1);
100 static unsigned int sfp_pad_size(uint8_t ver)
103 return sizeof(buffer_v0);
105 return sizeof(buffer_v1);
110 * The header checksum is just a very simple checksum over
112 * There is still a crc32 over the whole lot.
114 static uint16_t sfp_hdr_checksum(uint8_t *buf, unsigned char ver)
117 int len = sfp_hdr_size(ver) - sizeof(ret);
125 static void sfp_build_header(uint8_t *buf, uint8_t ver, uint8_t flags,
126 uint32_t length_bytes,
127 struct image_tool_params *params)
129 uint32_t entry_offset = params->eflag ? params->ep : ENTRY_POINT_OFFSET;
130 struct socfpga_header_v0 header_v0 = {
131 .validation = cpu_to_le32(VALIDATION_WORD),
134 .length_u32 = cpu_to_le16(length_bytes / 4),
138 struct socfpga_header_v1 header_v1 = {
139 .validation = cpu_to_le32(VALIDATION_WORD),
142 .header_u8 = cpu_to_le16(sizeof(header_v1)),
143 .length_u8 = cpu_to_le32(length_bytes),
144 /* Trampoline offset */
145 .entry_offset = cpu_to_le32(entry_offset),
152 csum = sfp_hdr_checksum((uint8_t *)&header_v0, 0);
153 header_v0.checksum = cpu_to_le16(csum);
154 memcpy(buf, &header_v0, sizeof(header_v0));
156 csum = sfp_hdr_checksum((uint8_t *)&header_v1, 1);
157 header_v1.checksum = cpu_to_le16(csum);
158 memcpy(buf, &header_v1, sizeof(header_v1));
163 * Perform a rudimentary verification of header and return
166 static int sfp_verify_header(const uint8_t *buf, uint8_t *ver)
168 struct socfpga_header_v0 header_v0;
169 struct socfpga_header_v1 header_v1;
170 uint16_t hdr_csum, sfp_csum;
174 * Header v0 is always smaller than Header v1 and the validation
175 * word and version field is at the same place, so use Header v0
176 * to check for version during verifiction and upgrade to Header
179 memcpy(&header_v0, buf, sizeof(header_v0));
181 if (le32_to_cpu(header_v0.validation) != VALIDATION_WORD)
184 if (header_v0.version == 0) {
185 hdr_csum = le16_to_cpu(header_v0.checksum);
186 sfp_csum = sfp_hdr_checksum((uint8_t *)&header_v0, 0);
187 img_len = le16_to_cpu(header_v0.length_u32) * 4;
188 } else if (header_v0.version == 1) {
189 memcpy(&header_v1, buf, sizeof(header_v1));
190 hdr_csum = le16_to_cpu(header_v1.checksum);
191 sfp_csum = sfp_hdr_checksum((uint8_t *)&header_v1, 1);
192 img_len = le32_to_cpu(header_v1.length_u8);
193 } else { /* Invalid version */
197 /* Verify checksum */
198 if (hdr_csum != sfp_csum)
201 *ver = header_v0.version;
205 /* Sign the buffer and return the signed buffer size */
206 static int sfp_sign_buffer(uint8_t *buf, uint8_t ver, uint8_t flags,
207 int len, int pad_64k,
208 struct image_tool_params *params)
212 /* Align the length up */
215 /* Build header, adding 4 bytes to length to hold the CRC32. */
216 sfp_build_header(buf + HEADER_OFFSET, ver, flags, len + 4, params);
218 /* Calculate and apply the CRC */
219 calc_crc = ~pbl_crc32(0, (char *)buf, len);
221 *((uint32_t *)(buf + len)) = cpu_to_le32(calc_crc);
226 return sfp_pad_size(ver);
229 /* Verify that the buffer looks sane */
230 static int sfp_verify_buffer(const uint8_t *buf)
232 int len; /* Including 32bit CRC */
237 len = sfp_verify_header(buf + HEADER_OFFSET, &ver);
239 debug("Invalid header\n");
243 if (len < HEADER_OFFSET || len > sfp_pad_size(ver)) {
244 debug("Invalid header length (%i)\n", len);
249 * Adjust length to the base of the CRC.
254 calc_crc = ~pbl_crc32(0, (const char *)buf, len);
256 buf_crc = le32_to_cpu(*((uint32_t *)(buf + len)));
258 if (buf_crc != calc_crc) {
259 fprintf(stderr, "CRC32 does not match (%08x != %08x)\n",
267 /* mkimage glue functions */
268 static int socfpgaimage_verify_header(unsigned char *ptr, int image_size,
269 struct image_tool_params *params)
271 if (image_size < 0x80)
274 return sfp_verify_buffer(ptr);
277 static void socfpgaimage_print_header_v0(struct socfpga_header_v0 *header)
279 printf("Image Type\t: Cyclone V / Arria V SoC Image\n");
280 printf("Validation word\t: 0x%08x\n",
281 le32_to_cpu(header->validation));
282 printf("Version\t\t: 0x%08x\n", header->version);
283 printf("Flags\t\t: 0x%08x\n", header->flags);
284 printf("Program length\t: 0x%08x\n",
285 le16_to_cpu(header->length_u32));
286 printf("Header checksum\t: 0x%08x\n",
287 le16_to_cpu(header->checksum));
290 static void socfpgaimage_print_header_v1(struct socfpga_header_v1 *header)
292 printf("Image Type\t: Arria 10 SoC Image\n");
293 printf("Validation word\t: 0x%08x\n",
294 le32_to_cpu(header->validation));
295 printf("Version\t\t: 0x%08x\n", header->version);
296 printf("Flags\t\t: 0x%08x\n", header->flags);
297 printf("Header length\t: 0x%08x\n",
298 le16_to_cpu(header->header_u8));
299 printf("Program length\t: 0x%08x\n",
300 le32_to_cpu(header->length_u8));
301 printf("Program entry\t: 0x%08x\n",
302 le32_to_cpu(header->entry_offset));
303 printf("Header checksum\t: 0x%08x\n",
304 le16_to_cpu(header->checksum));
307 static void socfpgaimage_print_header(const void *ptr)
309 const void *header = ptr + HEADER_OFFSET;
310 struct socfpga_header_v0 *header_v0;
312 if (sfp_verify_buffer(ptr) == 0) {
313 header_v0 = (struct socfpga_header_v0 *)header;
315 if (header_v0->version == 0)
316 socfpgaimage_print_header_v0(header_v0);
318 socfpgaimage_print_header_v1((struct socfpga_header_v1 *)header);
320 printf("Not a sane SOCFPGA preloader\n");
324 static int socfpgaimage_check_params_v0(struct image_tool_params *params)
326 /* Not sure if we should be accepting fflags */
327 return (params->dflag && (params->fflag || params->lflag)) ||
328 (params->fflag && (params->dflag || params->lflag)) ||
329 (params->lflag && (params->dflag || params->fflag));
332 static int socfpgaimage_check_params_v1(struct image_tool_params *params)
335 * If the entry point is specified, ensure it is >= ENTRY_POINT_OFFSET
336 * and it is 4 bytes aligned.
338 if (params->eflag && (params->ep < ENTRY_POINT_OFFSET ||
339 params->ep % 4 != 0)) {
341 "Error: Entry point must be greater than 0x%x.\n",
346 /* Not sure if we should be accepting fflags */
347 return (params->dflag && (params->fflag || params->lflag)) ||
348 (params->fflag && (params->dflag || params->lflag)) ||
349 (params->lflag && (params->dflag || params->fflag));
352 static int socfpgaimage_check_image_types_v0(uint8_t type)
354 if (type == IH_TYPE_SOCFPGAIMAGE)
359 static int socfpgaimage_check_image_types_v1(uint8_t type)
361 if (type == IH_TYPE_SOCFPGAIMAGE_V1)
367 * To work in with the mkimage framework, we do some ugly stuff...
369 * First, socfpgaimage_vrec_header() is called.
370 * We prepend a fake header big enough to make the file sfp_pad_size().
371 * This gives us enough space to do what we want later.
373 * Next, socfpgaimage_set_header() is called.
374 * We fix up the buffer by moving the image to the start of the buffer.
375 * We now have some room to do what we need (add CRC and padding).
378 static int data_size;
380 static int sfp_fake_header_size(unsigned int size, uint8_t ver)
382 return sfp_pad_size(ver) - size;
385 static int sfp_vrec_header(struct image_tool_params *params,
386 struct image_type_params *tparams, uint8_t ver)
390 if (params->datafile &&
391 stat(params->datafile, &sbuf) == 0 &&
392 sbuf.st_size <= (sfp_pad_size(ver) - sizeof(uint32_t))) {
393 data_size = sbuf.st_size;
394 tparams->header_size = sfp_fake_header_size(data_size, ver);
400 static int socfpgaimage_vrec_header_v0(struct image_tool_params *params,
401 struct image_type_params *tparams)
403 return sfp_vrec_header(params, tparams, 0);
406 static int socfpgaimage_vrec_header_v1(struct image_tool_params *params,
407 struct image_type_params *tparams)
409 return sfp_vrec_header(params, tparams, 1);
412 static void sfp_set_header(void *ptr, unsigned char ver,
413 struct image_tool_params *params)
415 uint8_t *buf = (uint8_t *)ptr;
418 * This function is called after vrec_header() has been called.
419 * At this stage we have the sfp_fake_header_size() dummy bytes
420 * followed by data_size image bytes. Total = sfp_pad_size().
421 * We need to fix the buffer by moving the image bytes back to
422 * the beginning of the buffer, then actually do the signing stuff...
424 memmove(buf, buf + sfp_fake_header_size(data_size, ver), data_size);
425 memset(buf + data_size, 0, sfp_fake_header_size(data_size, ver));
427 sfp_sign_buffer(buf, ver, 0, data_size, 0, params);
430 static void socfpgaimage_set_header_v0(void *ptr, struct stat *sbuf, int ifd,
431 struct image_tool_params *params)
433 sfp_set_header(ptr, 0, params);
436 static void socfpgaimage_set_header_v1(void *ptr, struct stat *sbuf, int ifd,
437 struct image_tool_params *params)
439 sfp_set_header(ptr, 1, params);
444 "Altera SoCFPGA Cyclone V / Arria V image support",
445 0, /* This will be modified by vrec_header() */
447 socfpgaimage_check_params_v0,
448 socfpgaimage_verify_header,
449 socfpgaimage_print_header,
450 socfpgaimage_set_header_v0,
452 socfpgaimage_check_image_types_v0,
454 socfpgaimage_vrec_header_v0
459 "Altera SoCFPGA Arria10 image support",
460 0, /* This will be modified by vrec_header() */
462 socfpgaimage_check_params_v1,
463 socfpgaimage_verify_header,
464 socfpgaimage_print_header,
465 socfpgaimage_set_header_v1,
467 socfpgaimage_check_image_types_v1,
469 socfpgaimage_vrec_header_v1