1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Speed Select -- Enumerate and control features
4 * Copyright (c) 2019 Intel Corporation.
10 static int mbox_retries = 3;
12 static struct isst_platform_ops *isst_ops;
14 #define CHECK_CB(_name) \
16 if (!isst_ops || !isst_ops->_name) { \
17 fprintf(stderr, "Invalid ops\n"); \
22 int isst_set_platform_ops(void)
24 isst_ops = mbox_get_platform_ops();
31 void isst_update_platform_param(enum isst_platform_param param, int value)
34 case ISST_PARAM_MBOX_DELAY:
37 case ISST_PARAM_MBOX_RETRIES:
45 int isst_get_disp_freq_multiplier(void)
47 CHECK_CB(get_disp_freq_multiplier);
48 return isst_ops->get_disp_freq_multiplier();
51 int isst_get_trl_max_levels(void)
53 CHECK_CB(get_trl_max_levels);
54 return isst_ops->get_trl_max_levels();
57 char *isst_get_trl_level_name(int level)
59 CHECK_CB(get_trl_level_name);
60 return isst_ops->get_trl_level_name(level);
63 int isst_is_punit_valid(struct isst_id *id)
65 CHECK_CB(is_punit_valid);
66 return isst_ops->is_punit_valid(id);
69 static int isst_send_mmio_command(unsigned int cpu, unsigned int reg, int write,
72 struct isst_if_io_regs io_regs;
73 const char *pathname = "/dev/isst_interface";
75 FILE *outf = get_output_file();
78 debug_printf("mmio_cmd cpu:%d reg:%d write:%d\n", cpu, reg, write);
80 fd = open(pathname, O_RDWR);
82 err(-1, "%s open failed", pathname);
84 io_regs.req_count = 1;
85 io_regs.io_reg[0].logical_cpu = cpu;
86 io_regs.io_reg[0].reg = reg;
89 io_regs.io_reg[0].read_write = 1;
90 io_regs.io_reg[0].value = *value;
92 io_regs.io_reg[0].read_write = 0;
95 if (ioctl(fd, cmd, &io_regs) == -1) {
96 if (errno == ENOTTY) {
97 perror("ISST_IF_IO_COMMAND\n");
98 fprintf(stderr, "Check presence of kernel modules: isst_if_mmio\n");
101 fprintf(outf, "Error: mmio_cmd cpu:%d reg:%x read_write:%x\n",
105 *value = io_regs.io_reg[0].value;
108 "mmio_cmd response: cpu:%d reg:%x rd_write:%x resp:%x\n",
109 cpu, reg, write, *value);
117 int isst_send_mbox_command(unsigned int cpu, unsigned char command,
118 unsigned char sub_command, unsigned int parameter,
119 unsigned int req_data, unsigned int *resp)
121 const char *pathname = "/dev/isst_interface";
123 struct isst_if_mbox_cmds mbox_cmds = { 0 };
126 "mbox_send: cpu:%d command:%x sub_command:%x parameter:%x req_data:%x\n",
127 cpu, command, sub_command, parameter, req_data);
129 if (!is_skx_based_platform() && command == CONFIG_CLOS &&
130 sub_command != CLOS_PM_QOS_CONFIG) {
133 int clos_id, core_id, ret = 0;
135 debug_printf("CPU %d\n", cpu);
137 if (parameter & BIT(MBOX_CMD_WRITE_BIT)) {
142 switch (sub_command) {
144 core_id = parameter & 0xff;
145 ret = isst_send_mmio_command(
146 cpu, PQR_ASSOC_OFFSET + core_id * 4, write,
152 clos_id = parameter & 0x03;
153 ret = isst_send_mmio_command(
154 cpu, PM_CLOS_OFFSET + clos_id * 4, write,
167 mbox_cmds.cmd_count = 1;
168 mbox_cmds.mbox_cmd[0].logical_cpu = cpu;
169 mbox_cmds.mbox_cmd[0].command = command;
170 mbox_cmds.mbox_cmd[0].sub_command = sub_command;
171 mbox_cmds.mbox_cmd[0].parameter = parameter;
172 mbox_cmds.mbox_cmd[0].req_data = req_data;
175 usleep(mbox_delay * 1000);
177 fd = open(pathname, O_RDWR);
179 err(-1, "%s open failed", pathname);
181 retry = mbox_retries;
184 if (ioctl(fd, ISST_IF_MBOX_COMMAND, &mbox_cmds) == -1) {
185 if (errno == ENOTTY) {
186 perror("ISST_IF_MBOX_COMMAND\n");
187 fprintf(stderr, "Check presence of kernel modules: isst_if_mbox_pci or isst_if_mbox_msr\n");
191 "Error: mbox_cmd cpu:%d command:%x sub_command:%x parameter:%x req_data:%x errorno:%d\n",
192 cpu, command, sub_command, parameter, req_data, errno);
195 *resp = mbox_cmds.mbox_cmd[0].resp_data;
197 "mbox_cmd response: cpu:%d command:%x sub_command:%x parameter:%x req_data:%x resp:%x\n",
198 cpu, command, sub_command, parameter, req_data, *resp);
206 debug_printf("Failed mbox command even after retries\n");
213 int isst_send_msr_command(unsigned int cpu, unsigned int msr, int write,
214 unsigned long long *req_resp)
216 struct isst_if_msr_cmds msr_cmds;
217 const char *pathname = "/dev/isst_interface";
218 FILE *outf = get_output_file();
221 fd = open(pathname, O_RDWR);
223 err(-1, "%s open failed", pathname);
225 msr_cmds.cmd_count = 1;
226 msr_cmds.msr_cmd[0].logical_cpu = cpu;
227 msr_cmds.msr_cmd[0].msr = msr;
228 msr_cmds.msr_cmd[0].read_write = write;
230 msr_cmds.msr_cmd[0].data = *req_resp;
232 if (ioctl(fd, ISST_IF_MSR_COMMAND, &msr_cmds) == -1) {
233 perror("ISST_IF_MSR_COMMAND");
234 fprintf(outf, "Error: msr_cmd cpu:%d msr:%x read_write:%d\n",
238 *req_resp = msr_cmds.msr_cmd[0].data;
241 "msr_cmd response: cpu:%d msr:%x rd_write:%x resp:%llx %llx\n",
242 cpu, msr, write, *req_resp, msr_cmds.msr_cmd[0].data);
250 int isst_write_pm_config(struct isst_id *id, int cp_state)
252 unsigned int req, resp;
260 ret = isst_send_mbox_command(id->cpu, WRITE_PM_CONFIG, PM_FEATURE, 0, req,
265 debug_printf("cpu:%d WRITE_PM_CONFIG resp:%x\n", id->cpu, resp);
270 int isst_read_pm_config(struct isst_id *id, int *cp_state, int *cp_cap)
275 ret = isst_send_mbox_command(id->cpu, READ_PM_CONFIG, PM_FEATURE, 0, 0,
280 debug_printf("cpu:%d READ_PM_CONFIG resp:%x\n", id->cpu, resp);
282 *cp_state = resp & BIT(16);
283 *cp_cap = resp & BIT(0) ? 1 : 0;
288 int isst_get_ctdp_levels(struct isst_id *id, struct isst_pkg_ctdp *pkg_dev)
290 CHECK_CB(get_config_levels);
291 return isst_ops->get_config_levels(id, pkg_dev);
294 int isst_get_ctdp_control(struct isst_id *id, int config_index,
295 struct isst_pkg_ctdp_level_info *ctdp_level)
297 CHECK_CB(get_ctdp_control);
298 return isst_ops->get_ctdp_control(id, config_index, ctdp_level);
301 int isst_get_tdp_info(struct isst_id *id, int config_index,
302 struct isst_pkg_ctdp_level_info *ctdp_level)
304 CHECK_CB(get_tdp_info);
305 return isst_ops->get_tdp_info(id, config_index, ctdp_level);
308 int isst_get_pwr_info(struct isst_id *id, int config_index,
309 struct isst_pkg_ctdp_level_info *ctdp_level)
311 CHECK_CB(get_pwr_info);
312 return isst_ops->get_pwr_info(id, config_index, ctdp_level);
315 int isst_get_coremask_info(struct isst_id *id, int config_index,
316 struct isst_pkg_ctdp_level_info *ctdp_level)
318 CHECK_CB(get_coremask_info);
319 return isst_ops->get_coremask_info(id, config_index, ctdp_level);
322 int isst_get_get_trl_from_msr(struct isst_id *id, int *trl)
324 unsigned long long msr_trl;
327 ret = isst_send_msr_command(id->cpu, 0x1AD, 0, &msr_trl);
331 trl[0] = msr_trl & GENMASK(7, 0);
332 trl[1] = (msr_trl & GENMASK(15, 8)) >> 8;
333 trl[2] = (msr_trl & GENMASK(23, 16)) >> 16;
334 trl[3] = (msr_trl & GENMASK(31, 24)) >> 24;
335 trl[4] = (msr_trl & GENMASK(39, 32)) >> 32;
336 trl[5] = (msr_trl & GENMASK(47, 40)) >> 40;
337 trl[6] = (msr_trl & GENMASK(55, 48)) >> 48;
338 trl[7] = (msr_trl & GENMASK(63, 56)) >> 56;
343 int isst_get_get_trl(struct isst_id *id, int level, int avx_level, int *trl)
345 CHECK_CB(get_get_trl);
346 return isst_ops->get_get_trl(id, level, avx_level, trl);
349 int isst_get_trl_bucket_info(struct isst_id *id, unsigned long long *buckets_info)
353 debug_printf("cpu:%d bucket info via MSR\n", id->cpu);
357 ret = isst_send_msr_command(id->cpu, 0x1ae, 0, buckets_info);
361 debug_printf("cpu:%d bucket info via MSR successful 0x%llx\n", id->cpu,
367 int isst_set_tdp_level(struct isst_id *id, int tdp_level)
373 if (isst_get_config_tdp_lock_status(id)) {
374 isst_display_error_info_message(1, "TDP is locked", 0, 0);
379 ret = isst_send_mbox_command(id->cpu, CONFIG_TDP, CONFIG_TDP_SET_LEVEL, 0,
382 isst_display_error_info_message(1, "Set TDP level failed for level", 1, tdp_level);
389 int isst_get_pbf_info(struct isst_id *id, int level, struct isst_pbf_info *pbf_info)
391 struct isst_pkg_ctdp_level_info ctdp_level;
392 struct isst_pkg_ctdp pkg_dev;
393 int i, ret, max_punit_core, max_mask_index;
394 unsigned int req, resp;
396 ret = isst_get_ctdp_levels(id, &pkg_dev);
398 isst_display_error_info_message(1, "Failed to get number of levels", 0, 0);
402 if (level > pkg_dev.levels) {
403 isst_display_error_info_message(1, "Invalid level", 1, level);
407 ret = isst_get_ctdp_control(id, level, &ctdp_level);
411 if (!ctdp_level.pbf_support) {
412 isst_display_error_info_message(1, "base-freq feature is not present at this level", 1, level);
416 pbf_info->core_cpumask_size = alloc_cpu_set(&pbf_info->core_cpumask);
418 max_punit_core = get_max_punit_core_id(id);
419 max_mask_index = max_punit_core > 32 ? 2 : 1;
421 for (i = 0; i < max_mask_index; ++i) {
422 unsigned long long mask;
425 ret = isst_send_mbox_command(id->cpu, CONFIG_TDP,
426 CONFIG_TDP_PBF_GET_CORE_MASK_INFO,
427 0, (i << 8) | level, &resp);
432 "cpu:%d CONFIG_TDP_PBF_GET_CORE_MASK_INFO resp:%x\n",
435 mask = (unsigned long long)resp << (32 * i);
436 set_cpu_mask_from_punit_coremask(id, mask,
437 pbf_info->core_cpumask_size,
438 pbf_info->core_cpumask,
443 ret = isst_send_mbox_command(id->cpu, CONFIG_TDP,
444 CONFIG_TDP_PBF_GET_P1HI_P1LO_INFO, 0, req,
449 debug_printf("cpu:%d CONFIG_TDP_PBF_GET_P1HI_P1LO_INFO resp:%x\n", id->cpu,
452 pbf_info->p1_low = resp & 0xff;
453 pbf_info->p1_high = (resp & GENMASK(15, 8)) >> 8;
456 ret = isst_send_mbox_command(
457 id->cpu, CONFIG_TDP, CONFIG_TDP_PBF_GET_TDP_INFO, 0, req, &resp);
461 debug_printf("cpu:%d CONFIG_TDP_PBF_GET_TDP_INFO resp:%x\n", id->cpu, resp);
463 pbf_info->tdp = resp & 0xffff;
466 ret = isst_send_mbox_command(
467 id->cpu, CONFIG_TDP, CONFIG_TDP_PBF_GET_TJ_MAX_INFO, 0, req, &resp);
471 debug_printf("cpu:%d CONFIG_TDP_PBF_GET_TJ_MAX_INFO resp:%x\n", id->cpu,
473 pbf_info->t_control = (resp >> 8) & 0xff;
474 pbf_info->t_prochot = resp & 0xff;
479 void isst_get_pbf_info_complete(struct isst_pbf_info *pbf_info)
481 free_cpu_set(pbf_info->core_cpumask);
484 int isst_set_pbf_fact_status(struct isst_id *id, int pbf, int enable)
486 struct isst_pkg_ctdp pkg_dev;
487 struct isst_pkg_ctdp_level_info ctdp_level;
489 unsigned int req = 0, resp;
492 ret = isst_get_ctdp_levels(id, &pkg_dev);
494 debug_printf("cpu:%d No support for dynamic ISST\n", id->cpu);
496 current_level = pkg_dev.current_level;
498 ret = isst_get_ctdp_control(id, current_level, &ctdp_level);
503 if (ctdp_level.fact_enabled)
512 if (enable && !ctdp_level.sst_cp_enabled)
513 isst_display_error_info_message(0, "Make sure to execute before: core-power enable", 0, 0);
515 if (ctdp_level.pbf_enabled)
524 ret = isst_send_mbox_command(id->cpu, CONFIG_TDP,
525 CONFIG_TDP_SET_TDP_CONTROL, 0, req, &resp);
529 debug_printf("cpu:%d CONFIG_TDP_SET_TDP_CONTROL pbf/fact:%d req:%x\n",
535 int isst_get_fact_bucket_info(struct isst_id *id, int level,
536 struct isst_fact_bucket_info *bucket_info)
541 for (i = 0; i < 2; ++i) {
544 ret = isst_send_mbox_command(
546 CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_NUMCORES, 0,
547 (i << 8) | level, &resp);
552 "cpu:%d CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_NUMCORES index:%d level:%d resp:%x\n",
553 id->cpu, i, level, resp);
555 for (j = 0; j < 4; ++j) {
556 bucket_info[j + (i * 4)].hp_cores =
557 (resp >> (j * 8)) & 0xff;
561 for (k = 0; k < 3; ++k) {
562 for (i = 0; i < 2; ++i) {
565 ret = isst_send_mbox_command(
567 CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_RATIOS, 0,
568 (k << 16) | (i << 8) | level, &resp);
573 "cpu:%d CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_RATIOS index:%d level:%d avx:%d resp:%x\n",
574 id->cpu, i, level, k, resp);
576 for (j = 0; j < 4; ++j) {
577 bucket_info[j + (i * 4)].hp_ratios[k] =
578 (resp >> (j * 8)) & 0xff;
586 int isst_get_fact_info(struct isst_id *id, int level, int fact_bucket, struct isst_fact_info *fact_info)
588 struct isst_pkg_ctdp_level_info ctdp_level;
589 struct isst_pkg_ctdp pkg_dev;
593 ret = isst_get_ctdp_levels(id, &pkg_dev);
595 isst_display_error_info_message(1, "Failed to get number of levels", 0, 0);
599 if (level > pkg_dev.levels) {
600 isst_display_error_info_message(1, "Invalid level", 1, level);
604 ret = isst_get_ctdp_control(id, level, &ctdp_level);
608 if (!ctdp_level.fact_support) {
609 isst_display_error_info_message(1, "turbo-freq feature is not present at this level", 1, level);
613 ret = isst_send_mbox_command(id->cpu, CONFIG_TDP,
614 CONFIG_TDP_GET_FACT_LP_CLIPPING_RATIO, 0,
619 debug_printf("cpu:%d CONFIG_TDP_GET_FACT_LP_CLIPPING_RATIO resp:%x\n",
622 fact_info->lp_ratios[0] = resp & 0xff;
623 fact_info->lp_ratios[1] = (resp >> 8) & 0xff;
624 fact_info->lp_ratios[2] = (resp >> 16) & 0xff;
626 ret = isst_get_fact_bucket_info(id, level, fact_info->bucket_info);
631 for (j = 0; j < ISST_FACT_MAX_BUCKETS; ++j) {
632 if (fact_bucket != 0xff && fact_bucket != j)
635 if (!fact_info->bucket_info[j].hp_cores)
641 isst_display_error_info_message(1, "Invalid bucket", 0, 0);
648 int isst_get_trl(struct isst_id *id, unsigned long long *trl)
652 ret = isst_send_msr_command(id->cpu, 0x1AD, 0, trl);
659 int isst_set_trl(struct isst_id *id, unsigned long long trl)
664 trl = 0xFFFFFFFFFFFFFFFFULL;
666 ret = isst_send_msr_command(id->cpu, 0x1AD, 1, &trl);
673 int isst_set_trl_from_current_tdp(struct isst_id *id, unsigned long long trl)
675 unsigned long long msr_trl;
681 struct isst_pkg_ctdp pkg_dev;
685 ret = isst_get_ctdp_levels(id, &pkg_dev);
689 ret = isst_get_get_trl(id, pkg_dev.current_level, 0, trl);
694 for (i = 0; i < 8; ++i) {
695 unsigned long long _trl = trl[i];
697 msr_trl |= (_trl << (i * 8));
700 ret = isst_send_msr_command(id->cpu, 0x1AD, 1, &msr_trl);
707 /* Return 1 if locked */
708 int isst_get_config_tdp_lock_status(struct isst_id *id)
710 unsigned long long tdp_control = 0;
713 ret = isst_send_msr_command(id->cpu, 0x64b, 0, &tdp_control);
717 ret = !!(tdp_control & BIT(31));
722 void isst_get_process_ctdp_complete(struct isst_id *id, struct isst_pkg_ctdp *pkg_dev)
726 if (!pkg_dev->processed)
729 for (i = 0; i < pkg_dev->levels; ++i) {
730 struct isst_pkg_ctdp_level_info *ctdp_level;
732 ctdp_level = &pkg_dev->ctdp_level[i];
733 if (ctdp_level->pbf_support)
734 free_cpu_set(ctdp_level->pbf_info.core_cpumask);
735 free_cpu_set(ctdp_level->core_cpumask);
739 void isst_get_uncore_p0_p1_info(struct isst_id *id, int config_index,
740 struct isst_pkg_ctdp_level_info *ctdp_level)
745 ctdp_level->uncore_pm = 0;
746 ctdp_level->uncore_p0 = 0;
747 ctdp_level->uncore_p1 = 0;
749 ret = isst_send_mbox_command(id->cpu, CONFIG_TDP,
750 CONFIG_TDP_GET_RATIO_INFO, 0,
751 (BIT(16) | config_index) , &resp);
753 goto try_uncore_mbox;
756 ctdp_level->uncore_p0 = resp & GENMASK(7, 0);
757 ctdp_level->uncore_p1 = (resp & GENMASK(15, 8)) >> 8;
758 ctdp_level->uncore_pm = (resp & GENMASK(31, 24)) >> 24;
761 "cpu:%d ctdp:%d CONFIG_TDP_GET_RATIO_INFO resp:%x uncore p0:%d uncore p1:%d uncore pm:%d\n",
762 id->cpu, config_index, resp, ctdp_level->uncore_p0, ctdp_level->uncore_p1,
763 ctdp_level->uncore_pm);
768 ret = isst_send_mbox_command(id->cpu, CONFIG_TDP,
769 CONFIG_TDP_GET_UNCORE_P0_P1_INFO, 0,
770 config_index, &resp);
772 ctdp_level->uncore_p0 = 0;
773 ctdp_level->uncore_p1 = 0;
777 ctdp_level->uncore_p0 = resp & GENMASK(7, 0);
778 ctdp_level->uncore_p1 = (resp & GENMASK(15, 8)) >> 8;
780 "cpu:%d ctdp:%d CONFIG_TDP_GET_UNCORE_P0_P1_INFO resp:%x uncore p0:%d uncore p1:%d\n",
781 id->cpu, config_index, resp, ctdp_level->uncore_p0,
782 ctdp_level->uncore_p1);
785 void isst_get_p1_info(struct isst_id *id, int config_index,
786 struct isst_pkg_ctdp_level_info *ctdp_level)
790 ret = isst_send_mbox_command(id->cpu, CONFIG_TDP, CONFIG_TDP_GET_P1_INFO, 0,
791 config_index, &resp);
793 ctdp_level->sse_p1 = 0;
794 ctdp_level->avx2_p1 = 0;
795 ctdp_level->avx512_p1 = 0;
799 ctdp_level->sse_p1 = resp & GENMASK(7, 0);
800 ctdp_level->avx2_p1 = (resp & GENMASK(15, 8)) >> 8;
801 ctdp_level->avx512_p1 = (resp & GENMASK(23, 16)) >> 16;
803 "cpu:%d ctdp:%d CONFIG_TDP_GET_P1_INFO resp:%x sse_p1:%d avx2_p1:%d avx512_p1:%d\n",
804 id->cpu, config_index, resp, ctdp_level->sse_p1,
805 ctdp_level->avx2_p1, ctdp_level->avx512_p1);
808 void isst_get_uncore_mem_freq(struct isst_id *id, int config_index,
809 struct isst_pkg_ctdp_level_info *ctdp_level)
814 ret = isst_send_mbox_command(id->cpu, CONFIG_TDP, CONFIG_TDP_GET_MEM_FREQ,
815 0, config_index, &resp);
817 ctdp_level->mem_freq = 0;
821 ctdp_level->mem_freq = resp & GENMASK(7, 0);
822 if (is_spr_platform()) {
823 ctdp_level->mem_freq *= 200;
824 } else if (is_icx_platform()) {
825 if (ctdp_level->mem_freq < 7) {
826 ctdp_level->mem_freq = (12 - ctdp_level->mem_freq) * 133.33 * 2 * 10;
827 ctdp_level->mem_freq /= 10;
828 if (ctdp_level->mem_freq % 10 > 5)
829 ctdp_level->mem_freq++;
831 ctdp_level->mem_freq = 0;
834 ctdp_level->mem_freq = 0;
837 "cpu:%d ctdp:%d CONFIG_TDP_GET_MEM_FREQ resp:%x uncore mem_freq:%d\n",
838 id->cpu, config_index, resp, ctdp_level->mem_freq);
841 int isst_get_process_ctdp(struct isst_id *id, int tdp_level, struct isst_pkg_ctdp *pkg_dev)
843 int i, ret, valid = 0;
845 if (pkg_dev->processed)
848 ret = isst_get_ctdp_levels(id, pkg_dev);
852 debug_printf("cpu: %d ctdp enable:%d current level: %d levels:%d\n",
853 id->cpu, pkg_dev->enabled, pkg_dev->current_level,
856 if (tdp_level != 0xff && tdp_level > pkg_dev->levels) {
857 isst_display_error_info_message(1, "Invalid level", 0, 0);
861 if (!pkg_dev->enabled)
862 isst_display_error_info_message(0, "perf-profile feature is not supported, just base-config level 0 is valid", 0, 0);
864 for (i = 0; i <= pkg_dev->levels; ++i) {
865 struct isst_pkg_ctdp_level_info *ctdp_level;
866 int trl_max_levels = isst_get_trl_max_levels();
869 if (tdp_level != 0xff && i != tdp_level)
872 debug_printf("cpu:%d Get Information for TDP level:%d\n", id->cpu,
874 ctdp_level = &pkg_dev->ctdp_level[i];
876 ctdp_level->level = i;
877 ctdp_level->control_cpu = id->cpu;
878 ctdp_level->pkg_id = id->pkg;
879 ctdp_level->die_id = id->die;
881 ret = isst_get_ctdp_control(id, i, ctdp_level);
886 pkg_dev->processed = 1;
887 ctdp_level->processed = 1;
889 if (ctdp_level->pbf_support) {
890 ret = isst_get_pbf_info(id, i, &ctdp_level->pbf_info);
892 ctdp_level->pbf_found = 1;
895 if (ctdp_level->fact_support) {
896 ret = isst_get_fact_info(id, i, 0xff,
897 &ctdp_level->fact_info);
902 if (!pkg_dev->enabled && is_skx_based_platform()) {
905 freq = get_cpufreq_base_freq(id->cpu);
907 ctdp_level->sse_p1 = freq / 100000;
908 ctdp_level->tdp_ratio = ctdp_level->sse_p1;
911 isst_get_get_trl_from_msr(id, ctdp_level->trl_ratios[0]);
912 isst_get_trl_bucket_info(id, &ctdp_level->trl_cores);
916 ret = isst_get_tdp_info(id, i, ctdp_level);
920 ret = isst_get_pwr_info(id, i, ctdp_level);
924 ctdp_level->core_cpumask_size =
925 alloc_cpu_set(&ctdp_level->core_cpumask);
926 ret = isst_get_coremask_info(id, i, ctdp_level);
930 ret = isst_get_trl_bucket_info(id, &ctdp_level->trl_cores);
934 for (j = 0; j < trl_max_levels; j++) {
935 ret = isst_get_get_trl(id, i, j,
936 ctdp_level->trl_ratios[j]);
941 isst_get_uncore_p0_p1_info(id, i, ctdp_level);
942 isst_get_p1_info(id, i, ctdp_level);
943 isst_get_uncore_mem_freq(id, i, ctdp_level);
947 isst_display_error_info_message(0, "Invalid level, Can't get TDP control information at specified levels on cpu", 1, id->cpu);
952 int isst_clos_get_clos_information(struct isst_id *id, int *enable, int *type)
957 ret = isst_send_mbox_command(id->cpu, CONFIG_CLOS, CLOS_PM_QOS_CONFIG, 0, 0,
962 debug_printf("cpu:%d CLOS_PM_QOS_CONFIG resp:%x\n", id->cpu, resp);
977 int isst_pm_qos_config(struct isst_id *id, int enable_clos, int priority_type)
979 unsigned int req, resp;
983 struct isst_pkg_ctdp pkg_dev;
984 struct isst_pkg_ctdp_level_info ctdp_level;
986 ret = isst_get_ctdp_levels(id, &pkg_dev);
988 debug_printf("isst_get_ctdp_levels\n");
992 ret = isst_get_ctdp_control(id, pkg_dev.current_level,
997 if (ctdp_level.fact_enabled) {
998 isst_display_error_info_message(1, "Ignoring request, turbo-freq feature is still enabled", 0, 0);
1001 ret = isst_write_pm_config(id, 0);
1003 isst_display_error_info_message(0, "WRITE_PM_CONFIG command failed, ignoring error", 0, 0);
1005 ret = isst_write_pm_config(id, 1);
1007 isst_display_error_info_message(0, "WRITE_PM_CONFIG command failed, ignoring error", 0, 0);
1010 ret = isst_send_mbox_command(id->cpu, CONFIG_CLOS, CLOS_PM_QOS_CONFIG, 0, 0,
1013 isst_display_error_info_message(1, "CLOS_PM_QOS_CONFIG command failed", 0, 0);
1017 debug_printf("cpu:%d CLOS_PM_QOS_CONFIG resp:%x\n", id->cpu, resp);
1024 req = req & ~BIT(1);
1026 if (priority_type > 1)
1027 isst_display_error_info_message(1, "Invalid priority type: Changing type to ordered", 0, 0);
1032 req = req & ~BIT(2);
1034 ret = isst_send_mbox_command(id->cpu, CONFIG_CLOS, CLOS_PM_QOS_CONFIG,
1035 BIT(MBOX_CMD_WRITE_BIT), req, &resp);
1039 debug_printf("cpu:%d CLOS_PM_QOS_CONFIG priority type:%d req:%x\n", id->cpu,
1040 priority_type, req);
1045 int isst_pm_get_clos(struct isst_id *id, int clos, struct isst_clos_config *clos_config)
1050 ret = isst_send_mbox_command(id->cpu, CONFIG_CLOS, CLOS_PM_CLOS, clos, 0,
1055 clos_config->epp = resp & 0x0f;
1056 clos_config->clos_prop_prio = (resp >> 4) & 0x0f;
1057 clos_config->clos_min = (resp >> 8) & 0xff;
1058 clos_config->clos_max = (resp >> 16) & 0xff;
1059 clos_config->clos_desired = (resp >> 24) & 0xff;
1064 int isst_set_clos(struct isst_id *id, int clos, struct isst_clos_config *clos_config)
1066 unsigned int req, resp;
1070 req = clos_config->epp & 0x0f;
1071 req |= (clos_config->clos_prop_prio & 0x0f) << 4;
1072 req |= (clos_config->clos_min & 0xff) << 8;
1073 req |= (clos_config->clos_max & 0xff) << 16;
1074 req |= (clos_config->clos_desired & 0xff) << 24;
1076 param = BIT(MBOX_CMD_WRITE_BIT) | clos;
1078 ret = isst_send_mbox_command(id->cpu, CONFIG_CLOS, CLOS_PM_CLOS, param, req,
1083 debug_printf("cpu:%d CLOS_PM_CLOS param:%x req:%x\n", id->cpu, param, req);
1088 int isst_clos_get_assoc_status(struct isst_id *id, int *clos_id)
1094 core_id = find_phy_core_num(id->cpu);
1097 ret = isst_send_mbox_command(id->cpu, CONFIG_CLOS, CLOS_PQR_ASSOC, param, 0,
1102 debug_printf("cpu:%d CLOS_PQR_ASSOC param:%x resp:%x\n", id->cpu, param,
1104 *clos_id = (resp >> 16) & 0x03;
1109 int isst_clos_associate(struct isst_id *id, int clos_id)
1111 unsigned int req, resp;
1115 req = (clos_id & 0x03) << 16;
1116 core_id = find_phy_core_num(id->cpu);
1117 param = BIT(MBOX_CMD_WRITE_BIT) | core_id;
1119 ret = isst_send_mbox_command(id->cpu, CONFIG_CLOS, CLOS_PQR_ASSOC, param,
1124 debug_printf("cpu:%d CLOS_PQR_ASSOC param:%x req:%x\n", id->cpu, param,