1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Speed Select -- Enumerate and control features
4 * Copyright (c) 2019 Intel Corporation.
10 static int mbox_retries = 3;
12 static struct isst_platform_ops *isst_ops;
14 #define CHECK_CB(_name) \
16 if (!isst_ops || !isst_ops->_name) { \
17 fprintf(stderr, "Invalid ops\n"); \
22 int isst_set_platform_ops(void)
24 isst_ops = mbox_get_platform_ops();
31 void isst_update_platform_param(enum isst_platform_param param, int value)
34 case ISST_PARAM_MBOX_DELAY:
37 case ISST_PARAM_MBOX_RETRIES:
45 int isst_get_disp_freq_multiplier(void)
47 CHECK_CB(get_disp_freq_multiplier);
48 return isst_ops->get_disp_freq_multiplier();
51 int isst_get_trl_max_levels(void)
53 CHECK_CB(get_trl_max_levels);
54 return isst_ops->get_trl_max_levels();
57 char *isst_get_trl_level_name(int level)
59 CHECK_CB(get_trl_level_name);
60 return isst_ops->get_trl_level_name(level);
63 int isst_is_punit_valid(struct isst_id *id)
65 CHECK_CB(is_punit_valid);
66 return isst_ops->is_punit_valid(id);
69 static int isst_send_mmio_command(unsigned int cpu, unsigned int reg, int write,
72 struct isst_if_io_regs io_regs;
73 const char *pathname = "/dev/isst_interface";
75 FILE *outf = get_output_file();
78 debug_printf("mmio_cmd cpu:%d reg:%d write:%d\n", cpu, reg, write);
80 fd = open(pathname, O_RDWR);
82 err(-1, "%s open failed", pathname);
84 io_regs.req_count = 1;
85 io_regs.io_reg[0].logical_cpu = cpu;
86 io_regs.io_reg[0].reg = reg;
89 io_regs.io_reg[0].read_write = 1;
90 io_regs.io_reg[0].value = *value;
92 io_regs.io_reg[0].read_write = 0;
95 if (ioctl(fd, cmd, &io_regs) == -1) {
96 if (errno == ENOTTY) {
97 perror("ISST_IF_IO_COMMAND\n");
98 fprintf(stderr, "Check presence of kernel modules: isst_if_mmio\n");
101 fprintf(outf, "Error: mmio_cmd cpu:%d reg:%x read_write:%x\n",
105 *value = io_regs.io_reg[0].value;
108 "mmio_cmd response: cpu:%d reg:%x rd_write:%x resp:%x\n",
109 cpu, reg, write, *value);
117 int isst_send_mbox_command(unsigned int cpu, unsigned char command,
118 unsigned char sub_command, unsigned int parameter,
119 unsigned int req_data, unsigned int *resp)
121 const char *pathname = "/dev/isst_interface";
123 struct isst_if_mbox_cmds mbox_cmds = { 0 };
126 "mbox_send: cpu:%d command:%x sub_command:%x parameter:%x req_data:%x\n",
127 cpu, command, sub_command, parameter, req_data);
129 if (!is_skx_based_platform() && command == CONFIG_CLOS &&
130 sub_command != CLOS_PM_QOS_CONFIG) {
133 int clos_id, core_id, ret = 0;
135 debug_printf("CPU %d\n", cpu);
137 if (parameter & BIT(MBOX_CMD_WRITE_BIT)) {
142 switch (sub_command) {
144 core_id = parameter & 0xff;
145 ret = isst_send_mmio_command(
146 cpu, PQR_ASSOC_OFFSET + core_id * 4, write,
152 clos_id = parameter & 0x03;
153 ret = isst_send_mmio_command(
154 cpu, PM_CLOS_OFFSET + clos_id * 4, write,
167 mbox_cmds.cmd_count = 1;
168 mbox_cmds.mbox_cmd[0].logical_cpu = cpu;
169 mbox_cmds.mbox_cmd[0].command = command;
170 mbox_cmds.mbox_cmd[0].sub_command = sub_command;
171 mbox_cmds.mbox_cmd[0].parameter = parameter;
172 mbox_cmds.mbox_cmd[0].req_data = req_data;
175 usleep(mbox_delay * 1000);
177 fd = open(pathname, O_RDWR);
179 err(-1, "%s open failed", pathname);
181 retry = mbox_retries;
184 if (ioctl(fd, ISST_IF_MBOX_COMMAND, &mbox_cmds) == -1) {
185 if (errno == ENOTTY) {
186 perror("ISST_IF_MBOX_COMMAND\n");
187 fprintf(stderr, "Check presence of kernel modules: isst_if_mbox_pci or isst_if_mbox_msr\n");
191 "Error: mbox_cmd cpu:%d command:%x sub_command:%x parameter:%x req_data:%x errorno:%d\n",
192 cpu, command, sub_command, parameter, req_data, errno);
195 *resp = mbox_cmds.mbox_cmd[0].resp_data;
197 "mbox_cmd response: cpu:%d command:%x sub_command:%x parameter:%x req_data:%x resp:%x\n",
198 cpu, command, sub_command, parameter, req_data, *resp);
206 debug_printf("Failed mbox command even after retries\n");
213 int isst_send_msr_command(unsigned int cpu, unsigned int msr, int write,
214 unsigned long long *req_resp)
216 struct isst_if_msr_cmds msr_cmds;
217 const char *pathname = "/dev/isst_interface";
218 FILE *outf = get_output_file();
221 fd = open(pathname, O_RDWR);
223 err(-1, "%s open failed", pathname);
225 msr_cmds.cmd_count = 1;
226 msr_cmds.msr_cmd[0].logical_cpu = cpu;
227 msr_cmds.msr_cmd[0].msr = msr;
228 msr_cmds.msr_cmd[0].read_write = write;
230 msr_cmds.msr_cmd[0].data = *req_resp;
232 if (ioctl(fd, ISST_IF_MSR_COMMAND, &msr_cmds) == -1) {
233 perror("ISST_IF_MSR_COMMAND");
234 fprintf(outf, "Error: msr_cmd cpu:%d msr:%x read_write:%d\n",
238 *req_resp = msr_cmds.msr_cmd[0].data;
241 "msr_cmd response: cpu:%d msr:%x rd_write:%x resp:%llx %llx\n",
242 cpu, msr, write, *req_resp, msr_cmds.msr_cmd[0].data);
250 int isst_read_pm_config(struct isst_id *id, int *cp_state, int *cp_cap)
255 ret = isst_send_mbox_command(id->cpu, READ_PM_CONFIG, PM_FEATURE, 0, 0,
260 debug_printf("cpu:%d READ_PM_CONFIG resp:%x\n", id->cpu, resp);
262 *cp_state = resp & BIT(16);
263 *cp_cap = resp & BIT(0) ? 1 : 0;
268 int isst_get_ctdp_levels(struct isst_id *id, struct isst_pkg_ctdp *pkg_dev)
270 CHECK_CB(get_config_levels);
271 return isst_ops->get_config_levels(id, pkg_dev);
274 int isst_get_ctdp_control(struct isst_id *id, int config_index,
275 struct isst_pkg_ctdp_level_info *ctdp_level)
277 CHECK_CB(get_ctdp_control);
278 return isst_ops->get_ctdp_control(id, config_index, ctdp_level);
281 int isst_get_tdp_info(struct isst_id *id, int config_index,
282 struct isst_pkg_ctdp_level_info *ctdp_level)
284 CHECK_CB(get_tdp_info);
285 return isst_ops->get_tdp_info(id, config_index, ctdp_level);
288 int isst_get_pwr_info(struct isst_id *id, int config_index,
289 struct isst_pkg_ctdp_level_info *ctdp_level)
291 CHECK_CB(get_pwr_info);
292 return isst_ops->get_pwr_info(id, config_index, ctdp_level);
295 int isst_get_coremask_info(struct isst_id *id, int config_index,
296 struct isst_pkg_ctdp_level_info *ctdp_level)
298 CHECK_CB(get_coremask_info);
299 return isst_ops->get_coremask_info(id, config_index, ctdp_level);
302 int isst_get_get_trl_from_msr(struct isst_id *id, int *trl)
304 unsigned long long msr_trl;
307 ret = isst_send_msr_command(id->cpu, 0x1AD, 0, &msr_trl);
311 trl[0] = msr_trl & GENMASK(7, 0);
312 trl[1] = (msr_trl & GENMASK(15, 8)) >> 8;
313 trl[2] = (msr_trl & GENMASK(23, 16)) >> 16;
314 trl[3] = (msr_trl & GENMASK(31, 24)) >> 24;
315 trl[4] = (msr_trl & GENMASK(39, 32)) >> 32;
316 trl[5] = (msr_trl & GENMASK(47, 40)) >> 40;
317 trl[6] = (msr_trl & GENMASK(55, 48)) >> 48;
318 trl[7] = (msr_trl & GENMASK(63, 56)) >> 56;
323 int isst_get_get_trl(struct isst_id *id, int level, int avx_level, int *trl)
325 CHECK_CB(get_get_trl);
326 return isst_ops->get_get_trl(id, level, avx_level, trl);
329 int isst_get_get_trls(struct isst_id *id, int level, struct isst_pkg_ctdp_level_info *ctdp_level)
331 CHECK_CB(get_get_trls);
332 return isst_ops->get_get_trls(id, level, ctdp_level);
335 int isst_get_trl_bucket_info(struct isst_id *id, int level, unsigned long long *buckets_info)
337 CHECK_CB(get_trl_bucket_info);
338 return isst_ops->get_trl_bucket_info(id, level, buckets_info);
341 int isst_set_tdp_level(struct isst_id *id, int tdp_level)
343 CHECK_CB(set_tdp_level);
344 return isst_ops->set_tdp_level(id, tdp_level);
347 int isst_get_pbf_info(struct isst_id *id, int level, struct isst_pbf_info *pbf_info)
349 struct isst_pkg_ctdp_level_info ctdp_level;
350 struct isst_pkg_ctdp pkg_dev;
353 ret = isst_get_ctdp_levels(id, &pkg_dev);
355 isst_display_error_info_message(1, "Failed to get number of levels", 0, 0);
359 if (level > pkg_dev.levels) {
360 isst_display_error_info_message(1, "Invalid level", 1, level);
364 ret = isst_get_ctdp_control(id, level, &ctdp_level);
368 if (!ctdp_level.pbf_support) {
369 isst_display_error_info_message(1, "base-freq feature is not present at this level", 1, level);
373 pbf_info->core_cpumask_size = alloc_cpu_set(&pbf_info->core_cpumask);
375 CHECK_CB(get_pbf_info);
376 return isst_ops->get_pbf_info(id, level, pbf_info);
379 int isst_set_pbf_fact_status(struct isst_id *id, int pbf, int enable)
381 CHECK_CB(set_pbf_fact_status);
382 return isst_ops->set_pbf_fact_status(id, pbf, enable);
387 int isst_get_fact_info(struct isst_id *id, int level, int fact_bucket, struct isst_fact_info *fact_info)
389 struct isst_pkg_ctdp_level_info ctdp_level;
390 struct isst_pkg_ctdp pkg_dev;
393 ret = isst_get_ctdp_levels(id, &pkg_dev);
395 isst_display_error_info_message(1, "Failed to get number of levels", 0, 0);
399 if (level > pkg_dev.levels) {
400 isst_display_error_info_message(1, "Invalid level", 1, level);
404 ret = isst_get_ctdp_control(id, level, &ctdp_level);
408 if (!ctdp_level.fact_support) {
409 isst_display_error_info_message(1, "turbo-freq feature is not present at this level", 1, level);
412 CHECK_CB(get_fact_info);
413 return isst_ops->get_fact_info(id, level, fact_bucket, fact_info);
416 int isst_get_trl(struct isst_id *id, unsigned long long *trl)
420 ret = isst_send_msr_command(id->cpu, 0x1AD, 0, trl);
427 int isst_set_trl(struct isst_id *id, unsigned long long trl)
432 trl = 0xFFFFFFFFFFFFFFFFULL;
434 ret = isst_send_msr_command(id->cpu, 0x1AD, 1, &trl);
441 int isst_set_trl_from_current_tdp(struct isst_id *id, unsigned long long trl)
443 unsigned long long msr_trl;
449 struct isst_pkg_ctdp pkg_dev;
453 ret = isst_get_ctdp_levels(id, &pkg_dev);
457 ret = isst_get_get_trl(id, pkg_dev.current_level, 0, trl);
462 for (i = 0; i < 8; ++i) {
463 unsigned long long _trl = trl[i];
465 msr_trl |= (_trl << (i * 8));
468 ret = isst_send_msr_command(id->cpu, 0x1AD, 1, &msr_trl);
475 /* Return 1 if locked */
476 int isst_get_config_tdp_lock_status(struct isst_id *id)
478 unsigned long long tdp_control = 0;
481 ret = isst_send_msr_command(id->cpu, 0x64b, 0, &tdp_control);
485 ret = !!(tdp_control & BIT(31));
490 void isst_get_process_ctdp_complete(struct isst_id *id, struct isst_pkg_ctdp *pkg_dev)
494 if (!pkg_dev->processed)
497 for (i = 0; i < pkg_dev->levels; ++i) {
498 struct isst_pkg_ctdp_level_info *ctdp_level;
500 ctdp_level = &pkg_dev->ctdp_level[i];
501 if (ctdp_level->pbf_support)
502 free_cpu_set(ctdp_level->pbf_info.core_cpumask);
503 free_cpu_set(ctdp_level->core_cpumask);
507 void isst_get_uncore_p0_p1_info(struct isst_id *id, int config_index,
508 struct isst_pkg_ctdp_level_info *ctdp_level)
510 CHECK_CB(get_uncore_p0_p1_info);
511 return isst_ops->get_uncore_p0_p1_info(id, config_index, ctdp_level);
514 int isst_get_process_ctdp(struct isst_id *id, int tdp_level, struct isst_pkg_ctdp *pkg_dev)
516 int i, ret, valid = 0;
518 if (pkg_dev->processed)
521 ret = isst_get_ctdp_levels(id, pkg_dev);
525 debug_printf("cpu: %d ctdp enable:%d current level: %d levels:%d\n",
526 id->cpu, pkg_dev->enabled, pkg_dev->current_level,
529 if (tdp_level != 0xff && tdp_level > pkg_dev->levels) {
530 isst_display_error_info_message(1, "Invalid level", 0, 0);
534 if (!pkg_dev->enabled)
535 isst_display_error_info_message(0, "perf-profile feature is not supported, just base-config level 0 is valid", 0, 0);
537 for (i = 0; i <= pkg_dev->levels; ++i) {
538 struct isst_pkg_ctdp_level_info *ctdp_level;
540 if (tdp_level != 0xff && i != tdp_level)
543 debug_printf("cpu:%d Get Information for TDP level:%d\n", id->cpu,
545 ctdp_level = &pkg_dev->ctdp_level[i];
547 ctdp_level->level = i;
548 ctdp_level->control_cpu = id->cpu;
549 ctdp_level->pkg_id = id->pkg;
550 ctdp_level->die_id = id->die;
552 ret = isst_get_ctdp_control(id, i, ctdp_level);
557 pkg_dev->processed = 1;
558 ctdp_level->processed = 1;
560 if (ctdp_level->pbf_support) {
561 ret = isst_get_pbf_info(id, i, &ctdp_level->pbf_info);
563 ctdp_level->pbf_found = 1;
566 if (ctdp_level->fact_support) {
567 ret = isst_get_fact_info(id, i, 0xff,
568 &ctdp_level->fact_info);
573 if (!pkg_dev->enabled && is_skx_based_platform()) {
576 freq = get_cpufreq_base_freq(id->cpu);
578 ctdp_level->sse_p1 = freq / 100000;
579 ctdp_level->tdp_ratio = ctdp_level->sse_p1;
582 isst_get_get_trl_from_msr(id, ctdp_level->trl_ratios[0]);
583 isst_get_trl_bucket_info(id, i, &ctdp_level->trl_cores);
587 ret = isst_get_tdp_info(id, i, ctdp_level);
591 ret = isst_get_pwr_info(id, i, ctdp_level);
595 ctdp_level->core_cpumask_size =
596 alloc_cpu_set(&ctdp_level->core_cpumask);
597 ret = isst_get_coremask_info(id, i, ctdp_level);
601 ret = isst_get_trl_bucket_info(id, i, &ctdp_level->trl_cores);
605 ret = isst_get_get_trls(id, i, ctdp_level);
611 isst_display_error_info_message(0, "Invalid level, Can't get TDP control information at specified levels on cpu", 1, id->cpu);
616 int isst_clos_get_clos_information(struct isst_id *id, int *enable, int *type)
618 CHECK_CB(get_clos_information);
619 return isst_ops->get_clos_information(id, enable, type);
622 int isst_pm_qos_config(struct isst_id *id, int enable_clos, int priority_type)
624 CHECK_CB(pm_qos_config);
625 return isst_ops->pm_qos_config(id, enable_clos, priority_type);
628 int isst_pm_get_clos(struct isst_id *id, int clos, struct isst_clos_config *clos_config)
633 ret = isst_send_mbox_command(id->cpu, CONFIG_CLOS, CLOS_PM_CLOS, clos, 0,
638 clos_config->epp = resp & 0x0f;
639 clos_config->clos_prop_prio = (resp >> 4) & 0x0f;
640 clos_config->clos_min = (resp >> 8) & 0xff;
641 clos_config->clos_max = (resp >> 16) & 0xff;
642 clos_config->clos_desired = (resp >> 24) & 0xff;
647 int isst_set_clos(struct isst_id *id, int clos, struct isst_clos_config *clos_config)
649 unsigned int req, resp;
653 req = clos_config->epp & 0x0f;
654 req |= (clos_config->clos_prop_prio & 0x0f) << 4;
655 req |= (clos_config->clos_min & 0xff) << 8;
656 req |= (clos_config->clos_max & 0xff) << 16;
657 req |= (clos_config->clos_desired & 0xff) << 24;
659 param = BIT(MBOX_CMD_WRITE_BIT) | clos;
661 ret = isst_send_mbox_command(id->cpu, CONFIG_CLOS, CLOS_PM_CLOS, param, req,
666 debug_printf("cpu:%d CLOS_PM_CLOS param:%x req:%x\n", id->cpu, param, req);
671 int isst_clos_get_assoc_status(struct isst_id *id, int *clos_id)
677 core_id = find_phy_core_num(id->cpu);
680 ret = isst_send_mbox_command(id->cpu, CONFIG_CLOS, CLOS_PQR_ASSOC, param, 0,
685 debug_printf("cpu:%d CLOS_PQR_ASSOC param:%x resp:%x\n", id->cpu, param,
687 *clos_id = (resp >> 16) & 0x03;
692 int isst_clos_associate(struct isst_id *id, int clos_id)
694 unsigned int req, resp;
698 req = (clos_id & 0x03) << 16;
699 core_id = find_phy_core_num(id->cpu);
700 param = BIT(MBOX_CMD_WRITE_BIT) | core_id;
702 ret = isst_send_mbox_command(id->cpu, CONFIG_CLOS, CLOS_PQR_ASSOC, param,
707 debug_printf("cpu:%d CLOS_PQR_ASSOC param:%x req:%x\n", id->cpu, param,