4 #include <asm/unistd.h>
7 #define mb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
8 #define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
9 #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
10 #define cpu_relax() asm volatile("rep; nop" ::: "memory");
11 #define CPUINFO_PROC "model name"
12 #ifndef __NR_perf_event_open
13 # define __NR_perf_event_open 336
17 #if defined(__x86_64__)
18 #define mb() asm volatile("mfence" ::: "memory")
19 #define wmb() asm volatile("sfence" ::: "memory")
20 #define rmb() asm volatile("lfence" ::: "memory")
21 #define cpu_relax() asm volatile("rep; nop" ::: "memory");
22 #define CPUINFO_PROC "model name"
23 #ifndef __NR_perf_event_open
24 # define __NR_perf_event_open 298
29 #include "../../arch/powerpc/include/uapi/asm/unistd.h"
30 #define mb() asm volatile ("sync" ::: "memory")
31 #define wmb() asm volatile ("sync" ::: "memory")
32 #define rmb() asm volatile ("sync" ::: "memory")
33 #define CPUINFO_PROC "cpu"
37 #define mb() asm volatile("bcr 15,0" ::: "memory")
38 #define wmb() asm volatile("bcr 15,0" ::: "memory")
39 #define rmb() asm volatile("bcr 15,0" ::: "memory")
43 #if defined(__SH4A__) || defined(__SH5__)
44 # define mb() asm volatile("synco" ::: "memory")
45 # define wmb() asm volatile("synco" ::: "memory")
46 # define rmb() asm volatile("synco" ::: "memory")
48 # define mb() asm volatile("" ::: "memory")
49 # define wmb() asm volatile("" ::: "memory")
50 # define rmb() asm volatile("" ::: "memory")
52 #define CPUINFO_PROC "cpu type"
56 #define mb() asm volatile("" ::: "memory")
57 #define wmb() asm volatile("" ::: "memory")
58 #define rmb() asm volatile("" ::: "memory")
59 #define CPUINFO_PROC "cpu"
64 #define mb() asm volatile("ba,pt %%xcc, 1f\n" \
65 "membar #StoreLoad\n" \
68 #define mb() asm volatile("":::"memory")
70 #define wmb() asm volatile("":::"memory")
71 #define rmb() asm volatile("":::"memory")
72 #define CPUINFO_PROC "cpu"
76 #define mb() asm volatile("mb" ::: "memory")
77 #define wmb() asm volatile("wmb" ::: "memory")
78 #define rmb() asm volatile("mb" ::: "memory")
79 #define CPUINFO_PROC "cpu model"
83 #define mb() asm volatile ("mf" ::: "memory")
84 #define wmb() asm volatile ("mf" ::: "memory")
85 #define rmb() asm volatile ("mf" ::: "memory")
86 #define cpu_relax() asm volatile ("hint @pause" ::: "memory")
87 #define CPUINFO_PROC "model name"
92 * Use the __kuser_memory_barrier helper in the CPU helper page. See
93 * arch/arm/kernel/entry-armv.S in the kernel source for details.
95 #define mb() ((void(*)(void))0xffff0fa0)()
96 #define wmb() ((void(*)(void))0xffff0fa0)()
97 #define rmb() ((void(*)(void))0xffff0fa0)()
98 #define CPUINFO_PROC "Processor"
102 #define mb() asm volatile("dmb ish" ::: "memory")
103 #define wmb() asm volatile("dmb ishld" ::: "memory")
104 #define rmb() asm volatile("dmb ishst" ::: "memory")
105 #define cpu_relax() asm volatile("yield" ::: "memory")
109 #define mb() asm volatile( \
118 #define CPUINFO_PROC "cpu model"
122 #define mb() asm volatile("" ::: "memory")
123 #define wmb() asm volatile("" ::: "memory")
124 #define rmb() asm volatile("" ::: "memory")
125 #define CPUINFO_PROC "Processor"
129 #define mb() asm volatile("" ::: "memory")
130 #define wmb() asm volatile("" ::: "memory")
131 #define rmb() asm volatile("" ::: "memory")
132 #define CPUINFO_PROC "CPU"
135 #define barrier() asm volatile ("" ::: "memory")
138 #define cpu_relax() barrier()
141 #define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
146 #include <sys/types.h>
147 #include <sys/syscall.h>
149 #include <linux/perf_event.h>
150 #include "util/types.h"
154 * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all
155 * counters in the current task.
157 #define PR_TASK_PERF_EVENTS_DISABLE 31
158 #define PR_TASK_PERF_EVENTS_ENABLE 32
161 # define NSEC_PER_SEC 1000000000ULL
163 #ifndef NSEC_PER_USEC
164 # define NSEC_PER_USEC 1000ULL
167 static inline unsigned long long rdclock(void)
171 clock_gettime(CLOCK_MONOTONIC, &ts);
172 return ts.tv_sec * 1000000000ULL + ts.tv_nsec;
176 * Pick up some kernel type conventions:
181 #define unlikely(x) __builtin_expect(!!(x), 0)
182 #define min(x, y) ({ \
183 typeof(x) _min1 = (x); \
184 typeof(y) _min2 = (y); \
185 (void) (&_min1 == &_min2); \
186 _min1 < _min2 ? _min1 : _min2; })
188 extern bool test_attr__enabled;
189 void test_attr__init(void);
190 void test_attr__open(struct perf_event_attr *attr, pid_t pid, int cpu,
191 int fd, int group_fd, unsigned long flags);
194 sys_perf_event_open(struct perf_event_attr *attr,
195 pid_t pid, int cpu, int group_fd,
200 fd = syscall(__NR_perf_event_open, attr, pid, cpu,
203 if (unlikely(test_attr__enabled))
204 test_attr__open(attr, pid, cpu, fd, group_fd, flags);
209 #define MAX_COUNTERS 256
210 #define MAX_NR_CPUS 256
212 struct ip_callchain {
217 struct branch_flags {
225 struct branch_entry {
228 struct branch_flags flags;
231 struct branch_stack {
233 struct branch_entry entries[0];
236 extern const char *input_name;
237 extern bool perf_host, perf_guest;
238 extern const char perf_version_string[];
240 void pthread__unblock_sigwinch(void);
242 #include "util/target.h"
244 enum perf_call_graph_mode {
251 struct target target;
265 unsigned int mmap_pages;
266 unsigned int user_freq;
268 u64 default_interval;
271 bool sample_transaction;
272 unsigned initial_delay;