ARM: davici_emac: Fix condition for number of phy detects
[platform/kernel/u-boot.git] / tools / kwbimage.h
1 /*
2  * (C) Copyright 2008
3  * Marvell Semiconductor <www.marvell.com>
4  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
5  *
6  * See file CREDITS for list of people who contributed to this
7  * project.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22  * MA 02111-1307 USA
23  */
24
25 #ifndef _KWBIMAGE_H_
26 #define _KWBIMAGE_H_
27
28 #include <stdint.h>
29
30 #define KWBIMAGE_MAX_CONFIG     ((0x1dc - 0x20)/sizeof(struct reg_config))
31 #define MAX_TEMPBUF_LEN         32
32
33 /* NAND ECC Mode */
34 #define IBR_HDR_ECC_DEFAULT             0x00
35 #define IBR_HDR_ECC_FORCED_HAMMING      0x01
36 #define IBR_HDR_ECC_FORCED_RS           0x02
37 #define IBR_HDR_ECC_DISABLED            0x03
38
39 /* Boot Type - block ID */
40 #define IBR_HDR_I2C_ID                  0x4D
41 #define IBR_HDR_SPI_ID                  0x5A
42 #define IBR_HDR_NAND_ID                 0x8B
43 #define IBR_HDR_SATA_ID                 0x78
44 #define IBR_HDR_PEX_ID                  0x9C
45 #define IBR_HDR_UART_ID                 0x69
46 #define IBR_DEF_ATTRIB                  0x00
47
48 enum kwbimage_cmd {
49         CMD_INVALID,
50         CMD_BOOT_FROM,
51         CMD_NAND_ECC_MODE,
52         CMD_NAND_PAGE_SIZE,
53         CMD_SATA_PIO_MODE,
54         CMD_DDR_INIT_DELAY,
55         CMD_DATA
56 };
57
58 enum kwbimage_cmd_types {
59         CFG_INVALID = -1,
60         CFG_COMMAND,
61         CFG_DATA0,
62         CFG_DATA1
63 };
64
65 /* typedefs */
66 typedef struct bhr_t {
67         uint8_t blockid;                /*0     */
68         uint8_t nandeccmode;            /*1     */
69         uint16_t nandpagesize;          /*2-3   */
70         uint32_t blocksize;             /*4-7   */
71         uint32_t rsvd1;                 /*8-11  */
72         uint32_t srcaddr;               /*12-15 */
73         uint32_t destaddr;              /*16-19 */
74         uint32_t execaddr;              /*20-23 */
75         uint8_t satapiomode;            /*24    */
76         uint8_t rsvd3;                  /*25    */
77         uint16_t ddrinitdelay;          /*26-27 */
78         uint16_t rsvd2;                 /*28-29 */
79         uint8_t ext;                    /*30    */
80         uint8_t checkSum;               /*31    */
81 } bhr_t, *pbhr_t;
82
83 struct reg_config {
84         uint32_t raddr;
85         uint32_t rdata;
86 };
87
88 typedef struct extbhr_t {
89         uint32_t dramregsoffs;
90         uint8_t rsrvd1[0x20 - sizeof(uint32_t)];
91         struct reg_config rcfg[KWBIMAGE_MAX_CONFIG];
92         uint8_t rsrvd2[7];
93         uint8_t checkSum;
94 } extbhr_t, *pextbhr_t;
95
96 struct kwb_header {
97         bhr_t kwb_hdr;
98         extbhr_t kwb_exthdr;
99 };
100
101 /*
102  * functions
103  */
104 void init_kwb_image_type (void);
105
106 #endif /* _KWBIMAGE_H_ */