1 // SPDX-License-Identifier: GPL-2.0+
3 * Image manipulator for Marvell SoCs
4 * supports Kirkwood, Dove, Armada 370, Armada XP, Armada 375, Armada 38x and
7 * (C) Copyright 2013 Thomas Petazzoni
8 * <thomas.petazzoni@free-electrons.com>
11 #define OPENSSL_API_COMPAT 0x10101000L
13 #include "imagetool.h"
20 #include <openssl/bn.h>
21 #include <openssl/rsa.h>
22 #include <openssl/pem.h>
23 #include <openssl/err.h>
24 #include <openssl/evp.h>
26 #if OPENSSL_VERSION_NUMBER < 0x10100000L || \
27 (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x2070000fL)
28 static void RSA_get0_key(const RSA *r,
29 const BIGNUM **n, const BIGNUM **e, const BIGNUM **d)
39 #elif !defined(LIBRESSL_VERSION_NUMBER)
40 void EVP_MD_CTX_cleanup(EVP_MD_CTX *ctx)
42 EVP_MD_CTX_reset(ctx);
46 static struct image_cfg_element *image_cfg;
48 static int verbose_mode;
62 struct boot_mode boot_modes[] = {
63 { IBR_HDR_I2C_ID, "i2c" },
64 { IBR_HDR_SPI_ID, "spi" },
65 { IBR_HDR_NAND_ID, "nand" },
66 { IBR_HDR_SATA_ID, "sata" },
67 { IBR_HDR_PEX_ID, "pex" },
68 { IBR_HDR_UART_ID, "uart" },
69 { IBR_HDR_SDIO_ID, "sdio" },
73 struct nand_ecc_mode {
78 struct nand_ecc_mode nand_ecc_modes[] = {
79 { IBR_HDR_ECC_DEFAULT, "default" },
80 { IBR_HDR_ECC_FORCED_HAMMING, "hamming" },
81 { IBR_HDR_ECC_FORCED_RS, "rs" },
82 { IBR_HDR_ECC_DISABLED, "disabled" },
86 /* Used to identify an undefined execution or destination address */
87 #define ADDR_INVALID ((uint32_t)-1)
89 #define BINARY_MAX_ARGS 255
91 /* In-memory representation of a line of the configuration file */
94 IMAGE_CFG_VERSION = 0x1,
99 IMAGE_CFG_NAND_BADBLK_LOCATION,
100 IMAGE_CFG_NAND_ECC_MODE,
101 IMAGE_CFG_NAND_PAGESZ,
104 IMAGE_CFG_DATA_DELAY,
112 IMAGE_CFG_JTAG_DELAY,
115 IMAGE_CFG_SEC_COMMON_IMG,
116 IMAGE_CFG_SEC_SPECIALIZED_IMG,
117 IMAGE_CFG_SEC_BOOT_DEV,
118 IMAGE_CFG_SEC_FUSE_DUMP,
123 static const char * const id_strs[] = {
124 [IMAGE_CFG_VERSION] = "VERSION",
125 [IMAGE_CFG_BOOT_FROM] = "BOOT_FROM",
126 [IMAGE_CFG_DEST_ADDR] = "DEST_ADDR",
127 [IMAGE_CFG_EXEC_ADDR] = "EXEC_ADDR",
128 [IMAGE_CFG_NAND_BLKSZ] = "NAND_BLKSZ",
129 [IMAGE_CFG_NAND_BADBLK_LOCATION] = "NAND_BADBLK_LOCATION",
130 [IMAGE_CFG_NAND_ECC_MODE] = "NAND_ECC_MODE",
131 [IMAGE_CFG_NAND_PAGESZ] = "NAND_PAGE_SIZE",
132 [IMAGE_CFG_BINARY] = "BINARY",
133 [IMAGE_CFG_DATA] = "DATA",
134 [IMAGE_CFG_DATA_DELAY] = "DATA_DELAY",
135 [IMAGE_CFG_BAUDRATE] = "BAUDRATE",
136 [IMAGE_CFG_UART_PORT] = "UART_PORT",
137 [IMAGE_CFG_UART_MPP] = "UART_MPP",
138 [IMAGE_CFG_DEBUG] = "DEBUG",
139 [IMAGE_CFG_KAK] = "KAK",
140 [IMAGE_CFG_CSK] = "CSK",
141 [IMAGE_CFG_CSK_INDEX] = "CSK_INDEX",
142 [IMAGE_CFG_JTAG_DELAY] = "JTAG_DELAY",
143 [IMAGE_CFG_BOX_ID] = "BOX_ID",
144 [IMAGE_CFG_FLASH_ID] = "FLASH_ID",
145 [IMAGE_CFG_SEC_COMMON_IMG] = "SEC_COMMON_IMG",
146 [IMAGE_CFG_SEC_SPECIALIZED_IMG] = "SEC_SPECIALIZED_IMG",
147 [IMAGE_CFG_SEC_BOOT_DEV] = "SEC_BOOT_DEV",
148 [IMAGE_CFG_SEC_FUSE_DUMP] = "SEC_FUSE_DUMP"
151 struct image_cfg_element {
152 enum image_cfg_type type;
154 unsigned int version;
155 unsigned int bootfrom;
158 unsigned int args[BINARY_MAX_ARGS];
161 unsigned int dstaddr;
162 unsigned int execaddr;
163 unsigned int nandblksz;
164 unsigned int nandbadblklocation;
165 unsigned int nandeccmode;
166 unsigned int nandpagesz;
167 struct ext_hdr_v0_reg regdata;
168 unsigned int regdata_delay;
169 unsigned int baudrate;
170 unsigned int uart_port;
171 unsigned int uart_mpp;
173 const char *key_name;
178 bool sec_specialized_img;
179 unsigned int sec_boot_dev;
184 #define IMAGE_CFG_ELEMENT_MAX 256
187 * Utility functions to manipulate boot mode and ecc modes (convert
188 * them back and forth between description strings and the
189 * corresponding numerical identifiers).
192 static const char *image_boot_mode_name(unsigned int id)
196 for (i = 0; boot_modes[i].name; i++)
197 if (boot_modes[i].id == id)
198 return boot_modes[i].name;
202 static int image_boot_mode_id(const char *boot_mode_name)
206 for (i = 0; boot_modes[i].name; i++)
207 if (!strcmp(boot_modes[i].name, boot_mode_name))
208 return boot_modes[i].id;
213 static int image_nand_ecc_mode_id(const char *nand_ecc_mode_name)
217 for (i = 0; nand_ecc_modes[i].name; i++)
218 if (!strcmp(nand_ecc_modes[i].name, nand_ecc_mode_name))
219 return nand_ecc_modes[i].id;
223 static struct image_cfg_element *
224 image_find_option(unsigned int optiontype)
228 for (i = 0; i < cfgn; i++) {
229 if (image_cfg[i].type == optiontype)
230 return &image_cfg[i];
237 image_count_options(unsigned int optiontype)
240 unsigned int count = 0;
242 for (i = 0; i < cfgn; i++)
243 if (image_cfg[i].type == optiontype)
249 static int image_get_csk_index(void)
251 struct image_cfg_element *e;
253 e = image_find_option(IMAGE_CFG_CSK_INDEX);
260 static bool image_get_spezialized_img(void)
262 struct image_cfg_element *e;
264 e = image_find_option(IMAGE_CFG_SEC_SPECIALIZED_IMG);
268 return e->sec_specialized_img;
271 static int image_get_bootfrom(void)
273 struct image_cfg_element *e;
275 e = image_find_option(IMAGE_CFG_BOOT_FROM);
277 /* fallback to SPI if no BOOT_FROM is not provided */
278 return IBR_HDR_SPI_ID;
284 * Compute a 8-bit checksum of a memory area. This algorithm follows
285 * the requirements of the Marvell SoC BootROM specifications.
287 static uint8_t image_checksum8(void *start, uint32_t len)
292 /* check len and return zero checksum if invalid */
305 * Verify checksum over a complete header that includes the checksum field.
306 * Return 1 when OK, otherwise 0.
308 static int main_hdr_checksum_ok(void *hdr)
310 /* Offsets of checksum in v0 and v1 headers are the same */
311 struct main_hdr_v0 *main_hdr = (struct main_hdr_v0 *)hdr;
314 checksum = image_checksum8(hdr, kwbheader_size_for_csum(hdr));
315 /* Calculated checksum includes the header checksum field. Compensate
318 checksum -= main_hdr->checksum;
320 return checksum == main_hdr->checksum;
323 static uint32_t image_checksum32(void *start, uint32_t len)
328 /* check len and return zero checksum if invalid */
332 if (len % sizeof(uint32_t)) {
333 fprintf(stderr, "Length %d is not in multiple of %zu\n",
334 len, sizeof(uint32_t));
341 len -= sizeof(uint32_t);
347 static uint8_t baudrate_to_option(unsigned int baudrate)
351 return MAIN_HDR_V1_OPT_BAUD_2400;
353 return MAIN_HDR_V1_OPT_BAUD_4800;
355 return MAIN_HDR_V1_OPT_BAUD_9600;
357 return MAIN_HDR_V1_OPT_BAUD_19200;
359 return MAIN_HDR_V1_OPT_BAUD_38400;
361 return MAIN_HDR_V1_OPT_BAUD_57600;
363 return MAIN_HDR_V1_OPT_BAUD_115200;
365 return MAIN_HDR_V1_OPT_BAUD_DEFAULT;
369 static void kwb_msg(const char *fmt, ...)
375 vfprintf(stdout, fmt, ap);
380 static int openssl_err(const char *msg)
382 unsigned long ssl_err = ERR_get_error();
384 fprintf(stderr, "%s", msg);
385 fprintf(stderr, ": %s\n",
386 ERR_error_string(ssl_err, 0));
391 static int kwb_load_rsa_key(const char *keydir, const char *name, RSA **p_rsa)
400 snprintf(path, sizeof(path), "%s/%s.key", keydir, name);
401 f = fopen(path, "r");
403 fprintf(stderr, "Couldn't open RSA private key: '%s': %s\n",
404 path, strerror(errno));
408 rsa = PEM_read_RSAPrivateKey(f, 0, NULL, "");
410 openssl_err("Failure reading private key");
420 static int kwb_load_cfg_key(struct image_tool_params *params,
421 unsigned int cfg_option, const char *key_name,
424 struct image_cfg_element *e_key;
430 e_key = image_find_option(cfg_option);
432 fprintf(stderr, "%s not configured\n", key_name);
436 res = kwb_load_rsa_key(params->keydir, e_key->key_name, &key);
438 fprintf(stderr, "Failed to load %s\n", key_name);
447 static int kwb_load_kak(struct image_tool_params *params, RSA **p_kak)
449 return kwb_load_cfg_key(params, IMAGE_CFG_KAK, "KAK", p_kak);
452 static int kwb_load_csk(struct image_tool_params *params, RSA **p_csk)
454 return kwb_load_cfg_key(params, IMAGE_CFG_CSK, "CSK", p_csk);
457 static int kwb_compute_pubkey_hash(struct pubkey_der_v1 *pk,
458 struct hash_v1 *hash)
461 unsigned int key_size;
462 unsigned int hash_size;
465 if (!pk || !hash || pk->key[0] != 0x30 || pk->key[1] != 0x82)
468 key_size = (pk->key[2] << 8) + pk->key[3] + 4;
470 ctx = EVP_MD_CTX_create();
472 return openssl_err("EVP context creation failed");
474 EVP_MD_CTX_init(ctx);
475 if (!EVP_DigestInit(ctx, EVP_sha256())) {
476 ret = openssl_err("Digest setup failed");
480 if (!EVP_DigestUpdate(ctx, pk->key, key_size)) {
481 ret = openssl_err("Hashing data failed");
485 if (!EVP_DigestFinal(ctx, hash->hash, &hash_size)) {
486 ret = openssl_err("Could not obtain hash");
490 EVP_MD_CTX_cleanup(ctx);
493 EVP_MD_CTX_destroy(ctx);
497 static int kwb_import_pubkey(RSA **key, struct pubkey_der_v1 *src, char *keyname)
500 const unsigned char *ptr;
506 rsa = d2i_RSAPublicKey(key, &ptr, sizeof(src->key));
508 openssl_err("error decoding public key");
514 fprintf(stderr, "Failed to decode %s pubkey\n", keyname);
518 static int kwb_export_pubkey(RSA *key, struct pubkey_der_v1 *dst, FILE *hashf,
521 int size_exp, size_mod, size_seq;
522 const BIGNUM *key_e, *key_n;
524 char *errmsg = "Failed to encode %s\n";
526 RSA_get0_key(key, NULL, &key_e, NULL);
527 RSA_get0_key(key, &key_n, NULL, NULL);
529 if (!key || !key_e || !key_n || !dst) {
530 fprintf(stderr, "export pk failed: (%p, %p, %p, %p)",
531 key, key_e, key_n, dst);
532 fprintf(stderr, errmsg, keyname);
537 * According to the specs, the key should be PKCS#1 DER encoded.
538 * But unfortunately the really required encoding seems to be different;
539 * it violates DER...! (But it still conformes to BER.)
540 * (Length always in long form w/ 2 byte length code; no leading zero
541 * when MSB of first byte is set...)
542 * So we cannot use the encoding func provided by OpenSSL and have to
543 * do the encoding manually.
546 size_exp = BN_num_bytes(key_e);
547 size_mod = BN_num_bytes(key_n);
548 size_seq = 4 + size_mod + 4 + size_exp;
550 if (size_mod > 256) {
551 fprintf(stderr, "export pk failed: wrong mod size: %d\n",
553 fprintf(stderr, errmsg, keyname);
557 if (4 + size_seq > sizeof(dst->key)) {
558 fprintf(stderr, "export pk failed: seq too large (%d, %zu)\n",
559 4 + size_seq, sizeof(dst->key));
560 fprintf(stderr, errmsg, keyname);
566 /* PKCS#1 (RFC3447) RSAPublicKey structure */
567 *cur++ = 0x30; /* SEQUENCE */
569 *cur++ = (size_seq >> 8) & 0xFF;
570 *cur++ = size_seq & 0xFF;
572 *cur++ = 0x02; /* INTEGER */
574 *cur++ = (size_mod >> 8) & 0xFF;
575 *cur++ = size_mod & 0xFF;
576 BN_bn2bin(key_n, cur);
579 *cur++ = 0x02; /* INTEGER */
581 *cur++ = (size_exp >> 8) & 0xFF;
582 *cur++ = size_exp & 0xFF;
583 BN_bn2bin(key_e, cur);
586 struct hash_v1 pk_hash;
590 ret = kwb_compute_pubkey_hash(dst, &pk_hash);
592 fprintf(stderr, errmsg, keyname);
596 fprintf(hashf, "SHA256 = ");
597 for (i = 0 ; i < sizeof(pk_hash.hash); ++i)
598 fprintf(hashf, "%02X", pk_hash.hash[i]);
599 fprintf(hashf, "\n");
605 static int kwb_sign(RSA *key, void *data, int datasz, struct sig_v1 *sig,
610 unsigned int sig_size;
614 evp_key = EVP_PKEY_new();
616 return openssl_err("EVP_PKEY object creation failed");
618 if (!EVP_PKEY_set1_RSA(evp_key, key)) {
619 ret = openssl_err("EVP key setup failed");
623 size = EVP_PKEY_size(evp_key);
624 if (size > sizeof(sig->sig)) {
625 fprintf(stderr, "Buffer to small for signature (%d bytes)\n",
631 ctx = EVP_MD_CTX_create();
633 ret = openssl_err("EVP context creation failed");
636 EVP_MD_CTX_init(ctx);
637 if (!EVP_SignInit(ctx, EVP_sha256())) {
638 ret = openssl_err("Signer setup failed");
642 if (!EVP_SignUpdate(ctx, data, datasz)) {
643 ret = openssl_err("Signing data failed");
647 if (!EVP_SignFinal(ctx, sig->sig, &sig_size, evp_key)) {
648 ret = openssl_err("Could not obtain signature");
652 EVP_MD_CTX_cleanup(ctx);
653 EVP_MD_CTX_destroy(ctx);
654 EVP_PKEY_free(evp_key);
659 EVP_MD_CTX_destroy(ctx);
661 EVP_PKEY_free(evp_key);
662 fprintf(stderr, "Failed to create %s signature\n", signame);
666 static int kwb_verify(RSA *key, void *data, int datasz, struct sig_v1 *sig,
674 evp_key = EVP_PKEY_new();
676 return openssl_err("EVP_PKEY object creation failed");
678 if (!EVP_PKEY_set1_RSA(evp_key, key)) {
679 ret = openssl_err("EVP key setup failed");
683 size = EVP_PKEY_size(evp_key);
684 if (size > sizeof(sig->sig)) {
685 fprintf(stderr, "Invalid signature size (%d bytes)\n",
691 ctx = EVP_MD_CTX_create();
693 ret = openssl_err("EVP context creation failed");
696 EVP_MD_CTX_init(ctx);
697 if (!EVP_VerifyInit(ctx, EVP_sha256())) {
698 ret = openssl_err("Verifier setup failed");
702 if (!EVP_VerifyUpdate(ctx, data, datasz)) {
703 ret = openssl_err("Hashing data failed");
707 if (EVP_VerifyFinal(ctx, sig->sig, sizeof(sig->sig), evp_key) != 1) {
708 ret = openssl_err("Could not verify signature");
712 EVP_MD_CTX_cleanup(ctx);
713 EVP_MD_CTX_destroy(ctx);
714 EVP_PKEY_free(evp_key);
719 EVP_MD_CTX_destroy(ctx);
721 EVP_PKEY_free(evp_key);
722 fprintf(stderr, "Failed to verify %s signature\n", signame);
726 static int kwb_sign_and_verify(RSA *key, void *data, int datasz,
727 struct sig_v1 *sig, char *signame)
729 if (kwb_sign(key, data, datasz, sig, signame) < 0)
732 if (kwb_verify(key, data, datasz, sig, signame) < 0)
739 static int kwb_dump_fuse_cmds_38x(FILE *out, struct secure_hdr_v1 *sec_hdr)
741 struct hash_v1 kak_pub_hash;
742 struct image_cfg_element *e;
743 unsigned int fuse_line;
749 if (!out || !sec_hdr)
752 ret = kwb_compute_pubkey_hash(&sec_hdr->kak, &kak_pub_hash);
756 fprintf(out, "# burn KAK pub key hash\n");
757 ptr = kak_pub_hash.hash;
758 for (fuse_line = 26; fuse_line <= 30; ++fuse_line) {
759 fprintf(out, "fuse prog -y %u 0 ", fuse_line);
761 for (i = 4; i-- > 0;)
762 fprintf(out, "%02hx", (ushort)ptr[i]);
766 if (fuse_line < 30) {
767 for (i = 3; i-- > 0;)
768 fprintf(out, "%02hx", (ushort)ptr[i]);
771 fprintf(out, "000000");
774 fprintf(out, " 1\n");
777 fprintf(out, "# burn CSK selection\n");
779 idx = image_get_csk_index();
780 if (idx < 0 || idx > 15) {
785 for (fuse_line = 31; fuse_line < 31 + idx; ++fuse_line)
786 fprintf(out, "fuse prog -y %u 0 00000001 00000000 1\n",
789 fprintf(out, "# CSK index is 0; no mods needed\n");
792 e = image_find_option(IMAGE_CFG_BOX_ID);
794 fprintf(out, "# set box ID\n");
795 fprintf(out, "fuse prog -y 48 0 %08x 00000000 1\n", e->boxid);
798 e = image_find_option(IMAGE_CFG_FLASH_ID);
800 fprintf(out, "# set flash ID\n");
801 fprintf(out, "fuse prog -y 47 0 %08x 00000000 1\n", e->flashid);
804 fprintf(out, "# enable secure mode ");
805 fprintf(out, "(must be the last fuse line written)\n");
808 e = image_find_option(IMAGE_CFG_SEC_BOOT_DEV);
810 fprintf(stderr, "ERROR: secured mode boot device not given\n");
815 if (e->sec_boot_dev > 0xff) {
816 fprintf(stderr, "ERROR: secured mode boot device invalid\n");
821 val |= (e->sec_boot_dev << 8);
823 fprintf(out, "fuse prog -y 24 0 %08x 0103e0a9 1\n", val);
825 fprintf(out, "# lock (unused) fuse lines (0-23)s\n");
826 for (fuse_line = 0; fuse_line < 24; ++fuse_line)
827 fprintf(out, "fuse prog -y %u 2 1\n", fuse_line);
829 fprintf(out, "# OK, that's all :-)\n");
835 static int kwb_dump_fuse_cmds(struct secure_hdr_v1 *sec_hdr)
838 struct image_cfg_element *e;
840 e = image_find_option(IMAGE_CFG_SEC_FUSE_DUMP);
844 if (!strcmp(e->name, "a38x")) {
845 FILE *out = fopen("kwb_fuses_a38x.txt", "w+");
848 fprintf(stderr, "Couldn't open eFuse settings: '%s': %s\n",
849 "kwb_fuses_a38x.txt", strerror(errno));
853 kwb_dump_fuse_cmds_38x(out, sec_hdr);
864 static size_t image_headersz_align(size_t headersz, uint8_t blockid)
867 * Header needs to be 4-byte aligned, which is already ensured by code
868 * above. Moreover UART images must have header aligned to 128 bytes
869 * (xmodem block size), NAND images to 256 bytes (ECC calculation),
870 * and SATA and SDIO images to 512 bytes (storage block size).
871 * Note that SPI images do not have to have header size aligned
872 * to 256 bytes because it is possible to read from SPI storage from
873 * any offset (read offset does not have to be aligned to block size).
875 if (blockid == IBR_HDR_UART_ID)
876 return ALIGN(headersz, 128);
877 else if (blockid == IBR_HDR_NAND_ID)
878 return ALIGN(headersz, 256);
879 else if (blockid == IBR_HDR_SATA_ID || blockid == IBR_HDR_SDIO_ID)
880 return ALIGN(headersz, 512);
885 static size_t image_headersz_v0(int *hasext)
889 headersz = sizeof(struct main_hdr_v0);
890 if (image_count_options(IMAGE_CFG_DATA) > 0) {
891 headersz += sizeof(struct ext_hdr_v0);
896 return image_headersz_align(headersz, image_get_bootfrom());
899 static void *image_create_v0(size_t *imagesz, struct image_tool_params *params,
902 struct image_cfg_element *e;
904 struct main_hdr_v0 *main_hdr;
909 * Calculate the size of the header and the size of the
912 headersz = image_headersz_v0(&has_ext);
914 image = malloc(headersz);
916 fprintf(stderr, "Cannot allocate memory for image\n");
920 memset(image, 0, headersz);
922 main_hdr = (struct main_hdr_v0 *)image;
924 /* Fill in the main header */
925 main_hdr->blocksize =
926 cpu_to_le32(payloadsz);
927 main_hdr->srcaddr = cpu_to_le32(headersz);
928 main_hdr->ext = has_ext;
929 main_hdr->version = 0;
930 main_hdr->destaddr = cpu_to_le32(params->addr);
931 main_hdr->execaddr = cpu_to_le32(params->ep);
932 main_hdr->blockid = image_get_bootfrom();
934 e = image_find_option(IMAGE_CFG_NAND_ECC_MODE);
936 main_hdr->nandeccmode = e->nandeccmode;
937 e = image_find_option(IMAGE_CFG_NAND_PAGESZ);
939 main_hdr->nandpagesize = cpu_to_le16(e->nandpagesz);
940 main_hdr->checksum = image_checksum8(image,
941 sizeof(struct main_hdr_v0));
944 * For SATA srcaddr is specified in number of sectors starting from
945 * sector 0. The main header is stored at sector number 1.
946 * This expects the sector size to be 512 bytes.
947 * Header size is already aligned.
949 if (main_hdr->blockid == IBR_HDR_SATA_ID)
950 main_hdr->srcaddr = cpu_to_le32(headersz / 512 + 1);
953 * For SDIO srcaddr is specified in number of sectors starting from
954 * sector 0. The main header is stored at sector number 0.
955 * This expects sector size to be 512 bytes.
956 * Header size is already aligned.
958 if (main_hdr->blockid == IBR_HDR_SDIO_ID)
959 main_hdr->srcaddr = cpu_to_le32(headersz / 512);
961 /* For PCIe srcaddr is not used and must be set to 0xFFFFFFFF. */
962 if (main_hdr->blockid == IBR_HDR_PEX_ID)
963 main_hdr->srcaddr = cpu_to_le32(0xFFFFFFFF);
965 /* Generate the ext header */
967 struct ext_hdr_v0 *ext_hdr;
970 ext_hdr = (struct ext_hdr_v0 *)
971 (image + sizeof(struct main_hdr_v0));
972 ext_hdr->offset = cpu_to_le32(0x40);
974 for (cfgi = 0, datai = 0; cfgi < cfgn; cfgi++) {
975 e = &image_cfg[cfgi];
976 if (e->type != IMAGE_CFG_DATA)
979 ext_hdr->rcfg[datai].raddr =
980 cpu_to_le32(e->regdata.raddr);
981 ext_hdr->rcfg[datai].rdata =
982 cpu_to_le32(e->regdata.rdata);
986 ext_hdr->checksum = image_checksum8(ext_hdr,
987 sizeof(struct ext_hdr_v0));
994 static size_t image_headersz_v1(int *hasext)
996 struct image_cfg_element *binarye, *e;
1002 * Calculate the size of the header and the size of the
1005 headersz = sizeof(struct main_hdr_v1);
1007 if (image_get_csk_index() >= 0) {
1008 headersz += sizeof(struct secure_hdr_v1);
1014 for (cfgi = 0; cfgi < cfgn; cfgi++) {
1015 e = &image_cfg[cfgi];
1017 if (e->type == IMAGE_CFG_DATA)
1020 if (e->type == IMAGE_CFG_DATA_DELAY ||
1021 (e->type == IMAGE_CFG_BINARY && count > 0)) {
1022 headersz += sizeof(struct register_set_hdr_v1) + 8 * count + 4;
1027 headersz += sizeof(struct register_set_hdr_v1) + 8 * count + 4;
1029 for (cfgi = 0; cfgi < cfgn; cfgi++) {
1033 binarye = &image_cfg[cfgi];
1034 if (binarye->type != IMAGE_CFG_BINARY)
1037 ret = stat(binarye->binary.file, &s);
1042 memset(cwd, 0, sizeof(cwd));
1043 if (!getcwd(cwd, sizeof(cwd))) {
1044 dir = "current working directory";
1045 perror("getcwd() failed");
1049 "Didn't find the file '%s' in '%s' which is mandatory to generate the image\n"
1050 "This file generally contains the DDR3 training code, and should be extracted from an existing bootable\n"
1051 "image for your board. Use 'dumpimage -T kwbimage -p 0' to extract it from an existing image.\n",
1052 binarye->binary.file, dir);
1056 headersz += sizeof(struct opt_hdr_v1) + sizeof(uint32_t) +
1057 (binarye->binary.nargs) * sizeof(uint32_t);
1058 headersz = ALIGN(headersz, 16);
1059 headersz += ALIGN(s.st_size, 4) + sizeof(uint32_t);
1064 return image_headersz_align(headersz, image_get_bootfrom());
1067 static int add_binary_header_v1(uint8_t **cur, uint8_t **next_ext,
1068 struct image_cfg_element *binarye,
1069 struct main_hdr_v1 *main_hdr)
1071 struct opt_hdr_v1 *hdr = (struct opt_hdr_v1 *)*cur;
1081 hdr->headertype = OPT_HDR_V1_BINARY_TYPE;
1083 bin = fopen(binarye->binary.file, "r");
1085 fprintf(stderr, "Cannot open binary file %s\n",
1086 binarye->binary.file);
1090 if (fstat(fileno(bin), &s)) {
1091 fprintf(stderr, "Cannot stat binary file %s\n",
1092 binarye->binary.file);
1096 *cur += sizeof(struct opt_hdr_v1);
1098 args = (uint32_t *)*cur;
1099 *args = cpu_to_le32(binarye->binary.nargs);
1101 for (argi = 0; argi < binarye->binary.nargs; argi++)
1102 args[argi] = cpu_to_le32(binarye->binary.args[argi]);
1104 *cur += (binarye->binary.nargs + 1) * sizeof(uint32_t);
1107 * ARM executable code inside the BIN header on some mvebu platforms
1108 * (e.g. A370, AXP) must always be aligned with the 128-bit boundary.
1109 * This requirement can be met by inserting dummy arguments into
1110 * BIN header, if needed.
1112 offset = *cur - (uint8_t *)main_hdr;
1113 add_args = ((16 - offset % 16) % 16) / sizeof(uint32_t);
1115 *(args - 1) = cpu_to_le32(binarye->binary.nargs + add_args);
1116 *cur += add_args * sizeof(uint32_t);
1119 ret = fread(*cur, s.st_size, 1, bin);
1122 "Could not read binary image %s\n",
1123 binarye->binary.file);
1129 *cur += ALIGN(s.st_size, 4);
1131 *((uint32_t *)*cur) = 0x00000000;
1135 *cur += sizeof(uint32_t);
1137 binhdrsz = sizeof(struct opt_hdr_v1) +
1138 (binarye->binary.nargs + add_args + 2) * sizeof(uint32_t) +
1139 ALIGN(s.st_size, 4);
1140 hdr->headersz_lsb = cpu_to_le16(binhdrsz & 0xFFFF);
1141 hdr->headersz_msb = (binhdrsz & 0xFFFF0000) >> 16;
1151 static int export_pub_kak_hash(RSA *kak, struct secure_hdr_v1 *secure_hdr)
1156 hashf = fopen("pub_kak_hash.txt", "w");
1158 fprintf(stderr, "Couldn't open hash file: '%s': %s\n",
1159 "pub_kak_hash.txt", strerror(errno));
1163 res = kwb_export_pubkey(kak, &secure_hdr->kak, hashf, "KAK");
1167 return res < 0 ? 1 : 0;
1170 static int kwb_sign_csk_with_kak(struct image_tool_params *params,
1171 struct secure_hdr_v1 *secure_hdr, RSA *csk)
1174 RSA *kak_pub = NULL;
1175 int csk_idx = image_get_csk_index();
1176 struct sig_v1 tmp_sig;
1178 if (csk_idx < 0 || csk_idx > 15) {
1179 fprintf(stderr, "Invalid CSK index %d\n", csk_idx);
1183 if (kwb_load_kak(params, &kak) < 0)
1186 if (export_pub_kak_hash(kak, secure_hdr))
1189 if (kwb_import_pubkey(&kak_pub, &secure_hdr->kak, "KAK") < 0)
1192 if (kwb_export_pubkey(csk, &secure_hdr->csk[csk_idx], NULL, "CSK") < 0)
1195 if (kwb_sign_and_verify(kak, &secure_hdr->csk,
1196 sizeof(secure_hdr->csk) +
1197 sizeof(secure_hdr->csksig),
1198 &tmp_sig, "CSK") < 0)
1201 if (kwb_verify(kak_pub, &secure_hdr->csk,
1202 sizeof(secure_hdr->csk) +
1203 sizeof(secure_hdr->csksig),
1204 &tmp_sig, "CSK (2)") < 0)
1207 secure_hdr->csksig = tmp_sig;
1212 static int add_secure_header_v1(struct image_tool_params *params, uint8_t *ptr,
1213 int payloadsz, size_t headersz, uint8_t *image,
1214 struct secure_hdr_v1 *secure_hdr)
1216 struct image_cfg_element *e_jtagdelay;
1217 struct image_cfg_element *e_boxid;
1218 struct image_cfg_element *e_flashid;
1220 unsigned char *image_ptr;
1222 struct sig_v1 tmp_sig;
1223 bool specialized_img = image_get_spezialized_img();
1225 kwb_msg("Create secure header content\n");
1227 e_jtagdelay = image_find_option(IMAGE_CFG_JTAG_DELAY);
1228 e_boxid = image_find_option(IMAGE_CFG_BOX_ID);
1229 e_flashid = image_find_option(IMAGE_CFG_FLASH_ID);
1231 if (kwb_load_csk(params, &csk) < 0)
1234 secure_hdr->headertype = OPT_HDR_V1_SECURE_TYPE;
1235 secure_hdr->headersz_msb = 0;
1236 secure_hdr->headersz_lsb = cpu_to_le16(sizeof(struct secure_hdr_v1));
1238 secure_hdr->jtag_delay = e_jtagdelay->jtag_delay;
1239 if (e_boxid && specialized_img)
1240 secure_hdr->boxid = cpu_to_le32(e_boxid->boxid);
1241 if (e_flashid && specialized_img)
1242 secure_hdr->flashid = cpu_to_le32(e_flashid->flashid);
1244 if (kwb_sign_csk_with_kak(params, secure_hdr, csk))
1247 image_ptr = ptr + headersz;
1248 image_size = payloadsz - headersz;
1250 if (kwb_sign_and_verify(csk, image_ptr, image_size,
1251 &secure_hdr->imgsig, "image") < 0)
1254 if (kwb_sign_and_verify(csk, image, headersz, &tmp_sig, "header") < 0)
1257 secure_hdr->hdrsig = tmp_sig;
1259 kwb_dump_fuse_cmds(secure_hdr);
1264 static void finish_register_set_header_v1(uint8_t **cur, uint8_t **next_ext,
1265 struct register_set_hdr_v1 *register_set_hdr,
1266 int *datai, uint8_t delay)
1268 int size = sizeof(struct register_set_hdr_v1) + 8 * (*datai) + 4;
1270 register_set_hdr->headertype = OPT_HDR_V1_REGISTER_TYPE;
1271 register_set_hdr->headersz_lsb = cpu_to_le16(size & 0xFFFF);
1272 register_set_hdr->headersz_msb = size >> 16;
1273 register_set_hdr->data[*datai].last_entry.delay = delay;
1276 *next_ext = ®ister_set_hdr->data[*datai].last_entry.next;
1280 static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,
1281 uint8_t *ptr, int payloadsz)
1283 struct image_cfg_element *e;
1284 struct main_hdr_v1 *main_hdr;
1285 struct opt_hdr_v1 *ohdr;
1286 struct register_set_hdr_v1 *register_set_hdr;
1287 struct secure_hdr_v1 *secure_hdr = NULL;
1289 uint8_t *image, *cur;
1291 uint8_t *next_ext = NULL;
1296 * Calculate the size of the header and the size of the
1299 headersz = image_headersz_v1(&hasext);
1303 image = malloc(headersz);
1305 fprintf(stderr, "Cannot allocate memory for image\n");
1309 memset(image, 0, headersz);
1311 main_hdr = (struct main_hdr_v1 *)image;
1313 cur += sizeof(struct main_hdr_v1);
1314 next_ext = &main_hdr->ext;
1316 /* Fill the main header */
1317 main_hdr->blocksize =
1318 cpu_to_le32(payloadsz);
1319 main_hdr->headersz_lsb = cpu_to_le16(headersz & 0xFFFF);
1320 main_hdr->headersz_msb = (headersz & 0xFFFF0000) >> 16;
1321 main_hdr->destaddr = cpu_to_le32(params->addr);
1322 main_hdr->execaddr = cpu_to_le32(params->ep);
1323 main_hdr->srcaddr = cpu_to_le32(headersz);
1324 main_hdr->ext = hasext;
1325 main_hdr->version = 1;
1326 main_hdr->blockid = image_get_bootfrom();
1328 e = image_find_option(IMAGE_CFG_NAND_BLKSZ);
1330 main_hdr->nandblocksize = e->nandblksz / (64 * 1024);
1331 e = image_find_option(IMAGE_CFG_NAND_PAGESZ);
1333 main_hdr->nandpagesize = cpu_to_le16(e->nandpagesz);
1334 e = image_find_option(IMAGE_CFG_NAND_BADBLK_LOCATION);
1336 main_hdr->nandbadblklocation = e->nandbadblklocation;
1337 e = image_find_option(IMAGE_CFG_BAUDRATE);
1339 main_hdr->options |= baudrate_to_option(e->baudrate);
1340 e = image_find_option(IMAGE_CFG_UART_PORT);
1342 main_hdr->options |= (e->uart_port & 3) << 3;
1343 e = image_find_option(IMAGE_CFG_UART_MPP);
1345 main_hdr->options |= (e->uart_mpp & 7) << 5;
1346 e = image_find_option(IMAGE_CFG_DEBUG);
1348 main_hdr->flags = e->debug ? 0x1 : 0;
1351 * For SATA srcaddr is specified in number of sectors starting from
1352 * sector 0. The main header is stored at sector number 1.
1353 * This expects the sector size to be 512 bytes.
1354 * Header size is already aligned.
1356 if (main_hdr->blockid == IBR_HDR_SATA_ID)
1357 main_hdr->srcaddr = cpu_to_le32(headersz / 512 + 1);
1360 * For SDIO srcaddr is specified in number of sectors starting from
1361 * sector 0. The main header is stored at sector number 0.
1362 * This expects sector size to be 512 bytes.
1363 * Header size is already aligned.
1365 if (main_hdr->blockid == IBR_HDR_SDIO_ID)
1366 main_hdr->srcaddr = cpu_to_le32(headersz / 512);
1368 /* For PCIe srcaddr is not used and must be set to 0xFFFFFFFF. */
1369 if (main_hdr->blockid == IBR_HDR_PEX_ID)
1370 main_hdr->srcaddr = cpu_to_le32(0xFFFFFFFF);
1372 if (image_get_csk_index() >= 0) {
1374 * only reserve the space here; we fill the header later since
1375 * we need the header to be complete to compute the signatures
1377 secure_hdr = (struct secure_hdr_v1 *)cur;
1378 cur += sizeof(struct secure_hdr_v1);
1380 next_ext = &secure_hdr->next;
1384 for (cfgi = 0; cfgi < cfgn; cfgi++) {
1385 e = &image_cfg[cfgi];
1386 if (e->type != IMAGE_CFG_DATA &&
1387 e->type != IMAGE_CFG_DATA_DELAY &&
1388 e->type != IMAGE_CFG_BINARY)
1392 register_set_hdr = (struct register_set_hdr_v1 *)cur;
1394 /* If delay is not specified, use the smallest possible value. */
1395 if (e->type == IMAGE_CFG_DATA_DELAY)
1396 delay = e->regdata_delay;
1398 delay = REGISTER_SET_HDR_OPT_DELAY_MS(0);
1401 * DATA_DELAY command is the last entry in the register set
1402 * header and BINARY command inserts new binary header.
1403 * Therefore BINARY command requires to finish register set
1404 * header if some DATA command was specified. And DATA_DELAY
1405 * command automatically finish register set header even when
1406 * there was no DATA command.
1408 if (e->type == IMAGE_CFG_DATA_DELAY ||
1409 (e->type == IMAGE_CFG_BINARY && datai != 0))
1410 finish_register_set_header_v1(&cur, &next_ext, register_set_hdr,
1413 if (e->type == IMAGE_CFG_DATA) {
1414 register_set_hdr->data[datai].entry.address =
1415 cpu_to_le32(e->regdata.raddr);
1416 register_set_hdr->data[datai].entry.value =
1417 cpu_to_le32(e->regdata.rdata);
1421 if (e->type == IMAGE_CFG_BINARY) {
1422 if (add_binary_header_v1(&cur, &next_ext, e, main_hdr))
1427 /* Set delay to the smallest possible value. */
1428 delay = REGISTER_SET_HDR_OPT_DELAY_MS(0);
1429 finish_register_set_header_v1(&cur, &next_ext, register_set_hdr,
1433 if (secure_hdr && add_secure_header_v1(params, ptr, payloadsz + headersz,
1434 headersz, image, secure_hdr))
1437 *imagesz = headersz;
1439 /* Fill the real header size without padding into the main header */
1440 headersz = sizeof(*main_hdr);
1441 for_each_opt_hdr_v1 (ohdr, main_hdr)
1442 headersz += opt_hdr_v1_size(ohdr);
1443 main_hdr->headersz_lsb = cpu_to_le16(headersz & 0xFFFF);
1444 main_hdr->headersz_msb = (headersz & 0xFFFF0000) >> 16;
1446 /* Calculate and set the header checksum */
1447 main_hdr->checksum = image_checksum8(main_hdr, headersz);
1452 static int recognize_keyword(char *keyword)
1456 for (kw_id = 1; kw_id < IMAGE_CFG_COUNT; ++kw_id)
1457 if (!strcmp(keyword, id_strs[kw_id]))
1463 static int image_create_config_parse_oneline(char *line,
1464 struct image_cfg_element *el)
1466 char *keyword, *saveptr, *value1, *value2;
1467 char delimiters[] = " \t";
1468 int keyword_id, ret, argi;
1469 char *unknown_msg = "Ignoring unknown line '%s'\n";
1471 keyword = strtok_r(line, delimiters, &saveptr);
1472 keyword_id = recognize_keyword(keyword);
1475 fprintf(stderr, unknown_msg, line);
1479 el->type = keyword_id;
1481 value1 = strtok_r(NULL, delimiters, &saveptr);
1484 fprintf(stderr, "Parameter missing in line '%s'\n", line);
1488 switch (keyword_id) {
1489 case IMAGE_CFG_VERSION:
1490 el->version = atoi(value1);
1492 case IMAGE_CFG_BOOT_FROM:
1493 ret = image_boot_mode_id(value1);
1496 fprintf(stderr, "Invalid boot media '%s'\n", value1);
1501 case IMAGE_CFG_NAND_BLKSZ:
1502 el->nandblksz = strtoul(value1, NULL, 16);
1504 case IMAGE_CFG_NAND_BADBLK_LOCATION:
1505 el->nandbadblklocation = strtoul(value1, NULL, 16);
1507 case IMAGE_CFG_NAND_ECC_MODE:
1508 ret = image_nand_ecc_mode_id(value1);
1511 fprintf(stderr, "Invalid NAND ECC mode '%s'\n", value1);
1514 el->nandeccmode = ret;
1516 case IMAGE_CFG_NAND_PAGESZ:
1517 el->nandpagesz = strtoul(value1, NULL, 16);
1519 case IMAGE_CFG_BINARY:
1522 el->binary.file = strdup(value1);
1524 char *value = strtok_r(NULL, delimiters, &saveptr);
1528 el->binary.args[argi] = strtoul(value, NULL, 16);
1530 if (argi >= BINARY_MAX_ARGS) {
1532 "Too many arguments for BINARY\n");
1536 el->binary.nargs = argi;
1538 case IMAGE_CFG_DATA:
1539 value2 = strtok_r(NULL, delimiters, &saveptr);
1541 if (!value1 || !value2) {
1543 "Invalid number of arguments for DATA\n");
1547 el->regdata.raddr = strtoul(value1, NULL, 16);
1548 el->regdata.rdata = strtoul(value2, NULL, 16);
1550 case IMAGE_CFG_DATA_DELAY:
1551 if (!strcmp(value1, "SDRAM_SETUP"))
1552 el->regdata_delay = REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP;
1554 el->regdata_delay = REGISTER_SET_HDR_OPT_DELAY_MS(strtoul(value1, NULL, 10));
1556 case IMAGE_CFG_BAUDRATE:
1557 el->baudrate = strtoul(value1, NULL, 10);
1559 case IMAGE_CFG_UART_PORT:
1560 el->uart_port = strtoul(value1, NULL, 16);
1562 case IMAGE_CFG_UART_MPP:
1563 el->uart_mpp = strtoul(value1, NULL, 16);
1565 case IMAGE_CFG_DEBUG:
1566 el->debug = strtoul(value1, NULL, 10);
1569 el->key_name = strdup(value1);
1572 el->key_name = strdup(value1);
1574 case IMAGE_CFG_CSK_INDEX:
1575 el->csk_idx = strtol(value1, NULL, 0);
1577 case IMAGE_CFG_JTAG_DELAY:
1578 el->jtag_delay = strtoul(value1, NULL, 0);
1580 case IMAGE_CFG_BOX_ID:
1581 el->boxid = strtoul(value1, NULL, 0);
1583 case IMAGE_CFG_FLASH_ID:
1584 el->flashid = strtoul(value1, NULL, 0);
1586 case IMAGE_CFG_SEC_SPECIALIZED_IMG:
1587 el->sec_specialized_img = true;
1589 case IMAGE_CFG_SEC_COMMON_IMG:
1590 el->sec_specialized_img = false;
1592 case IMAGE_CFG_SEC_BOOT_DEV:
1593 el->sec_boot_dev = strtoul(value1, NULL, 0);
1595 case IMAGE_CFG_SEC_FUSE_DUMP:
1596 el->name = strdup(value1);
1599 fprintf(stderr, unknown_msg, line);
1606 * Parse the configuration file 'fcfg' into the array of configuration
1607 * elements 'image_cfg', and return the number of configuration
1608 * elements in 'cfgn'.
1610 static int image_create_config_parse(FILE *fcfg)
1615 /* Parse the configuration file */
1616 while (!feof(fcfg)) {
1620 /* Read the current line */
1621 memset(buf, 0, sizeof(buf));
1622 line = fgets(buf, sizeof(buf), fcfg);
1626 /* Ignore useless lines */
1627 if (line[0] == '\n' || line[0] == '#')
1630 /* Strip final newline */
1631 if (line[strlen(line) - 1] == '\n')
1632 line[strlen(line) - 1] = 0;
1634 /* Parse the current line */
1635 ret = image_create_config_parse_oneline(line,
1642 if (cfgi >= IMAGE_CFG_ELEMENT_MAX) {
1644 "Too many configuration elements in .cfg file\n");
1653 static int image_get_version(void)
1655 struct image_cfg_element *e;
1657 e = image_find_option(IMAGE_CFG_VERSION);
1664 static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd,
1665 struct image_tool_params *params)
1670 size_t headersz = 0;
1677 * Do not use sbuf->st_size as it contains size with padding.
1678 * We need original image data size, so stat original file.
1680 if (stat(params->datafile, &s)) {
1681 fprintf(stderr, "Could not stat data file %s: %s\n",
1682 params->datafile, strerror(errno));
1685 datasz = ALIGN(s.st_size, 4);
1687 fcfg = fopen(params->imagename, "r");
1689 fprintf(stderr, "Could not open input file %s\n",
1694 image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX *
1695 sizeof(struct image_cfg_element));
1697 fprintf(stderr, "Cannot allocate memory\n");
1702 memset(image_cfg, 0,
1703 IMAGE_CFG_ELEMENT_MAX * sizeof(struct image_cfg_element));
1706 ret = image_create_config_parse(fcfg);
1713 version = image_get_version();
1716 * Fallback to version 0 if no version is provided in the
1721 image = image_create_v0(&headersz, params, datasz + 4);
1725 image = image_create_v1(&headersz, params, ptr, datasz + 4);
1729 fprintf(stderr, "Unsupported version %d\n", version);
1735 fprintf(stderr, "Could not create image\n");
1742 /* Build and add image data checksum */
1743 checksum = cpu_to_le32(image_checksum32((uint8_t *)ptr + headersz,
1745 memcpy((uint8_t *)ptr + headersz + datasz, &checksum, sizeof(uint32_t));
1747 /* Finally copy the header into the image area */
1748 memcpy(ptr, image, headersz);
1753 static void kwbimage_print_header(const void *ptr)
1755 struct main_hdr_v0 *mhdr = (struct main_hdr_v0 *)ptr;
1756 struct opt_hdr_v1 *ohdr;
1758 printf("Image Type: MVEBU Boot from %s Image\n",
1759 image_boot_mode_name(mhdr->blockid));
1760 printf("Image version:%d\n", kwbimage_version(ptr));
1762 for_each_opt_hdr_v1 (ohdr, mhdr) {
1763 if (ohdr->headertype == OPT_HDR_V1_BINARY_TYPE) {
1764 printf("BIN Hdr Size: ");
1765 genimg_print_size(opt_hdr_v1_size(ohdr) - 12 -
1770 printf("Data Size: ");
1771 genimg_print_size(mhdr->blocksize - sizeof(uint32_t));
1772 printf("Load Address: %08x\n", mhdr->destaddr);
1773 printf("Entry Point: %08x\n", mhdr->execaddr);
1776 static int kwbimage_check_image_types(uint8_t type)
1778 if (type == IH_TYPE_KWBIMAGE)
1779 return EXIT_SUCCESS;
1781 return EXIT_FAILURE;
1784 static int kwbimage_verify_header(unsigned char *ptr, int image_size,
1785 struct image_tool_params *params)
1787 size_t header_size = kwbheader_size(ptr);
1793 if (header_size > image_size)
1794 return -FDT_ERR_BADSTRUCTURE;
1796 if (!main_hdr_checksum_ok(ptr))
1797 return -FDT_ERR_BADSTRUCTURE;
1799 /* Only version 0 extended header has checksum */
1800 if (kwbimage_version(ptr) == 0) {
1801 struct main_hdr_v0 *mhdr = (struct main_hdr_v0 *)ptr;
1803 if (mhdr->ext & 0x1) {
1804 struct ext_hdr_v0 *ext_hdr = (void *)(mhdr + 1);
1806 csum = image_checksum8(ext_hdr, sizeof(*ext_hdr) - 1);
1807 if (csum != ext_hdr->checksum)
1808 return -FDT_ERR_BADSTRUCTURE;
1811 blockid = mhdr->blockid;
1812 offset = le32_to_cpu(mhdr->srcaddr);
1813 size = le32_to_cpu(mhdr->blocksize);
1814 } else if (kwbimage_version(ptr) == 1) {
1815 struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr;
1816 const uint8_t *mhdr_end;
1817 struct opt_hdr_v1 *ohdr;
1819 mhdr_end = (uint8_t *)mhdr + header_size;
1820 for_each_opt_hdr_v1 (ohdr, ptr)
1821 if (!opt_hdr_v1_valid_size(ohdr, mhdr_end))
1822 return -FDT_ERR_BADSTRUCTURE;
1824 blockid = mhdr->blockid;
1825 offset = le32_to_cpu(mhdr->srcaddr);
1826 size = le32_to_cpu(mhdr->blocksize);
1828 return -FDT_ERR_BADSTRUCTURE;
1832 * For SATA srcaddr is specified in number of sectors.
1833 * The main header is must be stored at sector number 1.
1834 * This expects that sector size is 512 bytes and recalculates
1835 * data offset to bytes relative to the main header.
1837 if (blockid == IBR_HDR_SATA_ID) {
1839 return -FDT_ERR_BADSTRUCTURE;
1845 * For SDIO srcaddr is specified in number of sectors.
1846 * This expects that sector size is 512 bytes and recalculates
1847 * data offset to bytes.
1849 if (blockid == IBR_HDR_SDIO_ID)
1853 * For PCIe srcaddr is always set to 0xFFFFFFFF.
1854 * This expects that data starts after all headers.
1856 if (blockid == IBR_HDR_PEX_ID && offset == 0xFFFFFFFF)
1857 offset = header_size;
1859 if (offset > image_size || offset % 4 != 0)
1860 return -FDT_ERR_BADSTRUCTURE;
1862 if (size < 4 || offset + size > image_size || size % 4 != 0)
1863 return -FDT_ERR_BADSTRUCTURE;
1865 if (image_checksum32(ptr + offset, size - 4) !=
1866 *(uint32_t *)(ptr + offset + size - 4))
1867 return -FDT_ERR_BADSTRUCTURE;
1872 static int kwbimage_generate(struct image_tool_params *params,
1873 struct image_type_params *tparams)
1883 fcfg = fopen(params->imagename, "r");
1885 fprintf(stderr, "Could not open input file %s\n",
1890 if (stat(params->datafile, &s)) {
1891 fprintf(stderr, "Could not stat data file %s: %s\n",
1892 params->datafile, strerror(errno));
1896 image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX *
1897 sizeof(struct image_cfg_element));
1899 fprintf(stderr, "Cannot allocate memory\n");
1904 memset(image_cfg, 0,
1905 IMAGE_CFG_ELEMENT_MAX * sizeof(struct image_cfg_element));
1908 ret = image_create_config_parse(fcfg);
1915 bootfrom = image_get_bootfrom();
1916 version = image_get_version();
1919 * Fallback to version 0 if no version is provided in the
1924 alloc_len = image_headersz_v0(NULL);
1928 alloc_len = image_headersz_v1(NULL);
1932 fprintf(stderr, "Unsupported version %d\n", version);
1939 hdr = malloc(alloc_len);
1941 fprintf(stderr, "%s: malloc return failure: %s\n",
1942 params->cmdname, strerror(errno));
1946 memset(hdr, 0, alloc_len);
1947 tparams->header_size = alloc_len;
1951 * The resulting image needs to be 4-byte aligned. At least
1952 * the Marvell hdrparser tool complains if its unaligned.
1953 * After the image data is stored 4-byte checksum.
1954 * Final UART image must be aligned to 128 bytes.
1955 * Final SPI and NAND images must be aligned to 256 bytes.
1956 * Final SATA and SDIO images must be aligned to 512 bytes.
1958 if (bootfrom == IBR_HDR_SPI_ID || bootfrom == IBR_HDR_NAND_ID)
1959 return 4 + (256 - (alloc_len + s.st_size + 4) % 256) % 256;
1960 else if (bootfrom == IBR_HDR_SATA_ID || bootfrom == IBR_HDR_SDIO_ID)
1961 return 4 + (512 - (alloc_len + s.st_size + 4) % 512) % 512;
1962 else if (bootfrom == IBR_HDR_UART_ID)
1963 return 4 + (128 - (alloc_len + s.st_size + 4) % 128) % 128;
1965 return 4 + (4 - s.st_size % 4) % 4;
1968 static int kwbimage_extract_subimage(void *ptr, struct image_tool_params *params)
1970 struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr;
1971 size_t header_size = kwbheader_size(ptr);
1972 struct opt_hdr_v1 *ohdr;
1973 int idx = params->pflag;
1979 for_each_opt_hdr_v1 (ohdr, ptr) {
1980 if (ohdr->headertype != OPT_HDR_V1_BINARY_TYPE)
1983 if (idx == cur_idx) {
1984 image = (ulong)&ohdr->data[4 + 4 * ohdr->data[0]];
1985 size = opt_hdr_v1_size(ohdr) - 12 - 4 * ohdr->data[0];
1992 if (idx != cur_idx) {
1993 printf("Image %d is not present\n", idx);
1997 offset = le32_to_cpu(mhdr->srcaddr);
1999 if (mhdr->blockid == IBR_HDR_SATA_ID) {
2004 if (mhdr->blockid == IBR_HDR_SDIO_ID)
2007 if (mhdr->blockid == IBR_HDR_PEX_ID && offset == 0xFFFFFFFF)
2008 offset = header_size;
2010 image = (ulong)((uint8_t *)ptr + offset);
2011 size = le32_to_cpu(mhdr->blocksize) - 4;
2014 return imagetool_save_subimage(params->outfile, image, size);
2018 * Report Error if xflag is set in addition to default
2020 static int kwbimage_check_params(struct image_tool_params *params)
2022 if (!params->iflag && (!params->imagename || !strlen(params->imagename))) {
2023 char *msg = "Configuration file for kwbimage creation omitted";
2025 fprintf(stderr, "Error:%s - %s\n", params->cmdname, msg);
2029 return (params->dflag && (params->fflag || params->lflag)) ||
2030 (params->fflag && (params->dflag || params->lflag)) ||
2031 (params->lflag && (params->dflag || params->fflag)) ||
2036 * kwbimage type parameters definition
2040 "Marvell MVEBU Boot Image support",
2043 kwbimage_check_params,
2044 kwbimage_verify_header,
2045 kwbimage_print_header,
2046 kwbimage_set_header,
2047 kwbimage_extract_subimage,
2048 kwbimage_check_image_types,