2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Zhenyu Wang <zhenyuw@linux.intel.com>
33 #include "intel_gpu_tools.h"
35 static void dump_range(uint32_t start, uint32_t end)
39 for (i = start; i < end; i += 4)
40 printf("0x%X : 0x%X\n", i,
41 *(volatile uint32_t *)((volatile char*)mmio + i));
44 int main(int argc, char** argv)
49 printf("Usage: %s [-f | addr]\n", argv[0]);
50 printf("\t -f : read back full range of registers.\n");
51 printf("\t WARNING! This could be danger to hang the machine!\n");
52 printf("\t addr : in 0xXXXX format\n");
58 if (!strcmp(argv[1], "-f")) {
59 dump_range(0x00000, 0x00fff); /* VGA registers */
60 dump_range(0x02000, 0x02fff); /* instruction, memory, interrupt control registers */
61 dump_range(0x03000, 0x031ff); /* FENCE and PPGTT control registers */
62 dump_range(0x03200, 0x03fff); /* frame buffer compression registers */
63 dump_range(0x05000, 0x05fff); /* I/O control registers */
64 dump_range(0x06000, 0x06fff); /* clock control registers */
65 dump_range(0x07000, 0x07fff); /* 3D internal debug registers */
66 dump_range(0x07400, 0x088ff); /* GPE debug registers */
67 dump_range(0x0a000, 0x0afff); /* display palette registers */
68 dump_range(0x10000, 0x13fff); /* MMIO MCHBAR */
69 dump_range(0x30000, 0x3ffff); /* overlay registers */
70 dump_range(0x60000, 0x6ffff); /* display engine pipeline registers */
71 dump_range(0x70000, 0x72fff); /* display and cursor registers */
72 dump_range(0x73000, 0x73fff); /* performance counters */
74 sscanf(argv[1], "0x%x", ®);
75 dump_range(reg, reg + 4);