1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
7 #ifndef _LINUX_CORESIGHT_PMU_H
8 #define _LINUX_CORESIGHT_PMU_H
10 #include <linux/bits.h>
12 #define CORESIGHT_ETM_PMU_NAME "cs_etm"
15 * The legacy Trace ID system based on fixed calculation from the cpu
16 * number. This has been replaced by drivers using a dynamic allocation
17 * system - but need to retain the legacy algorithm for backward comparibility
18 * in certain situations:-
19 * a) new perf running on older systems that generate the legacy mapping
20 * b) older tools that may not update at the same time as the kernel.
22 #define CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) (0x10 + (cpu * 2))
24 /* CoreSight trace ID is currently the bottom 7 bits of the value */
25 #define CORESIGHT_TRACE_ID_VAL_MASK GENMASK(6, 0)
28 * perf record will set the legacy meta data values as unused initially.
29 * This allows perf report to manage the decoders created when dynamic
30 * allocation in operation.
32 #define CORESIGHT_TRACE_ID_UNUSED_FLAG BIT(31)
34 /* Value to set for unused trace ID values */
35 #define CORESIGHT_TRACE_ID_UNUSED_VAL 0x7F
38 * Below are the definition of bit offsets for perf option, and works as
39 * arbitrary values for all ETM versions.
41 * Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore,
42 * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and
43 * directly use below macros as config bits.
45 #define ETM_OPT_BRANCH_BROADCAST 8
46 #define ETM_OPT_CYCACC 12
47 #define ETM_OPT_CTXTID 14
48 #define ETM_OPT_CTXTID2 15
50 #define ETM_OPT_RETSTK 29
52 /* ETMv4 CONFIGR programming bits for the ETM OPTs */
53 #define ETM4_CFG_BIT_BB 3
54 #define ETM4_CFG_BIT_CYCACC 4
55 #define ETM4_CFG_BIT_CTXTID 6
56 #define ETM4_CFG_BIT_VMID 7
57 #define ETM4_CFG_BIT_TS 11
58 #define ETM4_CFG_BIT_RETSTK 12
59 #define ETM4_CFG_BIT_VMID_OPT 15
62 * Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload.
63 * Used to associate a CPU with the CoreSight Trace ID.
64 * [07:00] - Trace ID - uses 8 bits to make value easy to read in file.
65 * [59:08] - Unused (SBZ)
68 #define CS_AUX_HW_ID_TRACE_ID_MASK GENMASK_ULL(7, 0)
69 #define CS_AUX_HW_ID_VERSION_MASK GENMASK_ULL(63, 60)
71 #define CS_AUX_HW_ID_CURR_VERSION 0