1 // SPDX-License-Identifier: GPL-2.0+
4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
7 * Marvell Semiconductor <www.marvell.com>
8 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
11 #include "imagetool.h"
14 #include <generated/autoconf.h>
16 #define UNDEFINED 0xFFFFFFFF
18 #if !defined(CONFIG_IMX_DCD_ADDR)
19 #define CONFIG_IMX_DCD_ADDR 0x00910000
22 * Supported commands for configuration file
24 static table_entry_t imximage_cmds[] = {
25 {CMD_BOOT_FROM, "BOOT_FROM", "boot command", },
26 {CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", },
27 {CMD_WRITE_DATA, "DATA", "Reg Write Data", },
28 {CMD_WRITE_CLR_BIT, "CLR_BIT", "Reg clear bit", },
29 {CMD_WRITE_SET_BIT, "SET_BIT", "Reg set bit", },
30 {CMD_CHECK_BITS_SET, "CHECK_BITS_SET", "Reg Check bits set", },
31 {CMD_CHECK_BITS_CLR, "CHECK_BITS_CLR", "Reg Check bits clr", },
32 {CMD_CSF, "CSF", "Command Sequence File", },
33 {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
34 {CMD_PLUGIN, "PLUGIN", "file plugin_addr", },
39 * Supported Boot options for configuration file
40 * this is needed to set the correct flash offset
42 static table_entry_t imximage_boot_offset[] = {
43 {FLASH_OFFSET_ONENAND, "onenand", "OneNAND Flash",},
44 {FLASH_OFFSET_NAND, "nand", "NAND Flash", },
45 {FLASH_OFFSET_NOR, "nor", "NOR Flash", },
46 {FLASH_OFFSET_SATA, "sata", "SATA Disk", },
47 {FLASH_OFFSET_SD, "sd", "SD Card", },
48 {FLASH_OFFSET_SPI, "spi", "SPI Flash", },
49 {FLASH_OFFSET_QSPI, "qspi", "QSPI NOR Flash",},
50 {-1, "", "Invalid", },
54 * Supported Boot options for configuration file
55 * this is needed to determine the initial load size
57 static table_entry_t imximage_boot_loadsize[] = {
58 {FLASH_LOADSIZE_ONENAND, "onenand", "OneNAND Flash",},
59 {FLASH_LOADSIZE_NAND, "nand", "NAND Flash", },
60 {FLASH_LOADSIZE_NOR, "nor", "NOR Flash", },
61 {FLASH_LOADSIZE_SATA, "sata", "SATA Disk", },
62 {FLASH_LOADSIZE_SD, "sd", "SD Card", },
63 {FLASH_LOADSIZE_SPI, "spi", "SPI Flash", },
64 {FLASH_LOADSIZE_QSPI, "qspi", "QSPI NOR Flash",},
65 {-1, "", "Invalid", },
69 * IMXIMAGE version definition for i.MX chips
71 static table_entry_t imximage_versions[] = {
72 {IMXIMAGE_V1, "", " (i.MX25/35/51 compatible)", },
73 {IMXIMAGE_V2, "", " (i.MX53/6/7 compatible)", },
74 {-1, "", " (Invalid)", },
77 static struct imx_header imximage_header;
78 static uint32_t imximage_version;
80 * Image Vector Table Offset
81 * Initialized to a wrong not 4-bytes aligned address to
82 * check if it is was set by the cfg file.
84 static uint32_t imximage_ivt_offset = UNDEFINED;
85 static uint32_t imximage_csf_size = UNDEFINED;
86 /* Initial Load Region Size */
87 static uint32_t imximage_init_loadsize;
88 static uint32_t imximage_iram_free_start;
89 static uint32_t imximage_plugin_size;
90 static uint32_t plugin_image;
92 static set_dcd_val_t set_dcd_val;
93 static set_dcd_param_t set_dcd_param;
94 static set_dcd_rst_t set_dcd_rst;
95 static set_imx_hdr_t set_imx_hdr;
96 static uint32_t max_dcd_entries;
97 static uint32_t *header_size_ptr;
98 static uint32_t *csf_ptr;
100 static uint32_t get_cfg_value(char *token, char *name, int linenr)
106 value = strtoul(token, &endptr, 16);
107 if (errno || (token == endptr)) {
108 fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n",
109 name, linenr, token);
115 static uint32_t detect_imximage_version(struct imx_header *imx_hdr)
117 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
118 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
119 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
120 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
122 /* Try to detect V1 */
123 if ((fhdr_v1->app_code_barker == APP_CODE_BARKER) &&
124 (hdr_v1->dcd_table.preamble.barker == DCD_BARKER))
127 /* Try to detect V2 */
128 if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
129 (hdr_v2->data.dcd_table.header.tag == DCD_HEADER_TAG))
132 if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
133 hdr_v2->boot_data.plugin)
136 return IMXIMAGE_VER_INVALID;
139 static void err_imximage_version(int version)
142 "Error: Unsupported imximage version:%d\n", version);
147 static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,
148 int fld, uint32_t value, uint32_t off)
150 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
154 /* Byte, halfword, word */
155 if ((value != 1) && (value != 2) && (value != 4)) {
156 fprintf(stderr, "Error: %s[%d] - "
157 "Invalid register size " "(%d)\n",
158 name, lineno, value);
161 dcd_v1->addr_data[off].type = value;
163 case CFG_REG_ADDRESS:
164 dcd_v1->addr_data[off].addr = value;
167 dcd_v1->addr_data[off].value = value;
175 static struct dcd_v2_cmd *gd_last_cmd;
177 static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
180 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
181 struct dcd_v2_cmd *d = gd_last_cmd;
182 struct dcd_v2_cmd *d2;
186 d = &dcd_v2->dcd_cmd;
188 len = be16_to_cpu(d->write_dcd_command.length);
190 d2 = (struct dcd_v2_cmd *)(((char *)d) + len);
194 if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
195 (d->write_dcd_command.param == DCD_WRITE_DATA_PARAM))
198 d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
199 d->write_dcd_command.length = cpu_to_be16(4);
200 d->write_dcd_command.param = DCD_WRITE_DATA_PARAM;
202 case CMD_WRITE_CLR_BIT:
203 if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
204 (d->write_dcd_command.param == DCD_WRITE_CLR_BIT_PARAM))
207 d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
208 d->write_dcd_command.length = cpu_to_be16(4);
209 d->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
211 case CMD_WRITE_SET_BIT:
212 if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
213 (d->write_dcd_command.param == DCD_WRITE_SET_BIT_PARAM))
216 d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
217 d->write_dcd_command.length = cpu_to_be16(4);
218 d->write_dcd_command.param = DCD_WRITE_SET_BIT_PARAM;
221 * Check data command only supports one entry,
223 case CMD_CHECK_BITS_SET:
225 d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
226 d->write_dcd_command.length = cpu_to_be16(4);
227 d->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM;
229 case CMD_CHECK_BITS_CLR:
231 d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
232 d->write_dcd_command.length = cpu_to_be16(4);
233 d->write_dcd_command.param = DCD_CHECK_BITS_CLR_PARAM;
241 static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,
242 int fld, uint32_t value, uint32_t off)
244 struct dcd_v2_cmd *d = gd_last_cmd;
247 len = be16_to_cpu(d->write_dcd_command.length);
248 off = (len - 4) >> 3;
251 case CFG_REG_ADDRESS:
252 d->addr_data[off].addr = cpu_to_be32(value);
255 d->addr_data[off].value = cpu_to_be32(value);
257 d->write_dcd_command.length = cpu_to_be16((off << 3) + 4);
266 * Complete setting up the rest field of DCD of V1
267 * such as barker code and DCD data length.
269 static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
270 char *name, int lineno)
272 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
274 dcd_v1->preamble.barker = DCD_BARKER;
275 dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
279 * Complete setting up the reset field of DCD of V2
280 * such as DCD tag, version, length, etc.
282 static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
283 char *name, int lineno)
285 if (!imxhdr->header.hdr_v2.boot_data.plugin) {
286 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
287 struct dcd_v2_cmd *d = gd_last_cmd;
291 d = &dcd_v2->dcd_cmd;
292 len = be16_to_cpu(d->write_dcd_command.length);
294 d = (struct dcd_v2_cmd *)(((char *)d) + len);
296 len = (char *)d - (char *)&dcd_v2->header;
297 dcd_v2->header.tag = DCD_HEADER_TAG;
298 dcd_v2->header.length = cpu_to_be16(len);
299 dcd_v2->header.version = DCD_VERSION;
303 static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
304 uint32_t entry_point, uint32_t flash_offset)
306 imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1;
307 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
308 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
310 uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
313 /* Set magic number */
314 fhdr_v1->app_code_barker = APP_CODE_BARKER;
316 hdr_base = entry_point - imximage_init_loadsize + flash_offset;
317 fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
318 fhdr_v1->app_code_jump_vector = entry_point;
320 fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
321 fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
323 /* Security feature are not supported */
324 fhdr_v1->app_code_csf = 0;
325 fhdr_v1->super_root_key = 0;
326 header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
329 static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
330 uint32_t entry_point, uint32_t flash_offset)
332 imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
333 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
336 /* Set magic number */
337 fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
338 fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
339 fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
341 if (!hdr_v2->boot_data.plugin) {
342 fhdr_v2->entry = entry_point;
343 fhdr_v2->reserved1 = 0;
344 fhdr_v2->reserved1 = 0;
345 hdr_base = entry_point - imximage_init_loadsize +
347 fhdr_v2->self = hdr_base;
349 fhdr_v2->dcd_ptr = hdr_base +
350 offsetof(imx_header_v2_t, data);
352 fhdr_v2->dcd_ptr = 0;
353 fhdr_v2->boot_data_ptr = hdr_base
354 + offsetof(imx_header_v2_t, boot_data);
355 hdr_v2->boot_data.start = entry_point - imximage_init_loadsize;
359 header_size_ptr = &hdr_v2->boot_data.size;
360 csf_ptr = &fhdr_v2->csf;
362 imx_header_v2_t *next_hdr_v2;
363 flash_header_v2_t *next_fhdr_v2;
365 if (imximage_csf_size != 0) {
366 fprintf(stderr, "Error: Header v2: SECURE_BOOT is only supported in DCD mode!");
370 fhdr_v2->entry = imximage_iram_free_start +
371 flash_offset + sizeof(flash_header_v2_t) +
374 fhdr_v2->reserved1 = 0;
375 fhdr_v2->reserved2 = 0;
376 fhdr_v2->self = imximage_iram_free_start + flash_offset;
378 fhdr_v2->dcd_ptr = 0;
380 fhdr_v2->boot_data_ptr = fhdr_v2->self +
381 offsetof(imx_header_v2_t, boot_data);
383 hdr_v2->boot_data.start = imximage_iram_free_start;
385 * The actural size of plugin image is "imximage_plugin_size +
386 * sizeof(flash_header_v2_t) + sizeof(boot_data_t)", plus the
387 * flash_offset space.The ROM code only need to copy this size
388 * to run the plugin code. However, later when copy the whole
389 * U-Boot image to DDR, the ROM code use memcpy to copy the
390 * first part of the image, and use the storage read function
391 * to get the remaining part. This requires the dividing point
392 * must be multiple of storage sector size. Here we set the
393 * first section to be MAX_PLUGIN_CODE_SIZE(64KB) for this
396 hdr_v2->boot_data.size = MAX_PLUGIN_CODE_SIZE;
398 /* Security feature are not supported */
401 next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
402 imximage_plugin_size);
404 next_fhdr_v2 = &next_hdr_v2->fhdr;
406 next_fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
407 next_fhdr_v2->header.length =
408 cpu_to_be16(sizeof(flash_header_v2_t));
409 next_fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
411 next_fhdr_v2->entry = entry_point;
412 hdr_base = entry_point - sizeof(struct imx_header);
413 next_fhdr_v2->reserved1 = 0;
414 next_fhdr_v2->reserved2 = 0;
415 next_fhdr_v2->self = hdr_base + imximage_plugin_size;
417 next_fhdr_v2->dcd_ptr = 0;
418 next_fhdr_v2->boot_data_ptr = next_fhdr_v2->self +
419 offsetof(imx_header_v2_t, boot_data);
421 next_hdr_v2->boot_data.start = hdr_base - flash_offset;
423 header_size_ptr = &next_hdr_v2->boot_data.size;
425 next_hdr_v2->boot_data.plugin = 0;
427 next_fhdr_v2->csf = 0;
431 static void set_hdr_func(void)
433 switch (imximage_version) {
435 set_dcd_val = set_dcd_val_v1;
436 set_dcd_param = NULL;
437 set_dcd_rst = set_dcd_rst_v1;
438 set_imx_hdr = set_imx_hdr_v1;
439 max_dcd_entries = MAX_HW_CFG_SIZE_V1;
443 set_dcd_val = set_dcd_val_v2;
444 set_dcd_param = set_dcd_param_v2;
445 set_dcd_rst = set_dcd_rst_v2;
446 set_imx_hdr = set_imx_hdr_v2;
447 max_dcd_entries = MAX_HW_CFG_SIZE_V2;
450 err_imximage_version(imximage_version);
455 static void print_hdr_v1(struct imx_header *imx_hdr)
457 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
458 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
459 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
460 uint32_t size, length, ver;
462 size = dcd_v1->preamble.length;
463 if (size > (MAX_HW_CFG_SIZE_V1 * sizeof(dcd_type_addr_data_t))) {
465 "Error: Image corrupt DCD size %d exceed maximum %d\n",
466 (uint32_t)(size / sizeof(dcd_type_addr_data_t)),
471 length = dcd_v1->preamble.length / sizeof(dcd_type_addr_data_t);
472 ver = detect_imximage_version(imx_hdr);
474 printf("Image Type: Freescale IMX Boot Image\n");
475 printf("Image Ver: %x", ver);
476 printf("%s\n", get_table_entry_name(imximage_versions, NULL, ver));
477 printf("Data Size: ");
478 genimg_print_size(dcd_v1->addr_data[length].type);
479 printf("Load Address: %08x\n", (uint32_t)fhdr_v1->app_dest_ptr);
480 printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector);
483 static void print_hdr_v2(struct imx_header *imx_hdr)
485 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
486 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
487 dcd_v2_t *dcd_v2 = &hdr_v2->data.dcd_table;
488 uint32_t size, version, plugin;
490 plugin = hdr_v2->boot_data.plugin;
492 size = be16_to_cpu(dcd_v2->header.length);
493 if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
495 "Error: Image corrupt DCD size %d exceed maximum %d\n",
496 (uint32_t)(size / sizeof(dcd_addr_data_t)),
502 version = detect_imximage_version(imx_hdr);
504 printf("Image Type: Freescale IMX Boot Image\n");
505 printf("Image Ver: %x", version);
506 printf("%s\n", get_table_entry_name(imximage_versions, NULL, version));
507 printf("Mode: %s\n", plugin ? "PLUGIN" : "DCD");
509 printf("Data Size: ");
510 genimg_print_size(hdr_v2->boot_data.size);
511 printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
512 printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
517 dcdlen = hdr_v2->data.dcd_table.header.length;
518 offs = (char *)&hdr_v2->data.dcd_table
522 * The HAB block is the first part of the image, from
523 * start of IVT header (fhdr_v2->self) to the start of
524 * the CSF block (fhdr_v2->csf). So HAB size is
526 * HAB_size = fhdr_v2->csf - fhdr_v2->self
528 printf("HAB Blocks: 0x%08x 0x%08x 0x%08x\n",
529 (uint32_t)fhdr_v2->self, 0,
530 (uint32_t)(fhdr_v2->csf - fhdr_v2->self));
531 printf("DCD Blocks: 0x%08x 0x%08x 0x%08x\n",
532 CONFIG_IMX_DCD_ADDR, offs, be16_to_cpu(dcdlen));
535 imx_header_v2_t *next_hdr_v2;
536 flash_header_v2_t *next_fhdr_v2;
539 printf("Plugin Data Size: ");
540 genimg_print_size(hdr_v2->boot_data.size);
541 printf("Plugin Code Size: ");
542 genimg_print_size(imximage_plugin_size);
543 printf("Plugin Load Address: %08x\n", hdr_v2->boot_data.start);
544 printf("Plugin Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
547 next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
548 imximage_plugin_size);
549 next_fhdr_v2 = &next_hdr_v2->fhdr;
550 printf("U-Boot Data Size: ");
551 genimg_print_size(next_hdr_v2->boot_data.size);
552 printf("U-Boot Load Address: %08x\n",
553 next_hdr_v2->boot_data.start);
554 printf("U-Boot Entry Point: %08x\n",
555 (uint32_t)next_fhdr_v2->entry);
559 static void copy_plugin_code(struct imx_header *imxhdr, char *plugin_file)
563 char *plugin_buf = imxhdr->header.hdr_v2.data.plugin_code;
566 ifd = open(plugin_file, O_RDONLY|O_BINARY);
568 fprintf(stderr, "Can't open %s: %s\n",
574 if (fstat(ifd, &sbuf) < 0) {
575 fprintf(stderr, "Can't stat %s: %s\n",
581 ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, ifd, 0);
582 if (ptr == MAP_FAILED) {
583 fprintf(stderr, "Can't read %s: %s\n",
589 if (sbuf.st_size > MAX_PLUGIN_CODE_SIZE) {
590 printf("plugin binary size too large\n");
594 memcpy(plugin_buf, ptr, sbuf.st_size);
595 imximage_plugin_size = sbuf.st_size;
597 (void) munmap((void *)ptr, sbuf.st_size);
600 imxhdr->header.hdr_v2.boot_data.plugin = 1;
603 static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
604 char *name, int lineno, int fld, int dcd_len)
607 static int cmd_ver_first = ~0;
610 case CMD_IMAGE_VERSION:
611 imximage_version = get_cfg_value(token, name, lineno);
612 if (cmd_ver_first == 0) {
613 fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION "
614 "command need be the first before other "
615 "valid command in the file\n", name, lineno);
622 imximage_ivt_offset = get_table_entry_id(imximage_boot_offset,
623 "imximage boot option", token);
624 if (imximage_ivt_offset == -1) {
625 fprintf(stderr, "Error: %s[%d] -Invalid boot device"
626 "(%s)\n", name, lineno, token);
630 imximage_init_loadsize =
631 get_table_entry_id(imximage_boot_loadsize,
632 "imximage boot option", token);
634 if (imximage_init_loadsize == -1) {
636 "Error: %s[%d] -Invalid boot device(%s)\n",
637 name, lineno, token);
642 * The SOC loads from the storage starting at address 0
643 * then ensures that the load size contains the offset
645 if (imximage_init_loadsize < imximage_ivt_offset)
646 imximage_init_loadsize = imximage_ivt_offset;
647 if (unlikely(cmd_ver_first != 1))
650 case CMD_BOOT_OFFSET:
651 imximage_ivt_offset = get_cfg_value(token, name, lineno);
652 if (unlikely(cmd_ver_first != 1))
656 case CMD_WRITE_CLR_BIT:
657 case CMD_WRITE_SET_BIT:
658 case CMD_CHECK_BITS_SET:
659 case CMD_CHECK_BITS_CLR:
660 value = get_cfg_value(token, name, lineno);
662 (*set_dcd_param)(imxhdr, dcd_len, cmd);
663 (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
664 if (unlikely(cmd_ver_first != 1))
668 if (imximage_version != 2) {
670 "Error: %s[%d] - CSF only supported for VERSION 2(%s)\n",
671 name, lineno, token);
674 imximage_csf_size = get_cfg_value(token, name, lineno);
675 if (unlikely(cmd_ver_first != 1))
680 copy_plugin_code(imxhdr, token);
685 static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
686 char *token, char *name, int lineno, int fld, int *dcd_len)
692 *cmd = get_table_entry_id(imximage_cmds,
693 "imximage commands", token);
695 fprintf(stderr, "Error: %s[%d] - Invalid command"
696 "(%s)\n", name, lineno, token);
701 parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len);
703 case CFG_REG_ADDRESS:
707 case CMD_WRITE_CLR_BIT:
708 case CMD_WRITE_SET_BIT:
709 case CMD_CHECK_BITS_SET:
710 case CMD_CHECK_BITS_CLR:
712 value = get_cfg_value(token, name, lineno);
714 (*set_dcd_param)(imxhdr, *dcd_len, *cmd);
715 (*set_dcd_val)(imxhdr, name, lineno, fld, value,
718 if (fld == CFG_REG_VALUE) {
720 if (*dcd_len > max_dcd_entries) {
721 fprintf(stderr, "Error: %s[%d] -"
722 "DCD table exceeds maximum size(%d)\n",
723 name, lineno, max_dcd_entries);
729 value = get_cfg_value(token, name, lineno);
730 imximage_iram_free_start = value;
740 static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)
744 char *token, *saveptr1, *saveptr2;
751 fd = fopen(name, "r");
753 fprintf(stderr, "Error: %s - Can't open DCD file\n", name);
758 * Very simple parsing, line starting with # are comments
761 while ((getline(&line, &len, fd)) > 0) {
764 token = strtok_r(line, "\r\n", &saveptr1);
768 /* Check inside the single line */
769 for (fld = CFG_COMMAND, cmd = CMD_INVALID,
770 line = token; ; line = NULL, fld++) {
771 token = strtok_r(line, " \t", &saveptr2);
775 /* Drop all text starting with '#' as comments */
779 parse_cfg_fld(imxhdr, &cmd, token, name,
780 lineno, fld, &dcd_len);
785 (*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
788 /* Exit if there is no BOOT_FROM field specifying the flash_offset */
789 if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
790 fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
797 static int imximage_check_image_types(uint8_t type)
799 if (type == IH_TYPE_IMXIMAGE)
805 static int imximage_verify_header(unsigned char *ptr, int image_size,
806 struct image_tool_params *params)
808 struct imx_header *imx_hdr = (struct imx_header *) ptr;
810 if (detect_imximage_version(imx_hdr) == IMXIMAGE_VER_INVALID)
811 return -FDT_ERR_BADSTRUCTURE;
816 static void imximage_print_header(const void *ptr)
818 struct imx_header *imx_hdr = (struct imx_header *) ptr;
819 uint32_t version = detect_imximage_version(imx_hdr);
823 print_hdr_v1(imx_hdr);
826 print_hdr_v2(imx_hdr);
829 err_imximage_version(version);
834 static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
835 struct image_tool_params *params)
837 struct imx_header *imxhdr = (struct imx_header *)ptr;
839 uint32_t header_size;
842 * In order to not change the old imx cfg file
843 * by adding VERSION command into it, here need
844 * set up function ptr group to V1 by default.
846 imximage_version = IMXIMAGE_V1;
847 /* Be able to detect if the cfg file has no BOOT_FROM tag */
848 imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
849 imximage_csf_size = 0;
852 /* Parse dcd configuration file */
853 dcd_len = parse_cfg_file(imxhdr, params->imagename);
855 if (imximage_version == IMXIMAGE_V1)
856 header_size = sizeof(flash_header_v1_t);
858 header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
860 header_size += sizeof(dcd_v2_t);
862 header_size += MAX_PLUGIN_CODE_SIZE;
865 if (imximage_init_loadsize < imximage_ivt_offset + header_size)
866 imximage_init_loadsize = imximage_ivt_offset + header_size;
868 /* Set the imx header */
869 (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset);
874 * MX53 only loads 512 byte multiples in case of SD boot.
875 * MX53 only loads NAND page multiples in case of NAND boot and
876 * supports up to 4096 byte large pages, thus align to 4096.
878 * The remaining fraction of a block bytes would not be loaded!
880 *header_size_ptr = ROUND((sbuf->st_size + imximage_ivt_offset), 4096);
882 if (csf_ptr && imximage_csf_size) {
883 *csf_ptr = params->ep - imximage_init_loadsize +
885 *header_size_ptr += imximage_csf_size;
889 int imximage_check_params(struct image_tool_params *params)
893 if (!strlen(params->imagename)) {
894 fprintf(stderr, "Error: %s - Configuration file not specified, "
895 "it is needed for imximage generation\n",
901 * XIP is not allowed and verify that incompatible
902 * parameters are not sent at the same time
903 * For example, if list is required a data image must not be provided
905 return (params->dflag && (params->fflag || params->lflag)) ||
906 (params->fflag && (params->dflag || params->lflag)) ||
907 (params->lflag && (params->dflag || params->fflag)) ||
908 (params->xflag) || !(strlen(params->imagename));
911 static int imximage_generate(struct image_tool_params *params,
912 struct image_type_params *tparams)
914 struct imx_header *imxhdr;
917 char *datafile = params->datafile;
918 uint32_t pad_len, header_size;
920 memset(&imximage_header, 0, sizeof(imximage_header));
923 * In order to not change the old imx cfg file
924 * by adding VERSION command into it, here need
925 * set up function ptr group to V1 by default.
927 imximage_version = IMXIMAGE_V1;
928 /* Be able to detect if the cfg file has no BOOT_FROM tag */
929 imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
930 imximage_csf_size = 0;
933 /* Parse dcd configuration file */
934 parse_cfg_file(&imximage_header, params->imagename);
936 if (imximage_version == IMXIMAGE_V1)
937 header_size = sizeof(imx_header_v1_t);
939 header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
941 header_size += sizeof(dcd_v2_t);
943 header_size += MAX_PLUGIN_CODE_SIZE;
946 if (imximage_init_loadsize < imximage_ivt_offset + header_size)
947 imximage_init_loadsize = imximage_ivt_offset + header_size;
949 alloc_len = imximage_init_loadsize - imximage_ivt_offset;
951 if (alloc_len < header_size) {
952 fprintf(stderr, "%s: header error\n",
957 imxhdr = malloc(alloc_len);
960 fprintf(stderr, "%s: malloc return failure: %s\n",
961 params->cmdname, strerror(errno));
965 memset(imxhdr, 0, alloc_len);
967 tparams->header_size = alloc_len;
968 tparams->hdr = imxhdr;
970 /* determine data image file length */
972 if (stat(datafile, &sbuf) < 0) {
973 fprintf(stderr, "%s: Can't stat %s: %s\n",
974 params->cmdname, datafile, strerror(errno));
978 pad_len = ROUND(sbuf.st_size, 4096) - sbuf.st_size;
985 * imximage parameters
989 "Freescale i.MX Boot Image support",
992 imximage_check_params,
993 imximage_verify_header,
994 imximage_print_header,
997 imximage_check_image_types,