2 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/timer.h>
29 #include <asm/immap.h>
31 DECLARE_GLOBAL_DATA_PTR;
33 static ulong timestamp;
35 #if defined(CONFIG_MCFTMR)
36 #ifndef CFG_UDELAY_BASE
37 # error "uDelay base not defined!"
40 #if !defined(CFG_TMR_BASE) || !defined(CFG_INTR_BASE) || !defined(CFG_TMRINTR_NO) || !defined(CFG_TMRINTR_MASK)
41 # error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!"
43 extern void dtimer_intr_setup(void);
45 void udelay(unsigned long usec)
47 volatile dtmr_t *timerp = (dtmr_t *) (CFG_UDELAY_BASE);
57 /* Set up TIMER 3 as timebase clock */
58 timerp->tmr = DTIM_DTMR_RST_RST;
60 /* set period to 1 us */
62 CFG_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 | DTIM_DTMR_FRR |
65 start = now = timerp->tcn;
66 while (now < start + tmp)
71 void dtimer_interrupt(void *not_used)
73 volatile dtmr_t *timerp = (dtmr_t *) (CFG_TMR_BASE);
75 /* check for timer interrupt asserted */
76 if ((CFG_TMRPND_REG & CFG_TMRINTR_MASK) == CFG_TMRINTR_PEND) {
77 timerp->ter = (DTIM_DTER_CAP | DTIM_DTER_REF);
85 volatile dtmr_t *timerp = (dtmr_t *) (CFG_TMR_BASE);
92 /* Set up TIMER 4 as clock */
93 timerp->tmr = DTIM_DTMR_RST_RST;
95 /* initialize and enable timer interrupt */
96 irq_install_handler(CFG_TMRINTR_NO, dtimer_interrupt, 0);
99 timerp->trr = 1000; /* Interrupt every ms */
103 /* set a period of 1us, set timer mode to restart and enable timer and interrupt */
104 timerp->tmr = CFG_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 |
105 DTIM_DTMR_FRR | DTIM_DTMR_ORRI | DTIM_DTMR_RST_EN;
108 void reset_timer(void)
113 ulong get_timer(ulong base)
115 return (timestamp - base);
118 void set_timer(ulong t)
122 #endif /* CONFIG_MCFTMR */
124 #if defined(CONFIG_MCFPIT)
125 #if !defined(CFG_PIT_BASE)
126 # error "CFG_PIT_BASE not defined!"
129 static unsigned short lastinc;
131 void udelay(unsigned long usec)
133 volatile pit_t *timerp = (pit_t *) (CFG_UDELAY_BASE);
143 /* Set up TIMER 3 as timebase clock */
144 timerp->pcsr = PIT_PCSR_OVW;
146 /* set period to 1 us */
147 timerp->pcsr |= PIT_PCSR_PRE(CFG_PIT_PRESCALE) | PIT_PCSR_EN;
150 while (timerp->pcntr > 0) ;
154 void timer_init(void)
156 volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE);
159 /* Set up TIMER 4 as poll clock */
160 timerp->pcsr = PIT_PCSR_OVW;
161 timerp->pmr = lastinc = 0;
162 timerp->pcsr |= PIT_PCSR_PRE(CFG_PIT_PRESCALE) | PIT_PCSR_EN;
165 void set_timer(ulong t)
167 volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE);
170 timerp->pmr = lastinc = 0;
173 ulong get_timer(ulong base)
175 unsigned short now, diff;
176 volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE);
179 diff = -(now - lastinc);
183 return timestamp - base;
186 void wait_ticks(unsigned long ticks)
189 while (get_timer(0) < ticks) ;
191 #endif /* CONFIG_MCFPIT */
194 * This function is derived from PowerPC code (read timebase as long long).
195 * On M68K it just returns the timer value.
197 unsigned long long get_ticks(void)
202 unsigned long usec2ticks(unsigned long usec)
204 return get_timer(usec);
208 * This function is derived from PowerPC code (timebase clock frequency).
209 * On M68K it returns the number of timer ticks per second.
211 ulong get_tbclk(void)