f93f75fc622a6b075723884b1eb74a7ab816f97f
[platform/upstream/connectedhomeip.git] / third_party / openthread / repo / examples / platforms / efr32mg1 / uart.c
1 /*
2  *  Copyright (c) 2020, The OpenThread Authors.
3  *  All rights reserved.
4  *
5  *  Redistribution and use in source and binary forms, with or without
6  *  modification, are permitted provided that the following conditions are met:
7  *  1. Redistributions of source code must retain the above copyright
8  *     notice, this list of conditions and the following disclaimer.
9  *  2. Redistributions in binary form must reproduce the above copyright
10  *     notice, this list of conditions and the following disclaimer in the
11  *     documentation and/or other materials provided with the distribution.
12  *  3. Neither the name of the copyright holder nor the
13  *     names of its contributors may be used to endorse or promote products
14  *     derived from this software without specific prior written permission.
15  *
16  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
20  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  *  POSSIBILITY OF SUCH DAMAGE.
27  */
28
29 /**
30  * @file
31  *   This file implements the OpenThread platform abstraction for UART communication.
32  *
33  */
34
35 #include <stddef.h>
36
37 #include "openthread-system.h"
38 #include <openthread/platform/uart.h>
39
40 #include "utils/code_utils.h"
41
42 #include "em_core.h"
43 #include "uartdrv.h"
44
45 #include "hal-config.h"
46
47 enum
48 {
49     kReceiveFifoSize = 128,
50 };
51
52 #define USART_INIT                                                                               \
53     {                                                                                            \
54         USART0,                                               /* USART port */                   \
55             115200,                                           /* Baud rate */                    \
56             BSP_SERIAL_APP_TX_LOC,                            /* USART Tx pin location number */ \
57             BSP_SERIAL_APP_RX_LOC,                            /* USART Rx pin location number */ \
58             (USART_Stopbits_TypeDef)USART_FRAME_STOPBITS_ONE, /* Stop bits */                    \
59             (USART_Parity_TypeDef)USART_FRAME_PARITY_NONE,    /* Parity */                       \
60             (USART_OVS_TypeDef)USART_CTRL_OVS_X16,            /* Oversampling mode*/             \
61             false,                                            /* Majority vote disable */        \
62             HAL_SERIAL_APP_FLOW_CONTROL,                      /* Flow control */                 \
63             BSP_SERIAL_APP_CTS_PORT,                          /* CTS port number */              \
64             BSP_SERIAL_APP_CTS_PIN,                           /* CTS pin number */               \
65             BSP_SERIAL_APP_RTS_PORT,                          /* RTS port number */              \
66             BSP_SERIAL_APP_RTS_PIN,                           /* RTS pin number */               \
67             (UARTDRV_Buffer_FifoQueue_t *)&sUartRxQueue,      /* RX operation queue */           \
68             (UARTDRV_Buffer_FifoQueue_t *)&sUartTxQueue,      /* TX operation queue */           \
69             BSP_SERIAL_APP_CTS_LOC,                           /* CTS location */                 \
70             BSP_SERIAL_APP_RTS_LOC                            /* RTS location */                 \
71     }
72
73 DEFINE_BUF_QUEUE(EMDRV_UARTDRV_MAX_CONCURRENT_RX_BUFS, sUartRxQueue);
74 DEFINE_BUF_QUEUE(EMDRV_UARTDRV_MAX_CONCURRENT_TX_BUFS, sUartTxQueue);
75
76 static UARTDRV_HandleData_t sUartHandleData;
77 static UARTDRV_Handle_t     sUartHandle = &sUartHandleData;
78 static uint8_t              sReceiveBuffer[2];
79 static const uint8_t *      sTransmitBuffer = NULL;
80 static volatile uint16_t    sTransmitLength = 0;
81
82 typedef struct ReceiveFifo_t
83 {
84     // The data buffer
85     uint8_t mBuffer[kReceiveFifoSize];
86     // The offset of the first item written to the list.
87     volatile uint16_t mHead;
88     // The offset of the next item to be written to the list.
89     volatile uint16_t mTail;
90 } ReceiveFifo_t;
91
92 static ReceiveFifo_t sReceiveFifo;
93
94 static void processReceive(void);
95
96 static void receiveDone(UARTDRV_Handle_t aHandle, Ecode_t aStatus, uint8_t *aData, UARTDRV_Count_t aCount)
97 {
98     // We can only write if incrementing mTail doesn't equal mHead
99     if (sReceiveFifo.mHead != (sReceiveFifo.mTail + 1) % kReceiveFifoSize)
100     {
101         sReceiveFifo.mBuffer[sReceiveFifo.mTail] = aData[0];
102         sReceiveFifo.mTail                       = (sReceiveFifo.mTail + 1) % kReceiveFifoSize;
103     }
104
105     UARTDRV_Receive(aHandle, aData, 1, receiveDone);
106     otSysEventSignalPending();
107 }
108
109 static void transmitDone(UARTDRV_Handle_t aHandle, Ecode_t aStatus, uint8_t *aData, UARTDRV_Count_t aCount)
110 {
111     sTransmitLength = 0;
112     otSysEventSignalPending();
113 }
114
115 static void processReceive(void)
116 {
117     // Copy tail to prevent multiple reads
118     uint16_t tail = sReceiveFifo.mTail;
119
120     // If the data wraps around, process the first part
121     if (sReceiveFifo.mHead > tail)
122     {
123         otPlatUartReceived(sReceiveFifo.mBuffer + sReceiveFifo.mHead, kReceiveFifoSize - sReceiveFifo.mHead);
124
125         // Reset the buffer mHead back to zero.
126         sReceiveFifo.mHead = 0;
127     }
128
129     // For any data remaining, process it
130     if (sReceiveFifo.mHead != tail)
131     {
132         otPlatUartReceived(sReceiveFifo.mBuffer + sReceiveFifo.mHead, tail - sReceiveFifo.mHead);
133
134         // Set mHead to the local tail we have cached
135         sReceiveFifo.mHead = tail;
136     }
137 }
138
139 otError otPlatUartFlush(void)
140 {
141     return OT_ERROR_NOT_IMPLEMENTED;
142 }
143
144 static void processTransmit(void)
145 {
146     if (sTransmitBuffer != NULL && sTransmitLength == 0)
147     {
148         sTransmitBuffer = NULL;
149         otPlatUartSendDone();
150     }
151 }
152
153 otError otPlatUartEnable(void)
154 {
155     UARTDRV_Init_t uartInit = USART_INIT;
156
157     sReceiveFifo.mHead = 0;
158     sReceiveFifo.mTail = 0;
159
160     UARTDRV_Init(sUartHandle, &uartInit);
161
162     for (uint8_t i = 0; i < sizeof(sReceiveBuffer); i++)
163     {
164         UARTDRV_Receive(sUartHandle, &sReceiveBuffer[i], sizeof(sReceiveBuffer[i]), receiveDone);
165     }
166
167     return OT_ERROR_NONE;
168 }
169
170 otError otPlatUartDisable(void)
171 {
172     return OT_ERROR_NOT_IMPLEMENTED;
173 }
174
175 otError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength)
176 {
177     otError error = OT_ERROR_NONE;
178
179     otEXPECT_ACTION(sTransmitBuffer == NULL, error = OT_ERROR_BUSY);
180
181     sTransmitBuffer = aBuf;
182     sTransmitLength = aBufLength;
183
184     UARTDRV_Transmit(sUartHandle, (uint8_t *)sTransmitBuffer, sTransmitLength, transmitDone);
185
186 exit:
187     return error;
188 }
189
190 void efr32UartProcess(void)
191 {
192     processReceive();
193     processTransmit();
194 }