2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Ben Widawsky <ben@bwidawsk.net>
25 * Jeff McGee <jeff.mcgee@intel.com>
36 #include "intel_gpu_tools.h"
37 #include "intel_bufmgr.h"
38 #include "intel_batchbuffer.h"
40 static bool verbose = false;
44 static const char sysfs_base_path[] = "/sys/class/drm/card%d/gt_%s_freq_mhz";
55 static int origfreqs[NUMFREQ];
62 { "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
65 static int readval(FILE *filp)
71 scanned = fscanf(filp, "%d", &val);
72 igt_assert(scanned == 1);
77 static void read_freqs(int *freqs)
81 for (i = 0; i < NUMFREQ; i++)
82 freqs[i] = readval(stuff[i].filp);
85 static int do_writeval(FILE *filp, int val, int lerrno)
91 ret = fprintf(filp, "%d", val);
94 /* Expecting specific error */
95 igt_assert(ret == EOF && errno == lerrno);
96 igt_assert(readval(filp) == orig);
98 /* Expecting no error */
99 igt_assert(ret != EOF);
100 igt_assert(readval(filp) == val);
105 #define writeval(filp, val) do_writeval(filp, val, 0)
106 #define writeval_inval(filp, val) do_writeval(filp, val, EINVAL)
108 static void setfreq(int val)
110 if (val > readval(stuff[MAX].filp)) {
111 writeval(stuff[MAX].filp, val);
112 writeval(stuff[MIN].filp, val);
114 writeval(stuff[MIN].filp, val);
115 writeval(stuff[MAX].filp, val);
119 static void checkit(const int *freqs)
121 igt_assert(freqs[MIN] <= freqs[MAX]);
122 igt_assert(freqs[CUR] <= freqs[MAX]);
123 igt_assert(freqs[MIN] <= freqs[CUR]);
124 igt_assert(freqs[RPn] <= freqs[MIN]);
125 igt_assert(freqs[MAX] <= freqs[RP0]);
126 igt_assert(freqs[RP1] <= freqs[RP0]);
127 igt_assert(freqs[RPn] <= freqs[RP1]);
128 igt_assert(freqs[RP0] != 0);
129 igt_assert(freqs[RP1] != 0);
132 static void dumpit(const int *freqs)
136 printf("gt freq (MHz):");
137 for (i = 0; i < NUMFREQ; i++)
138 printf(" %s=%d", stuff[i].name, freqs[i]);
142 #define dump(x) if (verbose) dumpit(x)
143 #define log(...) if (verbose) printf(__VA_ARGS__)
145 static struct load_helper {
148 drm_intel_bufmgr *bufmgr;
149 struct intel_batchbuffer *batch;
150 drm_intel_bo *target_buffer;
153 struct igt_helper_process igt_proc;
156 static void load_helper_signal_handler(int sig)
161 static void emit_store_dword_imm(uint32_t val)
164 struct intel_batchbuffer *batch = lh.batch;
166 cmd = MI_STORE_DWORD_IMM;
168 cmd |= MI_MEM_VIRTUAL;
170 if (intel_gen(lh.devid) >= 8) {
173 OUT_RELOC(lh.target_buffer, I915_GEM_DOMAIN_INSTRUCTION,
174 I915_GEM_DOMAIN_INSTRUCTION, 0);
181 OUT_BATCH(0); /* reserved */
182 OUT_RELOC(lh.target_buffer, I915_GEM_DOMAIN_INSTRUCTION,
183 I915_GEM_DOMAIN_INSTRUCTION, 0);
189 static void load_helper_run(void)
191 assert(!lh.igt_proc.running);
193 igt_require(lh.ready == true);
195 igt_fork_helper(&lh.igt_proc) {
198 signal(SIGUSR1, load_helper_signal_handler);
201 emit_store_dword_imm(val);
202 intel_batchbuffer_flush_on_ring(lh.batch, 0);
206 log("load helper sent %u dword writes\n", val);
210 static void load_helper_stop(void)
212 assert(lh.igt_proc.running);
213 kill(lh.igt_proc.pid, SIGUSR1);
214 igt_wait_helper(&lh.igt_proc);
217 /* The load helper resource is used by only some subtests. We attempt to
218 * initialize in igt_fixture but do our igt_require check only if a
219 * subtest attempts to run it */
220 static void load_helper_init(void)
222 lh.devid = intel_get_drm_devid(drm_fd);
223 lh.has_ppgtt = gem_uses_aliasing_ppgtt(drm_fd);
225 /* MI_STORE_DATA can only use GTT address on gen4+/g33 and needs
226 * snoopable mem on pre-gen6. */
227 if (intel_gen(lh.devid) < 6) {
228 log("load helper init failed: pre-gen6 not supported\n");
232 lh.bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096);
234 log("load helper init failed: buffer manager init\n");
237 drm_intel_bufmgr_gem_enable_reuse(lh.bufmgr);
239 lh.batch = intel_batchbuffer_alloc(lh.bufmgr, lh.devid);
241 log("load helper init failed: batch buffer alloc\n");
245 lh.target_buffer = drm_intel_bo_alloc(lh.bufmgr, "target bo",
247 if (!lh.target_buffer) {
248 log("load helper init failed: target buffer alloc\n");
255 static void load_helper_deinit(void)
257 if (lh.igt_proc.running)
260 if (lh.target_buffer)
261 drm_intel_bo_unreference(lh.target_buffer);
264 intel_batchbuffer_free(lh.batch);
267 drm_intel_bufmgr_destroy(lh.bufmgr);
270 static void min_max_config(void (*check)(void))
272 int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
274 log("\nCheck original min and max...\n");
277 log("\nSet min=RPn and max=RP0...\n");
278 writeval(stuff[MIN].filp, origfreqs[RPn]);
279 writeval(stuff[MAX].filp, origfreqs[RP0]);
282 log("\nIncrease min to midpoint...\n");
283 writeval(stuff[MIN].filp, fmid);
286 log("\nIncrease min to RP0...\n");
287 writeval(stuff[MIN].filp, origfreqs[RP0]);
290 log("\nIncrease min above RP0 (invalid)...\n");
291 writeval_inval(stuff[MIN].filp, origfreqs[RP0] + 1000);
294 log("\nDecrease max to RPn (invalid)...\n");
295 writeval_inval(stuff[MAX].filp, origfreqs[RPn]);
298 log("\nDecrease min to midpoint...\n");
299 writeval(stuff[MIN].filp, fmid);
302 log("\nDecrease min to RPn...\n");
303 writeval(stuff[MIN].filp, origfreqs[RPn]);
306 log("\nDecrease min below RPn (invalid)...\n");
307 writeval_inval(stuff[MIN].filp, 0);
310 log("\nDecrease max to midpoint...\n");
311 writeval(stuff[MAX].filp, fmid);
314 log("\nDecrease max to RPn...\n");
315 writeval(stuff[MAX].filp, origfreqs[RPn]);
318 log("\nDecrease max below RPn (invalid)...\n");
319 writeval_inval(stuff[MAX].filp, 0);
322 log("\nIncrease min to RP0 (invalid)...\n");
323 writeval_inval(stuff[MIN].filp, origfreqs[RP0]);
326 log("\nIncrease max to midpoint...\n");
327 writeval(stuff[MAX].filp, fmid);
330 log("\nIncrease max to RP0...\n");
331 writeval(stuff[MAX].filp, origfreqs[RP0]);
334 log("\nIncrease max above RP0 (invalid)...\n");
335 writeval_inval(stuff[MAX].filp, origfreqs[RP0] + 1000);
338 writeval(stuff[MIN].filp, origfreqs[MIN]);
339 writeval(stuff[MAX].filp, origfreqs[MAX]);
342 static void basic_check(void)
351 #define IDLE_WAIT_TIMESTEP_MSEC 100
352 #define IDLE_WAIT_TIMEOUT_MSEC 3000
353 static void idle_check(void)
358 /* Monitor frequencies until cur settles down to min, which should
359 * happen within the allotted time */
364 if (freqs[CUR] == freqs[MIN])
366 usleep(1000 * IDLE_WAIT_TIMESTEP_MSEC);
367 wait += IDLE_WAIT_TIMESTEP_MSEC;
368 } while (wait < IDLE_WAIT_TIMEOUT_MSEC);
370 igt_assert(freqs[CUR] == freqs[MIN]);
371 log("Required %d msec to reach cur=min\n", wait);
374 #define LOADED_WAIT_TIMESTEP_MSEC 100
375 #define LOADED_WAIT_TIMEOUT_MSEC 3000
376 static void loaded_check(void)
381 /* Monitor frequencies until cur increases to max, which should
382 * happen within the allotted time */
387 if (freqs[CUR] == freqs[MAX])
389 usleep(1000 * LOADED_WAIT_TIMESTEP_MSEC);
390 wait += LOADED_WAIT_TIMESTEP_MSEC;
391 } while (wait < LOADED_WAIT_TIMEOUT_MSEC);
393 igt_assert(freqs[CUR] == freqs[MAX]);
394 log("Required %d msec to reach cur=max\n", wait);
397 static void pm_rps_exit_handler(int sig)
399 if (origfreqs[MIN] > readval(stuff[MAX].filp)) {
400 writeval(stuff[MAX].filp, origfreqs[MAX]);
401 writeval(stuff[MIN].filp, origfreqs[MIN]);
403 writeval(stuff[MIN].filp, origfreqs[MIN]);
404 writeval(stuff[MAX].filp, origfreqs[MAX]);
407 load_helper_deinit();
411 static int opt_handler(int opt, int opt_index)
424 /* Mod of igt_subtest_init that adds our extra options */
425 static void subtest_init(int argc, char **argv)
427 struct option long_opts[] = {
428 {"verbose", 0, 0, 'v'}
430 const char *help_str = " -v, --verbose";
433 ret = igt_subtest_init_parse_opts(argc, argv, "v", long_opts,
434 help_str, opt_handler);
437 /* exit with no error for -h/--help */
438 exit(ret == -1 ? 0 : ret);
441 int main(int argc, char **argv)
443 subtest_init(argc, argv);
445 igt_skip_on_simulation();
448 const int device = drm_get_card();
449 struct junk *junk = stuff;
452 /* Use drm_open_any to verify device existence */
453 drm_fd = drm_open_any();
458 ret = asprintf(&path, sysfs_base_path, device, junk->name);
459 igt_assert(ret != -1);
460 junk->filp = fopen(path, junk->mode);
461 igt_require(junk->filp);
462 setbuf(junk->filp, NULL);
464 val = readval(junk->filp);
465 igt_assert(val >= 0);
467 } while(junk->name != NULL);
469 read_freqs(origfreqs);
471 igt_install_exit_handler(pm_rps_exit_handler);
476 igt_subtest("basic-api")
477 min_max_config(basic_check);
479 igt_subtest("min-max-config-idle")
480 min_max_config(idle_check);
482 igt_subtest("min-max-config-loaded") {
484 min_max_config(loaded_check);