tests/pm_rpm.c

   1 /*
   2  * Copyright © 2013 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Paulo Zanoni <paulo.r.zanoni@intel.com>
  25  *
  26  */
  27
  28 #include <stdio.h>
  29 #include <stdint.h>
  30 #include <stdbool.h>
  31 #include <string.h>
  32
  33 #include <unistd.h>
  34 #include <fcntl.h>
  35 #include <dirent.h>
  36 #include <sys/ioctl.h>
  37 #include <sys/mman.h>
  38 #include <sys/types.h>
  39 #include <sys/stat.h>
  40 #include <linux/i2c.h>
  41 #include <linux/i2c-dev.h>
  42
  43 #include <drm.h>
  44
  45 #include "drmtest.h"
  46 #include "intel_batchbuffer.h"
  47 #include "intel_io.h"
  48 #include "intel_chipset.h"
  49 #include "ioctl_wrappers.h"
  50 #include "igt_aux.h"
  51 #include "igt_kms.h"
  52 #include "igt_debugfs.h"
  53
  54 #define MSR_PC8_RES     0x630
  55 #define MSR_PC9_RES     0x631
  56 #define MSR_PC10_RES    0x632
  57
  58 #define MAX_CONNECTORS  32
  59 #define MAX_ENCODERS    32
  60 #define MAX_CRTCS       16
  61
  62 #define POWER_DIR "/sys/devices/pci0000:00/0000:00:02.0/power"
  63
  64 enum pc8_status {
  65         PC8_ENABLED,
  66         PC8_DISABLED
  67 };
  68
  69 enum screen_type {
  70         SCREEN_TYPE_LPSP,
  71         SCREEN_TYPE_NON_LPSP,
  72         SCREEN_TYPE_ANY,
  73 };
  74
  75 /* Wait flags */
  76 #define DONT_WAIT       0
  77 #define WAIT_STATUS     1
  78 #define WAIT_PC8_RES    2
  79 #define WAIT_EXTRA      4
  80 #define USE_DPMS        8
  81
  82 int drm_fd, msr_fd, pm_status_fd, pc8_status_fd;
  83 bool has_runtime_pm, has_pc8;
  84 struct mode_set_data ms_data;
  85 struct scanout_fb *fbs = NULL;
  86
  87 /* Stuff used when creating FBs and mode setting. */
  88 struct mode_set_data {
  89         drmModeResPtr res;
  90         drmModeConnectorPtr connectors[MAX_CONNECTORS];
  91         drmModePropertyBlobPtr edids[MAX_CONNECTORS];
  92
  93         uint32_t devid;
  94 };
  95
  96 /* Stuff we query at different times so we can compare. */
  97 struct compare_data {
  98         drmModeResPtr res;
  99         drmModeEncoderPtr encoders[MAX_ENCODERS];
 100         drmModeConnectorPtr connectors[MAX_CONNECTORS];
 101         drmModeCrtcPtr crtcs[MAX_CRTCS];
 102         drmModePropertyBlobPtr edids[MAX_CONNECTORS];
 103 };
 104
 105 /* During the stress tests we want to be as fast as possible, so use pre-created
 106  * FBs instead of creating them again and again. */
 107 struct scanout_fb {
 108         uint32_t handle;
 109         int width;
 110         int height;
 111         struct scanout_fb *next;
 112 };
 113
 114 /* If the read fails, then the machine doesn't support PC8+ residencies. */
 115 static bool supports_pc8_plus_residencies(void)
 116 {
 117         int rc;
 118         uint64_t val;
 119
 120         rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC8_RES);
 121         if (rc != sizeof(val))
 122                 return false;
 123         rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC9_RES);
 124         if (rc != sizeof(val))
 125                 return false;
 126         rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC10_RES);
 127         if (rc != sizeof(val))
 128                 return false;
 129
 130         return true;
 131 }
 132
 133 static uint64_t get_residency(uint32_t type)
 134 {
 135         int rc;
 136         uint64_t ret;
 137
 138         rc = pread(msr_fd, &ret, sizeof(uint64_t), type);
 139         igt_assert(rc == sizeof(ret));
 140
 141         return ret;
 142 }
 143
 144 static bool pc8_plus_residency_changed(unsigned int timeout_sec)
 145 {
 146         unsigned int i;
 147         uint64_t res_pc8, res_pc9, res_pc10;
 148         int to_sleep = 100 * 1000;
 149
 150         res_pc8 = get_residency(MSR_PC8_RES);
 151         res_pc9 = get_residency(MSR_PC9_RES);
 152         res_pc10 = get_residency(MSR_PC10_RES);
 153
 154         for (i = 0; i < timeout_sec * 1000 * 1000; i += to_sleep) {
 155                 if (res_pc8 != get_residency(MSR_PC8_RES) ||
 156                     res_pc9 != get_residency(MSR_PC9_RES) ||
 157                     res_pc10 != get_residency(MSR_PC10_RES)) {
 158                         return true;
 159                 }
 160                 usleep(to_sleep);
 161         }
 162
 163         return false;
 164 }
 165
 166 static enum pc8_status get_pc8_status(void)
 167 {
 168         ssize_t n_read;
 169         char buf[150]; /* The whole file has less than 100 chars. */
 170
 171         lseek(pc8_status_fd, 0, SEEK_SET);
 172         n_read = read(pc8_status_fd, buf, ARRAY_SIZE(buf));
 173         igt_assert(n_read >= 0);
 174         buf[n_read] = '\0';
 175
 176         if (strstr(buf, "\nEnabled: yes\n"))
 177                 return PC8_ENABLED;
 178         else
 179                 return PC8_DISABLED;
 180 }
 181
 182 static bool wait_for_pc8_status(enum pc8_status status)
 183 {
 184         int i;
 185         int hundred_ms = 100 * 1000, ten_s = 10 * 1000 * 1000;
 186
 187         for (i = 0; i < ten_s; i += hundred_ms) {
 188                 if (get_pc8_status() == status)
 189                         return true;
 190
 191                 usleep(hundred_ms);
 192         }
 193
 194         return false;
 195 }
 196
 197 static bool wait_for_suspended(void)
 198 {
 199         if (has_pc8 && !has_runtime_pm)
 200                 return wait_for_pc8_status(PC8_ENABLED);
 201         else
 202                 return igt_wait_for_pm_status(IGT_RUNTIME_PM_STATUS_SUSPENDED);
 203 }
 204
 205 static bool wait_for_active(void)
 206 {
 207         if (has_pc8 && !has_runtime_pm)
 208                 return wait_for_pc8_status(PC8_DISABLED);
 209         else
 210                 return igt_wait_for_pm_status(IGT_RUNTIME_PM_STATUS_ACTIVE);
 211 }
 212
 213 static void disable_all_screens_dpms(struct mode_set_data *data)
 214 {
 215         int i;
 216
 217         for (i = 0; i < data->res->count_connectors; i++) {
 218                 drmModeConnectorPtr c = data->connectors[i];
 219
 220                 kmstest_set_connector_dpms(drm_fd, c, DRM_MODE_DPMS_OFF);
 221         }
 222 }
 223
 224 static void disable_all_screens(struct mode_set_data *data)
 225 {
 226         int i, rc;
 227
 228         for (i = 0; i < data->res->count_crtcs; i++) {
 229                 rc = drmModeSetCrtc(drm_fd, data->res->crtcs[i], -1, 0, 0,
 230                                     NULL, 0, NULL);
 231                 igt_assert(rc == 0);
 232         }
 233 }
 234
 235 static struct scanout_fb *create_fb(struct mode_set_data *data, int width,
 236                                     int height)
 237 {
 238         struct scanout_fb *fb_info;
 239         struct igt_fb fb;
 240         cairo_t *cr;
 241
 242         fb_info = malloc(sizeof(struct scanout_fb));
 243         igt_assert(fb_info);
 244
 245         fb_info->handle = igt_create_fb(drm_fd, width, height,
 246                                             DRM_FORMAT_XRGB8888,
 247                                             false, &fb);
 248         fb_info->width = width;
 249         fb_info->height = height;
 250         fb_info->next = NULL;
 251
 252         cr = igt_get_cairo_ctx(drm_fd, &fb);
 253         igt_paint_test_pattern(cr, width, height);
 254         cairo_destroy(cr);
 255
 256         return fb_info;
 257 }
 258
 259 static uint32_t get_fb(struct mode_set_data *data, int width, int height)
 260 {
 261         struct scanout_fb *fb;
 262
 263         if (!fbs) {
 264                 fbs = create_fb(data, width, height);
 265                 return fbs->handle;
 266         }
 267
 268         for (fb = fbs; fb != NULL; fb = fb->next) {
 269                 if (fb->width == width && fb->height == height)
 270                         return fb->handle;
 271
 272                 if (!fb->next) {
 273                         fb->next = create_fb(data, width, height);
 274                         return fb->next->handle;
 275                 }
 276         }
 277         igt_assert(false);
 278 }
 279
 280 static bool enable_one_screen_with_type(struct mode_set_data *data,
 281                                         enum screen_type type)
 282 {
 283         uint32_t crtc_id = 0, buffer_id = 0, connector_id = 0;
 284         drmModeModeInfoPtr mode = NULL;
 285         int i, rc;
 286
 287         for (i = 0; i < data->res->count_connectors; i++) {
 288                 drmModeConnectorPtr c = data->connectors[i];
 289
 290                 if (type == SCREEN_TYPE_LPSP &&
 291                     c->connector_type != DRM_MODE_CONNECTOR_eDP)
 292                         continue;
 293
 294                 if (type == SCREEN_TYPE_NON_LPSP &&
 295                     c->connector_type == DRM_MODE_CONNECTOR_eDP)
 296                         continue;
 297
 298                 if (c->connection == DRM_MODE_CONNECTED && c->count_modes) {
 299                         connector_id = c->connector_id;
 300                         mode = &c->modes[0];
 301                         break;
 302                 }
 303         }
 304
 305         if (connector_id == 0)
 306                 return false;
 307
 308         crtc_id = data->res->crtcs[0];
 309         buffer_id = get_fb(data, mode->hdisplay, mode->vdisplay);
 310
 311         igt_assert(crtc_id);
 312         igt_assert(buffer_id);
 313         igt_assert(connector_id);
 314         igt_assert(mode);
 315
 316         rc = drmModeSetCrtc(drm_fd, crtc_id, buffer_id, 0, 0, &connector_id,
 317                             1, mode);
 318         igt_assert(rc == 0);
 319
 320         return true;
 321 }
 322
 323 static void enable_one_screen(struct mode_set_data *data)
 324 {
 325         /* SKIP if there are no connected screens. */
 326         igt_require(enable_one_screen_with_type(data, SCREEN_TYPE_ANY));
 327 }
 328
 329 static drmModePropertyBlobPtr get_connector_edid(drmModeConnectorPtr connector,
 330                                                  int index)
 331 {
 332         unsigned int i;
 333         drmModeObjectPropertiesPtr props;
 334         drmModePropertyBlobPtr ret = NULL;
 335
 336         props = drmModeObjectGetProperties(drm_fd, connector->connector_id,
 337                                            DRM_MODE_OBJECT_CONNECTOR);
 338
 339         for (i = 0; i < props->count_props; i++) {
 340                 drmModePropertyPtr prop = drmModeGetProperty(drm_fd,
 341                                                              props->props[i]);
 342
 343                 if (strcmp(prop->name, "EDID") == 0) {
 344                         igt_assert(prop->flags & DRM_MODE_PROP_BLOB);
 345                         igt_assert(prop->count_blobs == 0);
 346                         ret = drmModeGetPropertyBlob(drm_fd,
 347                                                      props->prop_values[i]);
 348                 }
 349
 350                 drmModeFreeProperty(prop);
 351         }
 352
 353         drmModeFreeObjectProperties(props);
 354         return ret;
 355 }
 356
 357 static void init_mode_set_data(struct mode_set_data *data)
 358 {
 359         int i;
 360
 361         data->res = drmModeGetResources(drm_fd);
 362         igt_assert(data->res);
 363         igt_assert(data->res->count_connectors <= MAX_CONNECTORS);
 364
 365         for (i = 0; i < data->res->count_connectors; i++) {
 366                 data->connectors[i] = drmModeGetConnector(drm_fd,
 367                                                 data->res->connectors[i]);
 368                 data->edids[i] = get_connector_edid(data->connectors[i], i);
 369         }
 370
 371         data->devid = intel_get_drm_devid(drm_fd);
 372
 373         igt_set_vt_graphics_mode();
 374 }
 375
 376 static void fini_mode_set_data(struct mode_set_data *data)
 377 {
 378         int i;
 379
 380         for (i = 0; i < data->res->count_connectors; i++) {
 381                 drmModeFreeConnector(data->connectors[i]);
 382                 drmModeFreePropertyBlob(data->edids[i]);
 383         }
 384         drmModeFreeResources(data->res);
 385 }
 386
 387 static void get_drm_info(struct compare_data *data)
 388 {
 389         int i;
 390
 391         data->res = drmModeGetResources(drm_fd);
 392         igt_assert(data->res);
 393
 394         igt_assert(data->res->count_connectors <= MAX_CONNECTORS);
 395         igt_assert(data->res->count_encoders <= MAX_ENCODERS);
 396         igt_assert(data->res->count_crtcs <= MAX_CRTCS);
 397
 398         for (i = 0; i < data->res->count_connectors; i++) {
 399                 data->connectors[i] = drmModeGetConnector(drm_fd,
 400                                                 data->res->connectors[i]);
 401                 data->edids[i] = get_connector_edid(data->connectors[i], i);
 402         }
 403         for (i = 0; i < data->res->count_encoders; i++)
 404                 data->encoders[i] = drmModeGetEncoder(drm_fd,
 405                                                 data->res->encoders[i]);
 406         for (i = 0; i < data->res->count_crtcs; i++)
 407                 data->crtcs[i] = drmModeGetCrtc(drm_fd, data->res->crtcs[i]);
 408 }
 409
 410 static void free_drm_info(struct compare_data *data)
 411 {
 412         int i;
 413
 414         for (i = 0; i < data->res->count_connectors; i++) {
 415                 drmModeFreeConnector(data->connectors[i]);
 416                 drmModeFreePropertyBlob(data->edids[i]);
 417         }
 418         for (i = 0; i < data->res->count_encoders; i++)
 419                 drmModeFreeEncoder(data->encoders[i]);
 420         for (i = 0; i < data->res->count_crtcs; i++)
 421                 drmModeFreeCrtc(data->crtcs[i]);
 422
 423         drmModeFreeResources(data->res);
 424 }
 425
 426 #define COMPARE(d1, d2, data) igt_assert(d1->data == d2->data)
 427 #define COMPARE_ARRAY(d1, d2, size, data) do { \
 428         for (i = 0; i < size; i++) \
 429                 igt_assert(d1->data[i] == d2->data[i]); \
 430 } while (0)
 431
 432 static void assert_drm_resources_equal(struct compare_data *d1,
 433                                        struct compare_data *d2)
 434 {
 435         COMPARE(d1, d2, res->count_connectors);
 436         COMPARE(d1, d2, res->count_encoders);
 437         COMPARE(d1, d2, res->count_crtcs);
 438         COMPARE(d1, d2, res->min_width);
 439         COMPARE(d1, d2, res->max_width);
 440         COMPARE(d1, d2, res->min_height);
 441         COMPARE(d1, d2, res->max_height);
 442 }
 443
 444 static void assert_modes_equal(drmModeModeInfoPtr m1, drmModeModeInfoPtr m2)
 445 {
 446         COMPARE(m1, m2, clock);
 447         COMPARE(m1, m2, hdisplay);
 448         COMPARE(m1, m2, hsync_start);
 449         COMPARE(m1, m2, hsync_end);
 450         COMPARE(m1, m2, htotal);
 451         COMPARE(m1, m2, hskew);
 452         COMPARE(m1, m2, vdisplay);
 453         COMPARE(m1, m2, vsync_start);
 454         COMPARE(m1, m2, vsync_end);
 455         COMPARE(m1, m2, vtotal);
 456         COMPARE(m1, m2, vscan);
 457         COMPARE(m1, m2, vrefresh);
 458         COMPARE(m1, m2, flags);
 459         COMPARE(m1, m2, type);
 460         igt_assert(strcmp(m1->name, m2->name) == 0);
 461 }
 462
 463 static void assert_drm_connectors_equal(drmModeConnectorPtr c1,
 464                                         drmModeConnectorPtr c2)
 465 {
 466         int i;
 467
 468         COMPARE(c1, c2, connector_id);
 469         COMPARE(c1, c2, connector_type);
 470         COMPARE(c1, c2, connector_type_id);
 471         COMPARE(c1, c2, mmWidth);
 472         COMPARE(c1, c2, mmHeight);
 473         COMPARE(c1, c2, count_modes);
 474         COMPARE(c1, c2, count_props);
 475         COMPARE(c1, c2, count_encoders);
 476         COMPARE_ARRAY(c1, c2, c1->count_props, props);
 477         COMPARE_ARRAY(c1, c2, c1->count_encoders, encoders);
 478
 479         for (i = 0; i < c1->count_modes; i++)
 480                 assert_modes_equal(&c1->modes[0], &c2->modes[0]);
 481 }
 482
 483 static void assert_drm_encoders_equal(drmModeEncoderPtr e1,
 484                                       drmModeEncoderPtr e2)
 485 {
 486         COMPARE(e1, e2, encoder_id);
 487         COMPARE(e1, e2, encoder_type);
 488         COMPARE(e1, e2, possible_crtcs);
 489         COMPARE(e1, e2, possible_clones);
 490 }
 491
 492 static void assert_drm_crtcs_equal(drmModeCrtcPtr c1, drmModeCrtcPtr c2)
 493 {
 494         COMPARE(c1, c2, crtc_id);
 495 }
 496
 497 static void assert_drm_edids_equal(drmModePropertyBlobPtr e1,
 498                                    drmModePropertyBlobPtr e2)
 499 {
 500         if (!e1 && !e2)
 501                 return;
 502         igt_assert(e1 && e2);
 503
 504         COMPARE(e1, e2, id);
 505         COMPARE(e1, e2, length);
 506
 507         igt_assert(memcmp(e1->data, e2->data, e1->length) == 0);
 508 }
 509
 510 static void assert_drm_infos_equal(struct compare_data *d1,
 511                                    struct compare_data *d2)
 512 {
 513         int i;
 514
 515         assert_drm_resources_equal(d1, d2);
 516
 517         for (i = 0; i < d1->res->count_connectors; i++) {
 518                 assert_drm_connectors_equal(d1->connectors[i],
 519                                             d2->connectors[i]);
 520                 assert_drm_edids_equal(d1->edids[i], d2->edids[i]);
 521         }
 522
 523         for (i = 0; i < d1->res->count_encoders; i++)
 524                 assert_drm_encoders_equal(d1->encoders[i], d2->encoders[i]);
 525
 526         for (i = 0; i < d1->res->count_crtcs; i++)
 527                 assert_drm_crtcs_equal(d1->crtcs[i], d2->crtcs[i]);
 528 }
 529
 530 /* We could check the checksum too, but just the header is probably enough. */
 531 static bool edid_is_valid(const unsigned char *edid)
 532 {
 533         char edid_header[] = {
 534                 0x0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x0,
 535         };
 536
 537         return (memcmp(edid, edid_header, sizeof(edid_header)) == 0);
 538 }
 539
 540 static int count_drm_valid_edids(struct mode_set_data *data)
 541 {
 542         int i, ret = 0;
 543
 544         for (i = 0; i < data->res->count_connectors; i++)
 545                 if (data->edids[i] && edid_is_valid(data->edids[i]->data))
 546                         ret++;
 547         return ret;
 548 }
 549
 550 static bool i2c_edid_is_valid(int fd)
 551 {
 552         int rc;
 553         unsigned char edid[128] = {};
 554         struct i2c_msg msgs[] = {
 555                 { /* Start at 0. */
 556                         .addr = 0x50,
 557                         .flags = 0,
 558                         .len = 1,
 559                         .buf = edid,
 560                 }, { /* Now read the EDID. */
 561                         .addr = 0x50,
 562                         .flags = I2C_M_RD,
 563                         .len = 128,
 564                         .buf = edid,
 565                 }
 566         };
 567         struct i2c_rdwr_ioctl_data msgset = {
 568                 .msgs = msgs,
 569                 .nmsgs = 2,
 570         };
 571
 572         rc = ioctl(fd, I2C_RDWR, &msgset);
 573         return (rc >= 0) ? edid_is_valid(edid) : false;
 574 }
 575
 576 static int count_i2c_valid_edids(void)
 577 {
 578         int fd, ret = 0;
 579         DIR *dir;
 580
 581         struct dirent *dirent;
 582         char full_name[32];
 583
 584         dir = opendir("/dev/");
 585         igt_assert(dir);
 586
 587         while ((dirent = readdir(dir))) {
 588                 if (strncmp(dirent->d_name, "i2c-", 4) == 0) {
 589                         snprintf(full_name, 32, "/dev/%s", dirent->d_name);
 590                         fd = open(full_name, O_RDWR);
 591                         igt_assert(fd != -1);
 592                         if (i2c_edid_is_valid(fd))
 593                                 ret++;
 594                         close(fd);
 595                 }
 596         }
 597
 598         closedir(dir);
 599
 600         return ret;
 601 }
 602
 603 static void test_i2c(struct mode_set_data *data)
 604 {
 605         int i2c_edids = count_i2c_valid_edids();
 606         int drm_edids = count_drm_valid_edids(data);
 607
 608         igt_assert_cmpint(i2c_edids, ==, drm_edids);
 609 }
 610
 611 static void setup_pc8(void)
 612 {
 613         has_pc8 = false;
 614
 615         /* Only Haswell supports the PC8 feature. */
 616         if (!IS_HASWELL(ms_data.devid) && !IS_BROADWELL(ms_data.devid))
 617                 return;
 618
 619         /* Make sure our Kernel supports MSR and the module is loaded. */
 620         igt_assert(system("modprobe -q msr > /dev/null 2>&1") != -1);
 621
 622         msr_fd = open("/dev/cpu/0/msr", O_RDONLY);
 623         igt_assert_f(msr_fd >= 0,
 624                      "Can't open /dev/cpu/0/msr.\n");
 625
 626         /* Non-ULT machines don't support PC8+. */
 627         if (!supports_pc8_plus_residencies())
 628                 return;
 629
 630         pc8_status_fd = open("/sys/kernel/debug/dri/0/i915_pc8_status",
 631                              O_RDONLY);
 632         igt_assert_f(pc8_status_fd >= 0,
 633                      "Can't open /sys/kernel/debug/dri/0/i915_pc8_status");
 634
 635         has_pc8 = true;
 636 }
 637
 638 /* If we want to actually reach PC8+ states, we need to properly configure all
 639  * the devices on the system to allow this. This function will try to setup the
 640  * things we know we need, but won't scream in case anything fails: we don't
 641  * know which devices are present on your machine, so we can't really expect
 642  * anything, just try to help with the more common problems. */
 643 static void setup_non_graphics_runtime_pm(void)
 644 {
 645         int fd, i;
 646         char *file_name;
 647
 648         /* Disk runtime PM policies. */
 649         file_name = malloc(PATH_MAX);
 650         for (i = 0; ; i++) {
 651
 652                 snprintf(file_name, PATH_MAX,
 653                          "/sys/class/scsi_host/host%d/link_power_management_policy",
 654                          i);
 655
 656                 fd = open(file_name, O_WRONLY);
 657                 if (fd < 0)
 658                         break;
 659
 660                 write(fd, "min_power\n", 10);
 661                 close(fd);
 662         }
 663         free(file_name);
 664
 665         /* Audio runtime PM policies. */
 666         fd = open("/sys/module/snd_hda_intel/parameters/power_save", O_WRONLY);
 667         if (fd >= 0) {
 668                 write(fd, "1\n", 2);
 669                 close(fd);
 670         }
 671         fd = open("/sys/bus/pci/devices/0000:00:03.0/power/control", O_WRONLY);
 672         if (fd >= 0) {
 673                 write(fd, "auto\n", 5);
 674                 close(fd);
 675         }
 676 }
 677
 678 static void setup_environment(void)
 679 {
 680         drm_fd = drm_open_any();
 681         igt_assert(drm_fd >= 0);
 682
 683         igt_require_f(drmSetMaster(drm_fd) == 0, "Can't become DRM master, "
 684                       "please check if no other DRM client is running.\n");
 685
 686         init_mode_set_data(&ms_data);
 687
 688         setup_non_graphics_runtime_pm();
 689
 690         has_runtime_pm = igt_setup_runtime_pm();
 691         setup_pc8();
 692
 693         igt_info("Runtime PM support: %d\n", has_runtime_pm);
 694         igt_info("PC8 residency support: %d\n", has_pc8);
 695
 696         igt_require(has_runtime_pm);
 697 }
 698
 699 static void teardown_environment(void)
 700 {
 701         struct scanout_fb *fb, *fb_next;
 702
 703         fb = fbs;
 704         while (fb) {
 705                 fb_next = fb->next;
 706                 free(fb);
 707                 fb = fb_next;
 708         }
 709
 710         fini_mode_set_data(&ms_data);
 711         drmClose(drm_fd);
 712         close(msr_fd);
 713         if (has_pc8)
 714                 close(pc8_status_fd);
 715 }
 716
 717 static void basic_subtest(void)
 718 {
 719         disable_all_screens(&ms_data);
 720         igt_assert(wait_for_suspended());
 721
 722         enable_one_screen(&ms_data);
 723         igt_assert(wait_for_active());
 724 }
 725
 726 static void pc8_residency_subtest(void)
 727 {
 728         igt_require(has_pc8);
 729
 730         /* Make sure PC8+ residencies move! */
 731         disable_all_screens(&ms_data);
 732         igt_assert_f(pc8_plus_residency_changed(120),
 733                      "Machine is not reaching PC8+ states, please check its "
 734                      "configuration.\n");
 735
 736         /* Make sure PC8+ residencies stop! */
 737         enable_one_screen(&ms_data);
 738         igt_assert_f(!pc8_plus_residency_changed(10),
 739                      "PC8+ residency didn't stop with screen enabled.\n");
 740 }
 741
 742 static void modeset_subtest(enum screen_type type, int rounds, int wait_flags)
 743 {
 744         int i;
 745
 746         if (wait_flags & WAIT_PC8_RES)
 747                 igt_require(has_pc8);
 748
 749         for (i = 0; i < rounds; i++) {
 750                 if (wait_flags & USE_DPMS)
 751                         disable_all_screens_dpms(&ms_data);
 752                 else
 753                         disable_all_screens(&ms_data);
 754
 755                 if (wait_flags & WAIT_STATUS)
 756                         igt_assert(wait_for_suspended());
 757                 if (wait_flags & WAIT_PC8_RES)
 758                         igt_assert(pc8_plus_residency_changed(120));
 759                 if (wait_flags & WAIT_EXTRA)
 760                         sleep(5);
 761
 762                 /* If we skip this line it's because the type of screen we want
 763                  * is not connected. */
 764                 igt_require(enable_one_screen_with_type(&ms_data, type));
 765                 if (wait_flags & WAIT_STATUS)
 766                         igt_assert(wait_for_active());
 767                 if (wait_flags & WAIT_PC8_RES)
 768                         igt_assert(!pc8_plus_residency_changed(5));
 769                 if (wait_flags & WAIT_EXTRA)
 770                         sleep(5);
 771         }
 772 }
 773
 774 /* Test of the DRM resources reported by the IOCTLs are still the same. This
 775  * ensures we still see the monitors with the same eyes. We get the EDIDs and
 776  * compare them, which ensures we use DP AUX or GMBUS depending on what's
 777  * connected. */
 778 static void drm_resources_equal_subtest(void)
 779 {
 780         struct compare_data pre_suspend, during_suspend, post_suspend;
 781
 782         enable_one_screen(&ms_data);
 783         igt_assert(wait_for_active());
 784         get_drm_info(&pre_suspend);
 785         igt_assert(wait_for_active());
 786
 787         disable_all_screens(&ms_data);
 788         igt_assert(wait_for_suspended());
 789         get_drm_info(&during_suspend);
 790         igt_assert(wait_for_suspended());
 791
 792         enable_one_screen(&ms_data);
 793         igt_assert(wait_for_active());
 794         get_drm_info(&post_suspend);
 795         igt_assert(wait_for_active());
 796
 797         assert_drm_infos_equal(&pre_suspend, &during_suspend);
 798         assert_drm_infos_equal(&pre_suspend, &post_suspend);
 799
 800         free_drm_info(&pre_suspend);
 801         free_drm_info(&during_suspend);
 802         free_drm_info(&post_suspend);
 803 }
 804
 805 static void i2c_subtest_check_environment(void)
 806 {
 807         int i2c_dev_files = 0;
 808         DIR *dev_dir;
 809         struct dirent *dirent;
 810
 811         /* Make sure the /dev/i2c-* files exist. */
 812         igt_assert(system("modprobe -q i2c-dev > /dev/null 2>&1") != -1);
 813
 814         dev_dir = opendir("/dev");
 815         igt_assert(dev_dir);
 816         while ((dirent = readdir(dev_dir))) {
 817                 if (strncmp(dirent->d_name, "i2c-", 4) == 0)
 818                         i2c_dev_files++;
 819         }
 820         closedir(dev_dir);
 821         igt_require(i2c_dev_files);
 822 }
 823
 824 /* Try to use raw I2C, which also needs interrupts. */
 825 static void i2c_subtest(void)
 826 {
 827         i2c_subtest_check_environment();
 828
 829         enable_one_screen(&ms_data);
 830         igt_assert(wait_for_active());
 831
 832         disable_all_screens(&ms_data);
 833         igt_assert(wait_for_suspended());
 834         test_i2c(&ms_data);
 835         igt_assert(wait_for_suspended());
 836
 837         enable_one_screen(&ms_data);
 838 }
 839
 840 static void read_full_file(const char *name)
 841 {
 842         int rc, fd;
 843         char buf[128];
 844
 845         igt_assert_f(wait_for_suspended(), "File: %s\n", name);
 846
 847         fd = open(name, O_RDONLY);
 848         if (fd < 0)
 849                 return;
 850
 851         do {
 852                 rc = read(fd, buf, ARRAY_SIZE(buf));
 853         } while (rc == ARRAY_SIZE(buf));
 854
 855         rc = close(fd);
 856         igt_assert(rc == 0);
 857
 858         igt_assert_f(wait_for_suspended(), "File: %s\n", name);
 859 }
 860
 861 static void read_files_from_dir(const char *name, int level)
 862 {
 863         DIR *dir;
 864         struct dirent *dirent;
 865         char *full_name;
 866         int rc;
 867
 868         dir = opendir(name);
 869         igt_assert(dir);
 870
 871         full_name = malloc(PATH_MAX);
 872
 873         igt_assert(level < 128);
 874
 875         while ((dirent = readdir(dir))) {
 876                 struct stat stat_buf;
 877
 878                 if (strcmp(dirent->d_name, ".") == 0)
 879                         continue;
 880                 if (strcmp(dirent->d_name, "..") == 0)
 881                         continue;
 882
 883                 snprintf(full_name, PATH_MAX, "%s/%s", name, dirent->d_name);
 884
 885                 rc = lstat(full_name, &stat_buf);
 886                 igt_assert(rc == 0);
 887
 888                 if (S_ISDIR(stat_buf.st_mode))
 889                         read_files_from_dir(full_name, level + 1);
 890
 891                 if (S_ISREG(stat_buf.st_mode))
 892                         read_full_file(full_name);
 893         }
 894
 895         free(full_name);
 896         closedir(dir);
 897 }
 898
 899 /* This test will probably pass, with a small chance of hanging the machine in
 900  * case of bugs. Many of the bugs exercised by this patch just result in dmesg
 901  * errors, so a "pass" here should be confirmed by a check on dmesg. */
 902 static void debugfs_read_subtest(void)
 903 {
 904         const char *path = "/sys/kernel/debug/dri/0";
 905         DIR *dir;
 906
 907         dir = opendir(path);
 908         igt_require_f(dir, "Can't open the debugfs directory\n");
 909         closedir(dir);
 910
 911         disable_all_screens(&ms_data);
 912         igt_assert(wait_for_suspended());
 913
 914         read_files_from_dir(path, 0);
 915 }
 916
 917 /* Read the comment on debugfs_read_subtest(). */
 918 static void sysfs_read_subtest(void)
 919 {
 920         const char *path = "/sys/devices/pci0000:00/0000:00:02.0";
 921         DIR *dir;
 922
 923         dir = opendir(path);
 924         igt_require_f(dir, "Can't open the sysfs directory\n");
 925         closedir(dir);
 926
 927         disable_all_screens(&ms_data);
 928         igt_assert(wait_for_suspended());
 929
 930         read_files_from_dir(path, 0);
 931 }
 932
 933 /* Make sure we don't suspend when we have the i915_forcewake_user file open. */
 934 static void debugfs_forcewake_user_subtest(void)
 935 {
 936         int fd, rc;
 937
 938         igt_require(intel_gen(ms_data.devid) >= 6);
 939
 940         disable_all_screens(&ms_data);
 941         igt_assert(wait_for_suspended());
 942
 943         fd = igt_open_forcewake_handle();
 944         igt_require(fd >= 0);
 945
 946         if (has_runtime_pm) {
 947                 igt_assert(wait_for_active());
 948                 sleep(10);
 949                 igt_assert(wait_for_active());
 950         } else {
 951                 igt_assert(wait_for_suspended());
 952         }
 953
 954         rc = close(fd);
 955         igt_assert(rc == 0);
 956
 957         igt_assert(wait_for_suspended());
 958 }
 959
 960 static void gem_mmap_subtest(bool gtt_mmap)
 961 {
 962         int i;
 963         uint32_t handle;
 964         int buf_size = 8192;
 965         uint8_t *gem_buf;
 966
 967         /* Create, map and set data while the device is active. */
 968         enable_one_screen(&ms_data);
 969         igt_assert(wait_for_active());
 970
 971         handle = gem_create(drm_fd, buf_size);
 972
 973         if (gtt_mmap)
 974                 gem_buf = gem_mmap__gtt(drm_fd, handle, buf_size,
 975                                         PROT_READ | PROT_WRITE);
 976         else
 977                 gem_buf = gem_mmap__cpu(drm_fd, handle, buf_size, 0);
 978
 979
 980         for (i = 0; i < buf_size; i++)
 981                 gem_buf[i] = i & 0xFF;
 982
 983         for (i = 0; i < buf_size; i++)
 984                 igt_assert(gem_buf[i] == (i & 0xFF));
 985
 986         /* Now suspend, read and modify. */
 987         disable_all_screens(&ms_data);
 988         igt_assert(wait_for_suspended());
 989
 990         for (i = 0; i < buf_size; i++)
 991                 igt_assert(gem_buf[i] == (i & 0xFF));
 992         igt_assert(wait_for_suspended());
 993
 994         for (i = 0; i < buf_size; i++)
 995                 gem_buf[i] = (~i & 0xFF);
 996         igt_assert(wait_for_suspended());
 997
 998         /* Now resume and see if it's still there. */
 999         enable_one_screen(&ms_data);
1000         igt_assert(wait_for_active());
1001         for (i = 0; i < buf_size; i++)
1002                 igt_assert(gem_buf[i] == (~i & 0xFF));
1003
1004         igt_assert(munmap(gem_buf, buf_size) == 0);
1005
1006         /* Now the opposite: suspend, and try to create the mmap while
1007          * suspended. */
1008         disable_all_screens(&ms_data);
1009         igt_assert(wait_for_suspended());
1010
1011         if (gtt_mmap)
1012                 gem_buf = gem_mmap__gtt(drm_fd, handle, buf_size,
1013                                         PROT_READ | PROT_WRITE);
1014         else
1015                 gem_buf = gem_mmap__cpu(drm_fd, handle, buf_size, 0);
1016
1017         igt_assert(wait_for_suspended());
1018
1019         for (i = 0; i < buf_size; i++)
1020                 gem_buf[i] = i & 0xFF;
1021
1022         for (i = 0; i < buf_size; i++)
1023                 igt_assert(gem_buf[i] == (i & 0xFF));
1024
1025         igt_assert(wait_for_suspended());
1026
1027         /* Resume and check if it's still there. */
1028         enable_one_screen(&ms_data);
1029         igt_assert(wait_for_active());
1030         for (i = 0; i < buf_size; i++)
1031                 igt_assert(gem_buf[i] == (i & 0xFF));
1032
1033         igt_assert(munmap(gem_buf, buf_size) == 0);
1034         gem_close(drm_fd, handle);
1035 }
1036
1037 static void gem_pread_subtest(void)
1038 {
1039         int i;
1040         uint32_t handle;
1041         int buf_size = 8192;
1042         uint8_t *cpu_buf, *read_buf;
1043
1044         cpu_buf = malloc(buf_size);
1045         read_buf = malloc(buf_size);
1046         igt_assert(cpu_buf);
1047         igt_assert(read_buf);
1048         memset(cpu_buf, 0, buf_size);
1049         memset(read_buf, 0, buf_size);
1050
1051         /* Create and set data while the device is active. */
1052         enable_one_screen(&ms_data);
1053         igt_assert(wait_for_active());
1054
1055         handle = gem_create(drm_fd, buf_size);
1056
1057         for (i = 0; i < buf_size; i++)
1058                 cpu_buf[i] = i & 0xFF;
1059
1060         gem_write(drm_fd, handle, 0, cpu_buf, buf_size);
1061
1062         gem_read(drm_fd, handle, 0, read_buf, buf_size);
1063
1064         for (i = 0; i < buf_size; i++)
1065                 igt_assert(cpu_buf[i] == read_buf[i]);
1066
1067         /* Now suspend, read and modify. */
1068         disable_all_screens(&ms_data);
1069         igt_assert(wait_for_suspended());
1070
1071         memset(read_buf, 0, buf_size);
1072         gem_read(drm_fd, handle, 0, read_buf, buf_size);
1073
1074         for (i = 0; i < buf_size; i++)
1075                 igt_assert(cpu_buf[i] == read_buf[i]);
1076         igt_assert(wait_for_suspended());
1077
1078         for (i = 0; i < buf_size; i++)
1079                 cpu_buf[i] = (~i & 0xFF);
1080         gem_write(drm_fd, handle, 0, cpu_buf, buf_size);
1081         igt_assert(wait_for_suspended());
1082
1083         /* Now resume and see if it's still there. */
1084         enable_one_screen(&ms_data);
1085         igt_assert(wait_for_active());
1086
1087         memset(read_buf, 0, buf_size);
1088         gem_read(drm_fd, handle, 0, read_buf, buf_size);
1089
1090         for (i = 0; i < buf_size; i++)
1091                 igt_assert(cpu_buf[i] == read_buf[i]);
1092
1093         gem_close(drm_fd, handle);
1094
1095         free(cpu_buf);
1096         free(read_buf);
1097 }
1098
1099 /* Paints a square of color $color, size $width x $height, at position $x x $y
1100  * of $dst_handle, which contains pitch $pitch. */
1101 static void submit_blt_cmd(uint32_t dst_handle, uint16_t x, uint16_t y,
1102                            uint16_t width, uint16_t height, uint32_t pitch,
1103                            uint32_t color, uint32_t *presumed_dst_offset)
1104 {
1105         int i, reloc_pos;
1106         uint32_t batch_handle;
1107         int batch_size = 8 * sizeof(uint32_t);
1108         uint32_t batch_buf[batch_size];
1109         struct drm_i915_gem_execbuffer2 execbuf = {};
1110         struct drm_i915_gem_exec_object2 objs[2] = {{}, {}};
1111         struct drm_i915_gem_relocation_entry relocs[1] = {{}};
1112         struct drm_i915_gem_wait gem_wait;
1113
1114         i = 0;
1115
1116         if (intel_gen(ms_data.devid) >= 8)
1117                 batch_buf[i++] = XY_COLOR_BLT_CMD_NOLEN |
1118                                  XY_COLOR_BLT_WRITE_ALPHA |
1119                                  XY_COLOR_BLT_WRITE_RGB | 0x5;
1120         else
1121                 batch_buf[i++] = XY_COLOR_BLT_CMD_NOLEN |
1122                                  XY_COLOR_BLT_WRITE_ALPHA |
1123                                  XY_COLOR_BLT_WRITE_RGB | 0x4;
1124         batch_buf[i++] = (3 << 24) | (0xF0 << 16) | (pitch);
1125         batch_buf[i++] = (y << 16) | x;
1126         batch_buf[i++] = ((y + height) << 16) | (x + width);
1127         reloc_pos = i;
1128         batch_buf[i++] = *presumed_dst_offset;
1129         if (intel_gen(ms_data.devid) >= 8)
1130                 batch_buf[i++] = 0;
1131         batch_buf[i++] = color;
1132
1133         batch_buf[i++] = MI_BATCH_BUFFER_END;
1134         if (intel_gen(ms_data.devid) < 8)
1135                 batch_buf[i++] = MI_NOOP;
1136
1137         igt_assert(i * sizeof(uint32_t) == batch_size);
1138
1139         batch_handle = gem_create(drm_fd, batch_size);
1140         gem_write(drm_fd, batch_handle, 0, batch_buf, batch_size);
1141
1142         relocs[0].target_handle = dst_handle;
1143         relocs[0].delta = 0;
1144         relocs[0].offset = reloc_pos * sizeof(uint32_t);
1145         relocs[0].presumed_offset = *presumed_dst_offset;
1146         relocs[0].read_domains = 0;
1147         relocs[0].write_domain = I915_GEM_DOMAIN_RENDER;
1148
1149         objs[0].handle = dst_handle;
1150         objs[0].alignment = 64;
1151
1152         objs[1].handle = batch_handle;
1153         objs[1].relocation_count = 1;
1154         objs[1].relocs_ptr = (uintptr_t)relocs;
1155
1156         execbuf.buffers_ptr = (uintptr_t)objs;
1157         execbuf.buffer_count = 2;
1158         execbuf.batch_len = batch_size;
1159         execbuf.flags = I915_EXEC_BLT;
1160         i915_execbuffer2_set_context_id(execbuf, 0);
1161
1162         do_ioctl(drm_fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
1163
1164         *presumed_dst_offset = relocs[0].presumed_offset;
1165
1166         gem_wait.flags = 0;
1167         gem_wait.timeout_ns = 10000000000LL; /* 10s */
1168
1169         gem_wait.bo_handle = batch_handle;
1170         do_ioctl(drm_fd, DRM_IOCTL_I915_GEM_WAIT, &gem_wait);
1171
1172         gem_wait.bo_handle = dst_handle;
1173         do_ioctl(drm_fd, DRM_IOCTL_I915_GEM_WAIT, &gem_wait);
1174
1175         gem_close(drm_fd, batch_handle);
1176 }
1177
1178 /* Make sure we can submit a batch buffer and verify its result. */
1179 static void gem_execbuf_subtest(void)
1180 {
1181         int x, y;
1182         uint32_t handle;
1183         int bpp = 4;
1184         int pitch = 128 * bpp;
1185         int dst_size = 128 * 128 * bpp; /* 128x128 square */
1186         uint32_t *cpu_buf;
1187         uint32_t presumed_offset = 0;
1188         int sq_x = 5, sq_y = 10, sq_w = 15, sq_h = 20;
1189         uint32_t color;
1190
1191         /* Create and set data while the device is active. */
1192         enable_one_screen(&ms_data);
1193         igt_assert(wait_for_active());
1194
1195         handle = gem_create(drm_fd, dst_size);
1196
1197         cpu_buf = malloc(dst_size);
1198         igt_assert(cpu_buf);
1199         memset(cpu_buf, 0, dst_size);
1200         gem_write(drm_fd, handle, 0, cpu_buf, dst_size);
1201
1202         /* Now suspend and try it. */
1203         disable_all_screens(&ms_data);
1204         igt_assert(wait_for_suspended());
1205
1206         color = 0x12345678;
1207         submit_blt_cmd(handle, sq_x, sq_y, sq_w, sq_h, pitch, color,
1208                        &presumed_offset);
1209         igt_assert(wait_for_suspended());
1210
1211         gem_read(drm_fd, handle, 0, cpu_buf, dst_size);
1212         igt_assert(wait_for_suspended());
1213         for (y = 0; y < 128; y++) {
1214                 for (x = 0; x < 128; x++) {
1215                         uint32_t px = cpu_buf[y * 128 + x];
1216
1217                         if (y >= sq_y && y < (sq_y + sq_h) &&
1218                             x >= sq_x && x < (sq_x + sq_w))
1219                                 igt_assert(px == color);
1220                         else
1221                                 igt_assert(px == 0);
1222                 }
1223         }
1224
1225         /* Now resume and check for it again. */
1226         enable_one_screen(&ms_data);
1227         igt_assert(wait_for_active());
1228
1229         memset(cpu_buf, 0, dst_size);
1230         gem_read(drm_fd, handle, 0, cpu_buf, dst_size);
1231         for (y = 0; y < 128; y++) {
1232                 for (x = 0; x < 128; x++) {
1233                         uint32_t px = cpu_buf[y * 128 + x];
1234
1235                         if (y >= sq_y && y < (sq_y + sq_h) &&
1236                             x >= sq_x && x < (sq_x + sq_w))
1237                                 igt_assert(px == color);
1238                         else
1239                                 igt_assert(px == 0);
1240                 }
1241         }
1242
1243         /* Now we'll do the opposite: do the blt while active, then read while
1244          * suspended. We use the same spot, but a different color. As a bonus,
1245          * we're testing the presumed_offset from the previous command. */
1246         color = 0x87654321;
1247         submit_blt_cmd(handle, sq_x, sq_y, sq_w, sq_h, pitch, color,
1248                        &presumed_offset);
1249
1250         disable_all_screens(&ms_data);
1251         igt_assert(wait_for_suspended());
1252
1253         memset(cpu_buf, 0, dst_size);
1254         gem_read(drm_fd, handle, 0, cpu_buf, dst_size);
1255         for (y = 0; y < 128; y++) {
1256                 for (x = 0; x < 128; x++) {
1257                         uint32_t px = cpu_buf[y * 128 + x];
1258
1259                         if (y >= sq_y && y < (sq_y + sq_h) &&
1260                             x >= sq_x && x < (sq_x + sq_w))
1261                                 igt_assert(px == color);
1262                         else
1263                                 igt_assert(px == 0);
1264                 }
1265         }
1266
1267         gem_close(drm_fd, handle);
1268
1269         free(cpu_buf);
1270 }
1271
1272 /* Assuming execbuf already works, let's see what happens when we force many
1273  * suspend/resume cycles with commands. */
1274 static void gem_execbuf_stress_subtest(int rounds, int wait_flags)
1275 {
1276         int i;
1277         int batch_size = 4 * sizeof(uint32_t);
1278         uint32_t batch_buf[batch_size];
1279         uint32_t handle;
1280         struct drm_i915_gem_execbuffer2 execbuf = {};
1281         struct drm_i915_gem_exec_object2 objs[1] = {{}};
1282
1283         if (wait_flags & WAIT_PC8_RES)
1284                 igt_require(has_pc8);
1285
1286         i = 0;
1287         batch_buf[i++] = MI_NOOP;
1288         batch_buf[i++] = MI_NOOP;
1289         batch_buf[i++] = MI_BATCH_BUFFER_END;
1290         batch_buf[i++] = MI_NOOP;
1291         igt_assert(i * sizeof(uint32_t) == batch_size);
1292
1293         disable_all_screens(&ms_data);
1294         igt_assert(wait_for_suspended());
1295
1296         handle = gem_create(drm_fd, batch_size);
1297         gem_write(drm_fd, handle, 0, batch_buf, batch_size);
1298
1299         objs[0].handle = handle;
1300
1301         execbuf.buffers_ptr = (uintptr_t)objs;
1302         execbuf.buffer_count = 1;
1303         execbuf.batch_len = batch_size;
1304         execbuf.flags = I915_EXEC_RENDER;
1305         i915_execbuffer2_set_context_id(execbuf, 0);
1306
1307         for (i = 0; i < rounds; i++) {
1308                 do_ioctl(drm_fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
1309
1310                 if (wait_flags & WAIT_STATUS)
1311                         igt_assert(wait_for_suspended());
1312                 if (wait_flags & WAIT_PC8_RES)
1313                         igt_assert(pc8_plus_residency_changed(120));
1314                 if (wait_flags & WAIT_EXTRA)
1315                         sleep(5);
1316         }
1317
1318         gem_close(drm_fd, handle);
1319 }
1320
1321 /* When this test was written, it triggered WARNs and DRM_ERRORs on dmesg. */
1322 static void gem_idle_subtest(void)
1323 {
1324         disable_all_screens(&ms_data);
1325         igt_assert(wait_for_suspended());
1326
1327         sleep(5);
1328
1329         gem_quiescent_gpu(drm_fd);
1330 }
1331
1332 /* This also triggered WARNs on dmesg at some point. */
1333 static void reg_read_ioctl_subtest(void)
1334 {
1335         struct drm_i915_reg_read rr = {
1336                 .offset = 0x2358, /* render ring timestamp */
1337         };
1338
1339         disable_all_screens(&ms_data);
1340         igt_assert(wait_for_suspended());
1341
1342         do_ioctl(drm_fd, DRM_IOCTL_I915_REG_READ, &rr);
1343
1344         igt_assert(wait_for_suspended());
1345 }
1346
1347 static bool device_in_pci_d3(void)
1348 {
1349         struct pci_device *pci_dev;
1350         int rc;
1351         uint16_t val;
1352
1353         pci_dev = intel_get_pci_device();
1354
1355         rc = pci_device_cfg_read_u16(pci_dev, &val, 0xd4);
1356         igt_assert(rc == 0);
1357
1358         return (val & 0x3) == 0x3;
1359 }
1360
1361 static void pci_d3_state_subtest(void)
1362 {
1363         igt_require(has_runtime_pm);
1364
1365         disable_all_screens(&ms_data);
1366         igt_assert(wait_for_suspended());
1367
1368         igt_assert(device_in_pci_d3());
1369
1370         enable_one_screen(&ms_data);
1371         igt_assert(wait_for_active());
1372
1373         igt_assert(!device_in_pci_d3());
1374 }
1375
1376 static void stay_subtest(void)
1377 {
1378         disable_all_screens(&ms_data);
1379         igt_assert(wait_for_suspended());
1380
1381         while (1)
1382                 sleep(600);
1383 }
1384
1385 static void system_suspend_subtest(void)
1386 {
1387         disable_all_screens(&ms_data);
1388         igt_assert(wait_for_suspended());
1389         igt_system_suspend_autoresume();
1390         igt_assert(wait_for_suspended());
1391 }
1392
1393 /* Enable a screen, activate DPMS, then do a modeset. At some point our driver
1394  * produced WARNs on this case. */
1395 static void dpms_mode_unset_subtest(enum screen_type type)
1396 {
1397         disable_all_screens(&ms_data);
1398         igt_assert(wait_for_suspended());
1399
1400         igt_require(enable_one_screen_with_type(&ms_data, type));
1401         igt_assert(wait_for_active());
1402
1403         disable_all_screens_dpms(&ms_data);
1404         igt_assert(wait_for_suspended());
1405
1406         disable_all_screens(&ms_data);
1407         igt_assert(wait_for_suspended());
1408 }
1409
1410 int rounds = 50;
1411 bool stay = false;
1412
1413 static int opt_handler(int opt, int opt_index)
1414 {
1415         switch (opt) {
1416         case 'q':
1417                 rounds = 10;
1418                 break;
1419         case 's':
1420                 stay = true;
1421                 break;
1422         default:
1423                 igt_assert(0);
1424         }
1425
1426         return 0;
1427 }
1428
1429 int main(int argc, char *argv[])
1430 {
1431         const char *help_str =
1432                "  --quick\t\tMake the stress-tests not stressful, for quick regression testing.\n"
1433                "  --stay\t\tDisable all screen and try to go into runtime pm. Useful for debugging.";
1434         static struct option long_options[] = {
1435                 {"quick", 0, 0, 'q'},
1436                 {"stay", 0, 0, 's'},
1437                 { 0, 0, 0, 0 }
1438         };
1439
1440         igt_subtest_init_parse_opts(argc, argv, "", long_options,
1441                                     help_str, opt_handler);
1442
1443         /* Skip instead of failing in case the machine is not prepared to reach
1444          * PC8+. We don't want bug reports from cases where the machine is just
1445          * not properly configured. */
1446         igt_fixture
1447                 setup_environment();
1448
1449         if (stay)
1450                 igt_subtest("stay")
1451                         stay_subtest();
1452
1453         /* Essential things */
1454         igt_subtest("rte")
1455                 basic_subtest();
1456         igt_subtest("drm-resources-equal")
1457                 drm_resources_equal_subtest();
1458         igt_subtest("pci-d3-state")
1459                 pci_d3_state_subtest();
1460
1461         /* Basic modeset */
1462         igt_subtest("modeset-lpsp")
1463                 modeset_subtest(SCREEN_TYPE_LPSP, 1, WAIT_STATUS);
1464         igt_subtest("modeset-non-lpsp")
1465                 modeset_subtest(SCREEN_TYPE_NON_LPSP, 1, WAIT_STATUS);
1466         igt_subtest("dpms-lpsp")
1467                 modeset_subtest(SCREEN_TYPE_LPSP, 1, WAIT_STATUS | USE_DPMS);
1468         igt_subtest("dpms-non-lpsp")
1469                 modeset_subtest(SCREEN_TYPE_NON_LPSP, 1, WAIT_STATUS | USE_DPMS);
1470
1471         /* GEM */
1472         igt_subtest("gem-mmap-cpu")
1473                 gem_mmap_subtest(false);
1474         igt_subtest("gem-mmap-gtt")
1475                 gem_mmap_subtest(true);
1476         igt_subtest("gem-pread")
1477                 gem_pread_subtest();
1478         igt_subtest("gem-execbuf")
1479                 gem_execbuf_subtest();
1480         igt_subtest("gem-idle")
1481                 gem_idle_subtest();
1482
1483         /* Misc */
1484         igt_subtest("reg-read-ioctl")
1485                 reg_read_ioctl_subtest();
1486         igt_subtest("i2c")
1487                 i2c_subtest();
1488         igt_subtest("pc8-residency")
1489                 pc8_residency_subtest();
1490         igt_subtest("debugfs-read")
1491                 debugfs_read_subtest();
1492         igt_subtest("debugfs-forcewake-user")
1493                 debugfs_forcewake_user_subtest();
1494         igt_subtest("sysfs-read")
1495                 sysfs_read_subtest();
1496         igt_subtest("dpms-mode-unset-lpsp")
1497                 dpms_mode_unset_subtest(SCREEN_TYPE_LPSP);
1498         igt_subtest("dpms-mode-unset-non-lpsp")
1499                 dpms_mode_unset_subtest(SCREEN_TYPE_NON_LPSP);
1500
1501         /* Modeset stress */
1502         igt_subtest("modeset-lpsp-stress")
1503                 modeset_subtest(SCREEN_TYPE_LPSP, rounds, WAIT_STATUS);
1504         igt_subtest("modeset-non-lpsp-stress")
1505                 modeset_subtest(SCREEN_TYPE_NON_LPSP, rounds, WAIT_STATUS);
1506         igt_subtest("modeset-lpsp-stress-no-wait")
1507                 modeset_subtest(SCREEN_TYPE_LPSP, rounds, DONT_WAIT);
1508         igt_subtest("modeset-non-lpsp-stress-no-wait")
1509                 modeset_subtest(SCREEN_TYPE_NON_LPSP, rounds, DONT_WAIT);
1510         igt_subtest("modeset-pc8-residency-stress")
1511                 modeset_subtest(SCREEN_TYPE_ANY, rounds, WAIT_PC8_RES);
1512         igt_subtest("modeset-stress-extra-wait")
1513                 modeset_subtest(SCREEN_TYPE_ANY, rounds,
1514                                 WAIT_STATUS | WAIT_EXTRA);
1515
1516         /* System suspend */
1517         igt_subtest("system-suspend")
1518                 system_suspend_subtest();
1519
1520         /* GEM stress */
1521         igt_subtest("gem-execbuf-stress")
1522                 gem_execbuf_stress_subtest(rounds, WAIT_STATUS);
1523         igt_subtest("gem-execbuf-stress-pc8")
1524                 gem_execbuf_stress_subtest(rounds, WAIT_PC8_RES);
1525         igt_subtest("gem-execbuf-stress-extra-wait")
1526                 gem_execbuf_stress_subtest(rounds, WAIT_STATUS | WAIT_EXTRA);
1527
1528         igt_fixture
1529                 teardown_environment();
1530
1531         igt_exit();
1532 }