2 * Copyright © 2013 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "drm_fourcc.h"
33 #include "igt_debugfs.h"
35 #include "intel_batchbuffer.h"
44 TEST_PAGE_FLIP_AND_MMAP_CPU,
45 TEST_PAGE_FLIP_AND_MMAP_GTT,
46 TEST_PAGE_FLIP_AND_BLT,
47 TEST_PAGE_FLIP_AND_RENDER,
48 TEST_PAGE_FLIP_AND_CONTEXT,
52 struct kmstest_connector_config config;
54 struct kmstest_fb fb[2];
59 drmModeRes *resources;
61 igt_pipe_crc_t **pipe_crc;
62 drm_intel_bufmgr *bufmgr;
63 drm_intel_context *ctx[2];
71 static const char *test_mode_str(enum test_mode mode)
73 static const char * const test_modes[] = {
74 [TEST_PAGE_FLIP] = "page_flip",
75 [TEST_MMAP_CPU] = "mmap_cpu",
76 [TEST_MMAP_GTT] = "mmap_gtt",
78 [TEST_RENDER] = "render",
79 [TEST_CONTEXT] = "context",
80 [TEST_PAGE_FLIP_AND_MMAP_CPU] = "page_flip_and_mmap_cpu",
81 [TEST_PAGE_FLIP_AND_MMAP_GTT] = "page_flip_and_mmap_gtt",
82 [TEST_PAGE_FLIP_AND_BLT] = "page_flip_and_blt",
83 [TEST_PAGE_FLIP_AND_RENDER] = "page_flip_and_render",
84 [TEST_PAGE_FLIP_AND_CONTEXT] = "page_flip_and_context",
87 return test_modes[mode];
90 static uint32_t create_fb(data_t *data,
92 double r, double g, double b,
93 struct kmstest_fb *fb)
98 fb_id = kmstest_create_fb2(data->drm_fd, w, h,
99 DRM_FORMAT_XRGB8888, true, fb);
102 cr = kmstest_get_cairo_ctx(data->drm_fd, fb);
103 kmstest_paint_color(cr, 0, 0, w, h, r, g, b);
104 igt_assert(cairo_status(cr) == 0);
111 connector_set_mode(data_t *data, connector_t *connector,
112 drmModeModeInfo *mode, uint32_t fb_id)
114 struct kmstest_connector_config *config = &connector->config;
118 fprintf(stdout, "Using pipe %c, %dx%d\n", pipe_name(config->pipe),
119 mode->hdisplay, mode->vdisplay);
122 ret = drmModeSetCrtc(data->drm_fd,
123 config->crtc->crtc_id,
126 &config->connector->connector_id,
129 igt_assert(ret == 0);
134 static void display_init(data_t *data)
136 data->resources = drmModeGetResources(data->drm_fd);
137 igt_assert(data->resources);
139 data->pipe_crc = calloc(data->resources->count_crtcs, sizeof(data->pipe_crc[0]));
142 static void display_fini(data_t *data)
144 free(data->pipe_crc);
147 static void fill_blt(data_t *data, uint32_t handle, unsigned char color)
149 drm_intel_bo *dst = gem_handle_to_libdrm_bo(data->bufmgr,
152 struct intel_batchbuffer *batch;
154 batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
158 OUT_BATCH(COLOR_BLT_CMD);
159 OUT_BATCH((1 << 24) | (0xf0 << 16) | 0);
160 OUT_BATCH(1 << 16 | 4);
161 OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
165 intel_batchbuffer_flush(batch);
166 intel_batchbuffer_free(batch);
168 gem_bo_busy(data->drm_fd, handle);
171 static void scratch_buf_init(struct scratch_buf *buf, drm_intel_bo *bo)
175 buf->tiling = I915_TILING_X;
179 static void exec_nop(data_t *data, uint32_t handle, drm_intel_context *context)
182 struct intel_batchbuffer *batch;
184 dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle);
187 batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
190 /* add the reloc to make sure the kernel will think we write to dst */
192 OUT_BATCH(MI_BATCH_BUFFER_END);
194 OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
198 intel_batchbuffer_flush_with_context(batch, context);
199 intel_batchbuffer_free(batch);
202 static void fill_render(data_t *data, uint32_t handle,
203 drm_intel_context *context, unsigned char color)
205 drm_intel_bo *src, *dst;
206 struct intel_batchbuffer *batch;
207 struct scratch_buf src_buf, dst_buf;
208 const uint8_t buf[4] = { color, color, color, color };
209 render_copyfunc_t rendercopy = get_render_copyfunc(data->devid);
211 igt_skip_on(!rendercopy);
213 dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle);
216 src = drm_intel_bo_alloc(data->bufmgr, "", 4096, 4096);
219 gem_write(data->drm_fd, src->handle, 0, buf, 4);
221 scratch_buf_init(&src_buf, src);
222 scratch_buf_init(&dst_buf, dst);
224 batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
227 rendercopy(batch, context,
228 &src_buf, 0, 0, 1, 1,
231 intel_batchbuffer_free(batch);
233 gem_bo_busy(data->drm_fd, handle);
236 static bool fbc_enabled(data_t *data)
241 status = igt_debugfs_fopen("i915_fbc_status", "r");
244 fread(str, sizeof(str) - 1, 1, status);
246 return strstr(str, "FBC enabled") != NULL;
249 static void test_crc(data_t *data, enum test_mode mode)
251 igt_pipe_crc_t *pipe_crc = data->pipe_crc[data->crtc_idx];
252 igt_crc_t *crcs = NULL;
253 uint32_t handle = data->handle[0];
255 igt_assert(fbc_enabled(data));
257 if (mode >= TEST_PAGE_FLIP_AND_MMAP_CPU) {
258 handle = data->handle[1];
259 igt_assert(drmModePageFlip(data->drm_fd, data->crtc_id,
260 data->fb_id[1], 0, NULL) == 0);
263 igt_assert(fbc_enabled(data));
269 igt_assert(drmModePageFlip(data->drm_fd, data->crtc_id,
270 data->fb_id[1], 0, NULL) == 0);
273 case TEST_PAGE_FLIP_AND_MMAP_CPU:
274 ptr = gem_mmap__cpu(data->drm_fd, handle, 4096, PROT_WRITE);
275 gem_set_domain(data->drm_fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
276 memset(ptr, 0xff, 4);
278 gem_sw_finish(data->drm_fd, handle);
281 case TEST_PAGE_FLIP_AND_MMAP_GTT:
282 ptr = gem_mmap__gtt(data->drm_fd, handle, 4096, PROT_WRITE);
283 gem_set_domain(data->drm_fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
284 memset(ptr, 0xff, 4);
288 case TEST_PAGE_FLIP_AND_BLT:
289 fill_blt(data, handle, 0xff);
293 case TEST_PAGE_FLIP_AND_RENDER:
294 case TEST_PAGE_FLIP_AND_CONTEXT:
295 fill_render(data, handle,
296 (mode == TEST_CONTEXT || mode == TEST_PAGE_FLIP_AND_CONTEXT) ?
297 data->ctx[1] : NULL, 0xff);
302 * Make sure we're looking at new data (two vblanks
303 * to leave some leeway for the kernel if we ever do
304 * some kind of delayed FBC disable for GTT mmaps.
306 igt_wait_for_vblank(data->drm_fd, data->crtc_idx);
307 igt_wait_for_vblank(data->drm_fd, data->crtc_idx);
309 igt_pipe_crc_start(pipe_crc);
310 igt_pipe_crc_get_crcs(pipe_crc, 1, &crcs);
311 igt_pipe_crc_stop(pipe_crc);
312 igt_assert(!igt_crc_equal(&crcs[0], &data->ref_crc[0]));
313 if (mode == TEST_PAGE_FLIP)
314 igt_assert(igt_crc_equal(&crcs[0], &data->ref_crc[1]));
316 igt_assert(!igt_crc_equal(&crcs[0], &data->ref_crc[1]));
320 * Allow time for FBC to kick in again if it
321 * got disabled during dirtyfb or page flip.
325 igt_assert(fbc_enabled(data));
327 igt_pipe_crc_start(pipe_crc);
328 igt_pipe_crc_get_crcs(pipe_crc, 1, &crcs);
329 igt_pipe_crc_stop(pipe_crc);
330 igt_assert(!igt_crc_equal(&crcs[0], &data->ref_crc[0]));
331 if (mode == TEST_PAGE_FLIP)
332 igt_assert(igt_crc_equal(&crcs[0], &data->ref_crc[1]));
334 igt_assert(!igt_crc_equal(&crcs[0], &data->ref_crc[1]));
338 static bool prepare_crtc(data_t *data, uint32_t connector_id, enum test_mode mode)
340 igt_pipe_crc_t *pipe_crc;
341 igt_crc_t *crcs = NULL;
342 connector_t connector;
345 ret = kmstest_get_connector_config(data->drm_fd,
352 igt_pipe_crc_free(data->pipe_crc[data->crtc_idx]);
353 data->pipe_crc[data->crtc_idx] = NULL;
355 pipe_crc = igt_pipe_crc_new(data->crtc_idx,
356 INTEL_PIPE_CRC_SOURCE_AUTO);
358 printf("auto crc not supported on this connector with crtc %i\n",
363 data->pipe_crc[data->crtc_idx] = pipe_crc;
365 data->fb_id[0] = create_fb(data,
366 connector.config.default_mode.hdisplay,
367 connector.config.default_mode.vdisplay,
368 0.0, 0.0, 0.0, &connector.fb[0]);
369 igt_assert(data->fb_id[0]);
371 data->fb_id[1] = create_fb(data,
372 connector.config.default_mode.hdisplay,
373 connector.config.default_mode.vdisplay,
374 0.1, 0.1, 0.1, &connector.fb[1]);
375 igt_assert(data->fb_id[1]);
377 data->handle[0] = connector.fb[0].gem_handle;
378 data->handle[1] = connector.fb[1].gem_handle;
380 /* scanout = fb[1] */
381 connector_set_mode(data, &connector, &connector.config.default_mode,
385 igt_skip_on(!fbc_enabled(data));
387 igt_wait_for_vblank(data->drm_fd, data->crtc_idx);
389 /* get reference crc for fb[1] */
390 igt_pipe_crc_start(pipe_crc);
391 igt_pipe_crc_get_crcs(pipe_crc, 1, &crcs);
392 data->ref_crc[1] = crcs[0];
393 igt_pipe_crc_stop(pipe_crc);
396 if (mode == TEST_CONTEXT || mode == TEST_PAGE_FLIP_AND_CONTEXT) {
397 data->ctx[0] = drm_intel_gem_context_create(data->bufmgr);
398 igt_require(data->ctx[0]);
399 data->ctx[1] = drm_intel_gem_context_create(data->bufmgr);
400 igt_require(data->ctx[1]);
403 * Disable FBC RT address for both contexts
404 * (by "rendering" to a non-scanout buffer).
406 exec_nop(data, data->handle[0], data->ctx[1]);
407 exec_nop(data, data->handle[0], data->ctx[0]);
408 exec_nop(data, data->handle[0], data->ctx[1]);
409 exec_nop(data, data->handle[0], data->ctx[0]);
412 /* scanout = fb[0] */
413 connector_set_mode(data, &connector, &connector.config.default_mode,
417 igt_skip_on(!fbc_enabled(data));
419 if (mode == TEST_CONTEXT || mode == TEST_PAGE_FLIP_AND_CONTEXT) {
421 * make ctx[0] FBC RT address point to fb[0], ctx[1]
422 * FBC RT address is left as disabled.
424 exec_nop(data, connector.fb[0].gem_handle, data->ctx[0]);
427 igt_wait_for_vblank(data->drm_fd, data->crtc_idx);
429 /* get reference crc for fb[0] */
430 igt_pipe_crc_start(pipe_crc);
431 igt_pipe_crc_get_crcs(pipe_crc, 1, &crcs);
432 data->ref_crc[0] = crcs[0];
433 igt_pipe_crc_stop(pipe_crc);
436 kmstest_free_connector_config(&connector.config);
441 static void finish_crtc(data_t *data, enum test_mode mode)
443 igt_pipe_crc_free(data->pipe_crc[data->crtc_idx]);
444 data->pipe_crc[data->crtc_idx] = NULL;
446 if (mode == TEST_CONTEXT || mode == TEST_PAGE_FLIP_AND_CONTEXT) {
447 drm_intel_gem_context_destroy(data->ctx[0]);
448 drm_intel_gem_context_destroy(data->ctx[1]);
452 static void run_test(data_t *data, enum test_mode mode)
456 for (i = 0; i < data->resources->count_connectors; i++) {
457 uint32_t connector_id = data->resources->connectors[i];
459 for (n = 0; n < data->resources->count_crtcs; n++) {
461 data->crtc_id = data->resources->crtcs[n];
463 if (!prepare_crtc(data, connector_id, mode))
466 fprintf(stdout, "Beginning %s on crtc %d, connector %d\n",
467 igt_subtest_name(), data->crtc_id, connector_id);
468 test_crc(data, mode);
470 fprintf(stdout, "\n%s on crtc %d, connector %d: PASSED\n\n",
471 igt_subtest_name(), data->crtc_id, connector_id);
473 finish_crtc(data, mode);
483 igt_skip_on_simulation();
489 data.drm_fd = drm_open_any();
490 igt_set_vt_graphics_mode();
492 data.devid = intel_get_drm_devid(data.drm_fd);
494 igt_require_pipe_crc();
496 status = igt_debugfs_fopen("i915_fbc_status", "r");
497 igt_require_f(status, "No i915_fbc_status found\n");
498 fread(buf, sizeof(buf), 1, status);
500 buf[sizeof(buf) - 1] = '\0';
501 igt_require_f(!strstr(buf, "unsupported by this chipset") &&
502 !strstr(buf, "disabled per module param") &&
503 !strstr(buf, "disabled per chip default"),
504 "FBC not supported/enabled\n");
506 data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
507 igt_assert(data.bufmgr);
508 drm_intel_bufmgr_gem_enable_reuse(data.bufmgr);
513 for (mode = TEST_PAGE_FLIP; mode <= TEST_PAGE_FLIP_AND_CONTEXT; mode++) {
514 igt_subtest_f("%s", test_mode_str(mode)) {
515 run_test(&data, mode);
520 drm_intel_bufmgr_destroy(data.bufmgr);