2 * Copyright © 2009 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
28 /** @file gem_tiled_pread_pwrite.c
30 * This is a test of pread's behavior on tiled objects with respect to the
31 * reported swizzling value.
33 * The goal is to exercise the slow_bit17_copy path for reading on bit17
34 * machines, but will also be useful for catching swizzling value bugs on
39 * Testcase: Test swizzling by testing pwrite does the invers of pread
41 * Together with the explicit pread testcase, this should cover our swizzle
44 * Note that this test will use swap in an effort to test all of ram.
55 #include <sys/ioctl.h>
59 #include "ioctl_wrappers.h"
66 static uint32_t linear[WIDTH * HEIGHT];
67 static uint32_t current_tiling_mode;
69 #define PAGE_SIZE 4096
72 gem_get_tiling(int fd, uint32_t handle, uint32_t *tiling, uint32_t *swizzle)
74 struct drm_i915_gem_get_tiling get_tiling;
77 memset(&get_tiling, 0, sizeof(get_tiling));
78 get_tiling.handle = handle;
80 ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling);
83 *tiling = get_tiling.tiling_mode;
84 *swizzle = get_tiling.swizzle_mode;
88 create_bo_and_fill(int fd)
94 handle = gem_create(fd, sizeof(linear));
95 gem_set_tiling(fd, handle, current_tiling_mode, WIDTH * sizeof(uint32_t));
97 /* Fill the BO with dwords starting at start_val */
98 data = gem_mmap(fd, handle, sizeof(linear), PROT_READ | PROT_WRITE);
99 for (i = 0; i < WIDTH*HEIGHT; i++)
101 munmap(data, sizeof(linear));
111 handle = gem_create(fd, sizeof(linear));
112 gem_set_tiling(fd, handle, current_tiling_mode, WIDTH * sizeof(uint32_t));
122 uint32_t tiling, swizzle;
123 uint32_t handle, handle_target;
127 count = SLOW_QUICK(intel_get_total_ram_mb() * 9 / 10, 8) ;
129 for (i = 0; i < count/2; i++) {
130 current_tiling_mode = I915_TILING_X;
132 handle = create_bo_and_fill(fd);
133 gem_get_tiling(fd, handle, &tiling, &swizzle);
135 gem_read(fd, handle, 0, linear, sizeof(linear));
137 handle_target = create_bo(fd);
138 gem_write(fd, handle_target, 0, linear, sizeof(linear));
140 /* Check the target bo's contents. */
141 data = gem_mmap(fd, handle_target, sizeof(linear), PROT_READ | PROT_WRITE);
142 for (j = 0; j < WIDTH*HEIGHT; j++)
143 igt_assert_f(data[j] == j,
144 "mismatch at %i: %i\n",
146 munmap(data, sizeof(linear));
148 /* Leak both bos so that we use all of system mem! */
149 gem_madvise(fd, handle_target, I915_MADV_DONTNEED);
150 gem_madvise(fd, handle, I915_MADV_DONTNEED);
152 igt_progress("gem_tiled_pread_pwrite: ", i, count/2);