2 * Copyright © 2009,2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
28 /** @file gem_tiled_fence_blits.c
30 * This is a test of doing many tiled blits, with a working set
31 * larger than the aperture size.
33 * The goal is to catch a couple types of failure;
34 * - Fence management problems on pre-965.
35 * - A17 or L-shaped memory tiling workaround problems in acceleration.
37 * The model is to fill a collection of 1MB objects in a way that can't trip
38 * over A6 swizzling -- upload data to a non-tiled object, blit to the tiled
39 * object. Then, copy the 1MB objects randomly between each other for a while.
40 * Finally, download their data through linear objects again and see what
55 #include "ioctl_wrappers.h"
57 #include "intel_bufmgr.h"
58 #include "intel_batchbuffer.h"
60 #include "intel_chipset.h"
63 static drm_intel_bufmgr *bufmgr;
64 struct intel_batchbuffer *batch;
65 static int width = 512, height = 512;
66 static uint32_t linear[1024*1024/4];
69 create_bo(int fd, uint32_t start_val)
72 uint32_t tiling = I915_TILING_X;
75 bo = drm_intel_bo_alloc(bufmgr, "tiled bo", 1024 * 1024, 4096);
76 ret = drm_intel_bo_set_tiling(bo, &tiling, width * 4);
78 igt_assert(tiling == I915_TILING_X);
80 /* Fill the BO with dwords starting at start_val */
81 for (i = 0; i < 1024 * 1024 / 4; i++)
82 linear[i] = start_val++;
84 gem_write(fd, bo->handle, 0, linear, sizeof(linear));
90 check_bo(int fd, drm_intel_bo *bo, uint32_t start_val)
94 gem_read(fd, bo->handle, 0, linear, sizeof(linear));
96 for (i = 0; i < 1024 * 1024 / 4; i++) {
97 igt_assert_f(linear[i] == start_val,
98 "Expected 0x%08x, found 0x%08x "
100 start_val, linear[i], i * 4);
107 drm_intel_bo *bo[4096];
108 uint32_t bo_start_val[4096];
112 igt_skip_on_simulation();
115 count = 3 * gem_aperture_size(fd) / (1024*1024) / 2;
116 if (count > intel_get_total_ram_mb() * 9 / 10) {
117 count = intel_get_total_ram_mb() * 9 / 10;
118 igt_info("not enough RAM to run test, reducing buffer count\n");
121 igt_info("Using %d 1MiB buffers\n", count);
123 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
124 drm_intel_bufmgr_gem_enable_reuse(bufmgr);
125 batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
127 for (i = 0; i < count; i++) {
128 bo[i] = create_bo(fd, start);
129 bo_start_val[i] = start;
132 igt_info("Creating bo %d\n", i);
133 check_bo(bo[i], bo_start_val[i]);
136 start += 1024 * 1024 / 4;
139 for (i = 0; i < count; i++) {
140 int src = count - i - 1;
141 intel_copy_bo(batch, bo[i], bo[src], width*height*4);
142 bo_start_val[i] = bo_start_val[src];
145 for (i = 0; i < count * 4; i++) {
146 int src = random() % count;
147 int dst = random() % count;
152 intel_copy_bo(batch, bo[dst], bo[src], width*height*4);
153 bo_start_val[dst] = bo_start_val[src];
156 check_bo(bo[dst], bo_start_val[dst]);
157 igt_info("%d: copy bo %d to %d\n", i, src, dst);
161 for (i = 0; i < count; i++) {
163 igt_info("check %d\n", i);
165 check_bo(fd, bo[i], bo_start_val[i]);
167 drm_intel_bo_unreference(bo[i]);
171 intel_batchbuffer_free(batch);
172 drm_intel_bufmgr_destroy(bufmgr);