2 * Copyright © 2009 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
25 * Jesse Barnes <jbarnes@virtuousgeek.org> (based on gem_bad_blit.c)
41 #include "intel_bufmgr.h"
42 #include "intel_batchbuffer.h"
43 #include "intel_gpu_tools.h"
45 static drm_intel_bufmgr *bufmgr;
46 struct intel_batchbuffer *batch;
47 static drm_intel_bo *target_buffer;
48 static int has_ppgtt = 0;
51 * Testcase: Basic bsd MI check using MI_STORE_DATA_IMM
55 store_dword_loop(int divider)
60 printf("running storedw loop on bsd with stall every %i batch\n", divider);
62 cmd = MI_STORE_DWORD_IMM;
64 cmd |= MI_MEM_VIRTUAL;
66 for (i = 0; i < 0x100000; i++) {
69 OUT_BATCH(0); /* reserved */
70 OUT_RELOC(target_buffer, I915_GEM_DOMAIN_INSTRUCTION,
71 I915_GEM_DOMAIN_INSTRUCTION, 0);
75 intel_batchbuffer_flush_on_ring(batch, I915_EXEC_BSD);
80 drm_intel_bo_map(target_buffer, 0);
82 buf = target_buffer->virtual;
85 "value mismatch: cur 0x%08x, stored 0x%08x\n",
90 drm_intel_bo_unmap(target_buffer);
96 drm_intel_bo_map(target_buffer, 0);
97 buf = target_buffer->virtual;
99 printf("completed %d writes successfully, current value: 0x%08x\n", i,
101 drm_intel_bo_unmap(target_buffer);
104 int main(int argc, char **argv)
110 fprintf(stderr, "usage: %s\n", argv[0]);
115 devid = intel_get_drm_devid(fd);
117 has_ppgtt = gem_uses_aliasing_ppgtt(fd);
119 if (IS_GEN2(devid) || IS_GEN3(devid) || IS_GEN4(devid) || IS_GEN5(devid)) {
121 fprintf(stderr, "MI_STORE_DATA can only use GTT address on gen4+/g33 and "
122 "needs snoopable mem on pre-gen6\n");
126 if (IS_GEN6(devid)) {
128 fprintf(stderr, "MI_STORE_DATA broken on gen6 bsd\n");
132 /* This only works with ppgtt */
134 fprintf(stderr, "no ppgtt detected, which is required\n");
138 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
140 fprintf(stderr, "failed to init libdrm\n");
143 drm_intel_bufmgr_gem_enable_reuse(bufmgr);
145 batch = intel_batchbuffer_alloc(bufmgr, devid);
147 fprintf(stderr, "failed to create batch buffer\n");
151 target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096);
152 if (!target_buffer) {
153 fprintf(stderr, "failed to alloc target buffer\n");
162 drm_intel_bo_unreference(target_buffer);
163 intel_batchbuffer_free(batch);
164 drm_intel_bufmgr_destroy(bufmgr);