2 * Copyright (c) 2013 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Mika Kuoppala <mika.kuoppala@intel.com>
36 #include <sys/ioctl.h>
41 #include "intel_bufmgr.h"
42 #include "intel_batchbuffer.h"
43 #include "intel_gpu_tools.h"
44 #include "rendercopy.h"
47 #define RS_BATCH_ACTIVE (1 << 0)
48 #define RS_BATCH_PENDING (1 << 1)
49 #define RS_UNKNOWN (1 << 2)
51 struct local_drm_i915_reset_stats {
60 struct local_drm_i915_gem_context_create {
65 struct local_drm_i915_gem_context_destroy {
72 #define CONTEXT_CREATE_IOCTL DRM_IOWR(DRM_COMMAND_BASE + 0x2d, struct local_drm_i915_gem_context_create)
73 #define CONTEXT_DESTROY_IOCTL DRM_IOWR(DRM_COMMAND_BASE + 0x2e, struct local_drm_i915_gem_context_destroy)
74 #define GET_RESET_STATS_IOCTL DRM_IOWR(DRM_COMMAND_BASE + 0x32, struct local_drm_i915_reset_stats)
76 static uint32_t context_create(int fd)
78 struct local_drm_i915_gem_context_create create;
81 create.ctx_id = rand();
84 ret = drmIoctl(fd, CONTEXT_CREATE_IOCTL, &create);
90 static int context_destroy(int fd, uint32_t ctx_id)
93 struct local_drm_i915_gem_context_destroy destroy;
95 destroy.ctx_id = ctx_id;
98 ret = drmIoctl(fd, CONTEXT_DESTROY_IOCTL, &destroy);
105 static int gem_reset_stats(int fd, int ctx_id,
106 struct local_drm_i915_reset_stats *rs)
112 rs->reset_count = rand();
113 rs->batch_active = rand();
114 rs->batch_pending = rand();
118 ret = ioctl(fd, GET_RESET_STATS_IOCTL, rs);
119 } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
127 static int gem_reset_status(int fd, int ctx_id)
130 struct local_drm_i915_reset_stats rs;
132 ret = gem_reset_stats(fd, ctx_id, &rs);
137 return RS_BATCH_ACTIVE;
138 if (rs.batch_pending)
139 return RS_BATCH_PENDING;
144 static int gem_exec(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
149 DRM_IOCTL_I915_GEM_EXECBUFFER2,
158 static int exec_valid(int fd, int ctx)
160 struct drm_i915_gem_execbuffer2 execbuf;
161 struct drm_i915_gem_exec_object2 exec;
164 uint32_t buf[2] = { MI_BATCH_BUFFER_END, 0 };
166 exec.handle = gem_create(fd, 4096);
167 gem_write(fd, exec.handle, 0, buf, sizeof(buf));
168 exec.relocation_count = 0;
176 execbuf.buffers_ptr = (uintptr_t)&exec;
177 execbuf.buffer_count = 1;
178 execbuf.batch_start_offset = 0;
179 execbuf.batch_len = sizeof(buf);
180 execbuf.cliprects_ptr = 0;
181 execbuf.num_cliprects = 0;
185 i915_execbuffer2_set_context_id(execbuf, ctx);
188 ret = gem_exec(fd, &execbuf);
195 #define BUFSIZE (4 * 1024)
196 #define ITEMS (BUFSIZE >> 2)
198 static int inject_hang(int fd, int ctx)
200 struct drm_i915_gem_execbuffer2 execbuf;
201 struct drm_i915_gem_exec_object2 exec;
208 buf = malloc(BUFSIZE);
209 igt_assert(buf != NULL);
211 buf[0] = MI_BATCH_BUFFER_END;
214 exec.handle = gem_create(fd, BUFSIZE);
215 gem_write(fd, exec.handle, 0, buf, BUFSIZE);
216 exec.relocation_count = 0;
224 execbuf.buffers_ptr = (uintptr_t)&exec;
225 execbuf.buffer_count = 1;
226 execbuf.batch_start_offset = 0;
227 execbuf.batch_len = BUFSIZE;
228 execbuf.cliprects_ptr = 0;
229 execbuf.num_cliprects = 0;
233 i915_execbuffer2_set_context_id(execbuf, ctx);
236 igt_assert(gem_exec(fd, &execbuf) == 0);
238 gtt_off = exec.offset;
240 for (i = 0; i < ITEMS; i++)
243 roff = random() % (ITEMS - 2);
244 buf[roff] = MI_BATCH_BUFFER_START;
245 buf[roff + 1] = gtt_off + (roff << 2);
248 printf("loop injected at 0x%lx (off 0x%x, bo_start 0x%lx, bo_end 0x%lx)\n",
249 (long unsigned int)((roff << 2) + gtt_off),
250 roff << 2, (long unsigned int)gtt_off,
251 (long unsigned int)(gtt_off + BUFSIZE - 1));
253 gem_write(fd, exec.handle, 0, buf, BUFSIZE);
255 exec.relocation_count = 0;
263 execbuf.buffers_ptr = (uintptr_t)&exec;
264 execbuf.buffer_count = 1;
265 execbuf.batch_start_offset = 0;
266 execbuf.batch_len = BUFSIZE;
267 execbuf.cliprects_ptr = 0;
268 execbuf.num_cliprects = 0;
272 i915_execbuffer2_set_context_id(execbuf, ctx);
275 igt_assert(gem_exec(fd, &execbuf) == 0);
277 igt_assert(gtt_off == exec.offset);
284 static int _assert_reset_status(int fd, int ctx, int status)
288 rs = gem_reset_status(fd, ctx);
290 printf("reset status for %d ctx %d returned %d\n",
296 printf("%d:%d reset status %d differs from assumed %d\n",
297 fd, ctx, rs, status);
305 #define assert_reset_status(fd, ctx, status) \
306 igt_assert(_assert_reset_status(fd, ctx, status) == 0)
308 static void test_rs(int num_fds, int hang_index, int rs_assumed_no_hang)
314 igt_assert (num_fds <= MAX_FD);
315 igt_assert (hang_index < MAX_FD);
317 for (i = 0; i < num_fds; i++) {
318 fd[i] = drm_open_any();
322 for (i = 0; i < num_fds; i++)
323 assert_reset_status(fd[i], 0, RS_NO_ERROR);
325 for (i = 0; i < num_fds; i++) {
327 h[i] = inject_hang(fd[i], 0);
329 h[i] = exec_valid(fd[i], 0);
332 gem_sync(fd[num_fds - 1], h[num_fds - 1]);
334 for (i = 0; i < num_fds; i++) {
335 if (hang_index < 0) {
336 assert_reset_status(fd[i], 0, rs_assumed_no_hang);
341 assert_reset_status(fd[i], 0, RS_NO_ERROR);
343 assert_reset_status(fd[i], 0, RS_BATCH_ACTIVE);
345 assert_reset_status(fd[i], 0, RS_BATCH_PENDING);
348 for (i = 0; i < num_fds; i++) {
349 gem_close(fd[i], h[i]);
355 static void test_rs_ctx(int num_fds, int num_ctx, int hang_index,
360 int h[MAX_FD][MAX_CTX];
361 int ctx[MAX_FD][MAX_CTX];
363 igt_assert (num_fds <= MAX_FD);
364 igt_assert (hang_index < MAX_FD);
366 igt_assert (num_ctx <= MAX_CTX);
367 igt_assert (hang_context < MAX_CTX);
369 test_rs(num_fds, -1, RS_NO_ERROR);
371 for (i = 0; i < num_fds; i++) {
372 fd[i] = drm_open_any();
374 assert_reset_status(fd[i], 0, RS_NO_ERROR);
376 for (j = 0; j < num_ctx; j++) {
377 ctx[i][j] = context_create(fd[i]);
381 assert_reset_status(fd[i], 0, RS_NO_ERROR);
384 for (i = 0; i < num_fds; i++) {
386 assert_reset_status(fd[i], 0, RS_NO_ERROR);
388 for (j = 0; j < num_ctx; j++)
389 assert_reset_status(fd[i], ctx[i][j], RS_NO_ERROR);
391 assert_reset_status(fd[i], 0, RS_NO_ERROR);
394 for (i = 0; i < num_fds; i++) {
395 for (j = 0; j < num_ctx; j++) {
396 if (i == hang_index && j == hang_context)
397 h[i][j] = inject_hang(fd[i], ctx[i][j]);
399 h[i][j] = exec_valid(fd[i], ctx[i][j]);
403 gem_sync(fd[num_fds - 1], ctx[num_fds - 1][num_ctx - 1]);
405 for (i = 0; i < num_fds; i++)
406 assert_reset_status(fd[i], 0, RS_NO_ERROR);
408 for (i = 0; i < num_fds; i++) {
409 for (j = 0; j < num_ctx; j++) {
411 assert_reset_status(fd[i], ctx[i][j], RS_NO_ERROR);
412 if (i == hang_index && j < hang_context)
413 assert_reset_status(fd[i], ctx[i][j], RS_NO_ERROR);
414 if (i == hang_index && j == hang_context)
415 assert_reset_status(fd[i], ctx[i][j],
417 if (i == hang_index && j > hang_context)
418 assert_reset_status(fd[i], ctx[i][j],
421 assert_reset_status(fd[i], ctx[i][j],
426 for (i = 0; i < num_fds; i++) {
427 for (j = 0; j < num_ctx; j++) {
428 gem_close(fd[i], h[i][j]);
429 igt_assert(context_destroy(fd[i], ctx[i][j]) == 0);
432 assert_reset_status(fd[i], 0, RS_NO_ERROR);
438 static void test_ban(void)
440 int h1,h2,h3,h4,h5,h6,h7;
441 int ctx_good, ctx_bad;
444 int active_count = 0, pending_count = 0;
445 struct local_drm_i915_reset_stats rs_bad, rs_good;
450 assert_reset_status(fd, 0, RS_NO_ERROR);
452 ctx_good = context_create(fd);
453 ctx_bad = context_create(fd);
455 assert_reset_status(fd, 0, RS_NO_ERROR);
456 assert_reset_status(fd, ctx_good, RS_NO_ERROR);
457 assert_reset_status(fd, ctx_bad, RS_NO_ERROR);
459 h1 = exec_valid(fd, ctx_bad);
461 h5 = exec_valid(fd, ctx_good);
464 assert_reset_status(fd, ctx_good, RS_NO_ERROR);
465 assert_reset_status(fd, ctx_bad, RS_NO_ERROR);
467 h2 = inject_hang(fd, ctx_bad);
470 /* Second hang will be pending for this */
473 h6 = exec_valid(fd, ctx_good);
474 h7 = exec_valid(fd, ctx_good);
477 h3 = inject_hang(fd, ctx_bad);
481 /* This second hand will count as pending */
482 assert_reset_status(fd, ctx_bad, RS_BATCH_ACTIVE);
484 h4 = exec_valid(fd, ctx_bad);
490 /* Should not happen often but sometimes hang is declared too slow
491 * due to our way of faking hang using loop */
497 printf("retrying for ban (%d)\n", retry);
500 igt_assert(h4 == -EIO);
501 assert_reset_status(fd, ctx_bad, RS_BATCH_ACTIVE);
504 assert_reset_status(fd, ctx_good, RS_BATCH_PENDING);
506 igt_assert(gem_reset_stats(fd, ctx_good, &rs_good) == 0);
507 igt_assert(gem_reset_stats(fd, ctx_bad, &rs_bad) == 0);
509 igt_assert(rs_bad.batch_active == active_count);
510 igt_assert(rs_bad.batch_pending == pending_count);
511 igt_assert(rs_good.batch_active == 0);
512 igt_assert(rs_good.batch_pending == 2);
519 h1 = exec_valid(fd, ctx_good);
523 igt_assert(context_destroy(fd, ctx_good) == 0);
524 igt_assert(context_destroy(fd, ctx_bad) == 0);
525 igt_assert(gem_reset_status(fd, ctx_good) < 0);
526 igt_assert(gem_reset_status(fd, ctx_bad) < 0);
527 igt_assert(exec_valid(fd, ctx_good) < 0);
528 igt_assert(exec_valid(fd, ctx_bad) < 0);
533 static void test_nonrelated_hang(void)
537 int ctx_guilty, ctx_unrelated;
539 fd1 = drm_open_any();
540 fd2 = drm_open_any();
541 assert_reset_status(fd1, 0, RS_NO_ERROR);
542 assert_reset_status(fd2, 0, RS_NO_ERROR);
543 ctx_guilty = context_create(fd1);
544 ctx_unrelated = context_create(fd2);
546 assert_reset_status(fd1, ctx_guilty, RS_NO_ERROR);
547 assert_reset_status(fd2, ctx_unrelated, RS_NO_ERROR);
549 h1 = inject_hang(fd1, ctx_guilty);
552 assert_reset_status(fd1, ctx_guilty, RS_BATCH_ACTIVE);
553 assert_reset_status(fd2, ctx_unrelated, RS_NO_ERROR);
555 h2 = exec_valid(fd2, ctx_unrelated);
558 assert_reset_status(fd1, ctx_guilty, RS_BATCH_ACTIVE);
559 assert_reset_status(fd2, ctx_unrelated, RS_NO_ERROR);
563 igt_assert(context_destroy(fd1, ctx_guilty) == 0);
564 igt_assert(context_destroy(fd2, ctx_unrelated) == 0);
570 static int get_reset_count(int fd, int ctx)
573 struct local_drm_i915_reset_stats rs;
575 ret = gem_reset_stats(fd, ctx, &rs);
579 return rs.reset_count;
582 static void test_double_destroy_pending(void)
589 ctx = context_create(fd);
591 assert_reset_status(fd, ctx, RS_NO_ERROR);
593 h = inject_hang(fd, ctx);
595 igt_assert(context_destroy(fd, ctx) == 0);
596 igt_assert(context_destroy(fd, ctx) == -ENOENT);
602 static void test_close_pending(void)
609 assert_reset_status(fd, 0, RS_NO_ERROR);
611 h = inject_hang(fd, 0);
618 static void __test_count(const bool create_ctx)
626 ctx = context_create(fd);
630 assert_reset_status(fd, ctx, RS_NO_ERROR);
632 c1 = get_reset_count(fd, ctx);
635 h = inject_hang(fd, ctx);
639 assert_reset_status(fd, ctx, RS_BATCH_ACTIVE);
640 c2 = get_reset_count(fd, ctx);
643 igt_assert(c2 == (c1 + 1));
648 context_destroy(fd, ctx);
653 static void test_count(void)
655 return __test_count(false);
658 static void test_count_context(void)
660 return __test_count(true);
663 static void test_global_reset_count(void)
666 test_count_context();
669 static int _test_params(int fd, int ctx, uint32_t flags, uint32_t pad)
671 struct local_drm_i915_reset_stats rs;
676 rs.reset_count = rand();
677 rs.batch_active = rand();
678 rs.batch_pending = rand();
682 ret = ioctl(fd, GET_RESET_STATS_IOCTL, &rs);
683 } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
691 static void test_param_ctx(int fd, int ctx)
693 const uint32_t bad = rand() + 1;
695 igt_assert(_test_params(fd, ctx, 0, 0) == 0);
696 igt_assert(_test_params(fd, ctx, 0, bad) == -EINVAL);
697 igt_assert(_test_params(fd, ctx, bad, 0) == -EINVAL);
698 igt_assert(_test_params(fd, ctx, bad, bad) == -EINVAL);
701 static void test_params(void)
707 ctx = context_create(fd);
709 igt_assert(ioctl(fd, GET_RESET_STATS_IOCTL, 0) == -1);
711 igt_assert(_test_params(fd, 0xbadbad, 0, 0) == -ENOENT);
713 test_param_ctx(fd, 0);
714 test_param_ctx(fd, ctx);
722 struct local_drm_i915_gem_context_create create;
727 igt_skip_on_simulation();
731 devid = intel_get_drm_devid(fd);
732 igt_require_f(intel_gen(devid) >= 4,
733 "Architecture %d too old\n", intel_gen(devid));
735 ret = drmIoctl(fd, CONTEXT_CREATE_IOCTL, &create);
736 if (ret != 0 && (errno == ENODEV || errno == EINVAL))
737 igt_skip("Kernel is too old, or contexts not supported: %s\n",
743 igt_subtest("basic-reset-status")
746 igt_subtest("context-reset-status")
747 test_rs_ctx(4, 4, 1, 2);
752 igt_subtest("ctx-unrelated")
753 test_nonrelated_hang();
755 igt_subtest("global-count")
756 test_global_reset_count();
758 igt_subtest("double-destroy-pending")
759 test_double_destroy_pending();
761 igt_subtest("close-pending")
762 test_close_pending();
764 igt_subtest("params")