2 * Copyright (c) 2013 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Mika Kuoppala <mika.kuoppala@intel.com>
36 #include <sys/ioctl.h>
41 #include "intel_bufmgr.h"
42 #include "intel_batchbuffer.h"
43 #include "intel_gpu_tools.h"
44 #include "rendercopy.h"
47 #define RS_BATCH_ACTIVE (1 << 0)
48 #define RS_BATCH_PENDING (1 << 1)
49 #define RS_UNKNOWN (1 << 2)
51 struct local_drm_i915_reset_stats {
60 struct local_drm_i915_gem_context_create {
65 struct local_drm_i915_gem_context_destroy {
72 #define CONTEXT_CREATE_IOCTL DRM_IOWR(DRM_COMMAND_BASE + 0x2d, struct local_drm_i915_gem_context_create)
73 #define CONTEXT_DESTROY_IOCTL DRM_IOWR(DRM_COMMAND_BASE + 0x2e, struct local_drm_i915_gem_context_destroy)
74 #define GET_RESET_STATS_IOCTL DRM_IOWR(DRM_COMMAND_BASE + 0x32, struct local_drm_i915_reset_stats)
76 static uint32_t context_create(int fd)
78 struct local_drm_i915_gem_context_create create;
81 create.ctx_id = rand();
84 ret = drmIoctl(fd, CONTEXT_CREATE_IOCTL, &create);
90 static int context_destroy(int fd, uint32_t ctx_id)
93 struct local_drm_i915_gem_context_destroy destroy;
95 destroy.ctx_id = ctx_id;
98 ret = drmIoctl(fd, CONTEXT_DESTROY_IOCTL, &destroy);
105 static int gem_reset_stats(int fd, int ctx_id,
106 struct local_drm_i915_reset_stats *rs)
112 rs->reset_count = rand();
113 rs->batch_active = rand();
114 rs->batch_pending = rand();
118 ret = ioctl(fd, GET_RESET_STATS_IOCTL, rs);
119 } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
127 static int gem_reset_status(int fd, int ctx_id)
130 struct local_drm_i915_reset_stats rs;
132 ret = gem_reset_stats(fd, ctx_id, &rs);
137 return RS_BATCH_ACTIVE;
138 if (rs.batch_pending)
139 return RS_BATCH_PENDING;
144 static int gem_exec(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
149 DRM_IOCTL_I915_GEM_EXECBUFFER2,
158 static int exec_valid(int fd, int ctx)
160 struct drm_i915_gem_execbuffer2 execbuf;
161 struct drm_i915_gem_exec_object2 exec;
164 uint32_t buf[2] = { MI_BATCH_BUFFER_END, 0 };
166 exec.handle = gem_create(fd, 4096);
167 gem_write(fd, exec.handle, 0, buf, sizeof(buf));
168 exec.relocation_count = 0;
176 execbuf.buffers_ptr = (uintptr_t)&exec;
177 execbuf.buffer_count = 1;
178 execbuf.batch_start_offset = 0;
179 execbuf.batch_len = sizeof(buf);
180 execbuf.cliprects_ptr = 0;
181 execbuf.num_cliprects = 0;
185 i915_execbuffer2_set_context_id(execbuf, ctx);
188 ret = gem_exec(fd, &execbuf);
195 #define BUFSIZE (4 * 1024)
196 #define ITEMS (BUFSIZE >> 2)
198 static int inject_hang(int fd, int ctx)
200 struct drm_i915_gem_execbuffer2 execbuf;
201 struct drm_i915_gem_exec_object2 exec;
205 unsigned cmd_len = 2;
209 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
212 buf = malloc(BUFSIZE);
213 igt_assert(buf != NULL);
215 buf[0] = MI_BATCH_BUFFER_END;
218 exec.handle = gem_create(fd, BUFSIZE);
219 gem_write(fd, exec.handle, 0, buf, BUFSIZE);
220 exec.relocation_count = 0;
228 execbuf.buffers_ptr = (uintptr_t)&exec;
229 execbuf.buffer_count = 1;
230 execbuf.batch_start_offset = 0;
231 execbuf.batch_len = BUFSIZE;
232 execbuf.cliprects_ptr = 0;
233 execbuf.num_cliprects = 0;
237 i915_execbuffer2_set_context_id(execbuf, ctx);
240 igt_assert(gem_exec(fd, &execbuf) == 0);
242 gtt_off = exec.offset;
244 for (i = 0; i < ITEMS; i++)
247 roff = random() % (ITEMS - cmd_len);
248 buf[roff] = MI_BATCH_BUFFER_START | (cmd_len - 2);
249 buf[roff + 1] = (gtt_off & 0xfffffffc) + (roff << 2);
251 buf[roff + 2] = gtt_off & 0xffffffff00000000ull;
254 printf("loop injected at 0x%lx (off 0x%x, bo_start 0x%lx, bo_end 0x%lx)\n",
255 (long unsigned int)((roff << 2) + gtt_off),
256 roff << 2, (long unsigned int)gtt_off,
257 (long unsigned int)(gtt_off + BUFSIZE - 1));
259 gem_write(fd, exec.handle, 0, buf, BUFSIZE);
261 exec.relocation_count = 0;
269 execbuf.buffers_ptr = (uintptr_t)&exec;
270 execbuf.buffer_count = 1;
271 execbuf.batch_start_offset = 0;
272 execbuf.batch_len = BUFSIZE;
273 execbuf.cliprects_ptr = 0;
274 execbuf.num_cliprects = 0;
278 i915_execbuffer2_set_context_id(execbuf, ctx);
281 igt_assert(gem_exec(fd, &execbuf) == 0);
283 igt_assert(gtt_off == exec.offset);
290 static int _assert_reset_status(int fd, int ctx, int status)
294 rs = gem_reset_status(fd, ctx);
296 printf("reset status for %d ctx %d returned %d\n",
302 printf("%d:%d reset status %d differs from assumed %d\n",
303 fd, ctx, rs, status);
311 #define assert_reset_status(fd, ctx, status) \
312 igt_assert(_assert_reset_status(fd, ctx, status) == 0)
314 static void test_rs(int num_fds, int hang_index, int rs_assumed_no_hang)
320 igt_assert (num_fds <= MAX_FD);
321 igt_assert (hang_index < MAX_FD);
323 for (i = 0; i < num_fds; i++) {
324 fd[i] = drm_open_any();
328 for (i = 0; i < num_fds; i++)
329 assert_reset_status(fd[i], 0, RS_NO_ERROR);
331 for (i = 0; i < num_fds; i++) {
333 h[i] = inject_hang(fd[i], 0);
335 h[i] = exec_valid(fd[i], 0);
338 gem_sync(fd[num_fds - 1], h[num_fds - 1]);
340 for (i = 0; i < num_fds; i++) {
341 if (hang_index < 0) {
342 assert_reset_status(fd[i], 0, rs_assumed_no_hang);
347 assert_reset_status(fd[i], 0, RS_NO_ERROR);
349 assert_reset_status(fd[i], 0, RS_BATCH_ACTIVE);
351 assert_reset_status(fd[i], 0, RS_BATCH_PENDING);
354 for (i = 0; i < num_fds; i++) {
355 gem_close(fd[i], h[i]);
361 static void test_rs_ctx(int num_fds, int num_ctx, int hang_index,
366 int h[MAX_FD][MAX_CTX];
367 int ctx[MAX_FD][MAX_CTX];
369 igt_assert (num_fds <= MAX_FD);
370 igt_assert (hang_index < MAX_FD);
372 igt_assert (num_ctx <= MAX_CTX);
373 igt_assert (hang_context < MAX_CTX);
375 test_rs(num_fds, -1, RS_NO_ERROR);
377 for (i = 0; i < num_fds; i++) {
378 fd[i] = drm_open_any();
380 assert_reset_status(fd[i], 0, RS_NO_ERROR);
382 for (j = 0; j < num_ctx; j++) {
383 ctx[i][j] = context_create(fd[i]);
387 assert_reset_status(fd[i], 0, RS_NO_ERROR);
390 for (i = 0; i < num_fds; i++) {
392 assert_reset_status(fd[i], 0, RS_NO_ERROR);
394 for (j = 0; j < num_ctx; j++)
395 assert_reset_status(fd[i], ctx[i][j], RS_NO_ERROR);
397 assert_reset_status(fd[i], 0, RS_NO_ERROR);
400 for (i = 0; i < num_fds; i++) {
401 for (j = 0; j < num_ctx; j++) {
402 if (i == hang_index && j == hang_context)
403 h[i][j] = inject_hang(fd[i], ctx[i][j]);
405 h[i][j] = exec_valid(fd[i], ctx[i][j]);
409 gem_sync(fd[num_fds - 1], ctx[num_fds - 1][num_ctx - 1]);
411 for (i = 0; i < num_fds; i++)
412 assert_reset_status(fd[i], 0, RS_NO_ERROR);
414 for (i = 0; i < num_fds; i++) {
415 for (j = 0; j < num_ctx; j++) {
417 assert_reset_status(fd[i], ctx[i][j], RS_NO_ERROR);
418 if (i == hang_index && j < hang_context)
419 assert_reset_status(fd[i], ctx[i][j], RS_NO_ERROR);
420 if (i == hang_index && j == hang_context)
421 assert_reset_status(fd[i], ctx[i][j],
423 if (i == hang_index && j > hang_context)
424 assert_reset_status(fd[i], ctx[i][j],
427 assert_reset_status(fd[i], ctx[i][j],
432 for (i = 0; i < num_fds; i++) {
433 for (j = 0; j < num_ctx; j++) {
434 gem_close(fd[i], h[i][j]);
435 igt_assert(context_destroy(fd[i], ctx[i][j]) == 0);
438 assert_reset_status(fd[i], 0, RS_NO_ERROR);
444 static void test_ban(void)
446 int h1,h2,h3,h4,h5,h6,h7;
447 int ctx_good, ctx_bad;
450 int active_count = 0, pending_count = 0;
451 struct local_drm_i915_reset_stats rs_bad, rs_good;
456 assert_reset_status(fd, 0, RS_NO_ERROR);
458 ctx_good = context_create(fd);
459 ctx_bad = context_create(fd);
461 assert_reset_status(fd, 0, RS_NO_ERROR);
462 assert_reset_status(fd, ctx_good, RS_NO_ERROR);
463 assert_reset_status(fd, ctx_bad, RS_NO_ERROR);
465 h1 = exec_valid(fd, ctx_bad);
467 h5 = exec_valid(fd, ctx_good);
470 assert_reset_status(fd, ctx_good, RS_NO_ERROR);
471 assert_reset_status(fd, ctx_bad, RS_NO_ERROR);
473 h2 = inject_hang(fd, ctx_bad);
476 /* Second hang will be pending for this */
479 h6 = exec_valid(fd, ctx_good);
480 h7 = exec_valid(fd, ctx_good);
483 h3 = inject_hang(fd, ctx_bad);
487 /* This second hand will count as pending */
488 assert_reset_status(fd, ctx_bad, RS_BATCH_ACTIVE);
490 h4 = exec_valid(fd, ctx_bad);
496 /* Should not happen often but sometimes hang is declared too slow
497 * due to our way of faking hang using loop */
503 printf("retrying for ban (%d)\n", retry);
506 igt_assert(h4 == -EIO);
507 assert_reset_status(fd, ctx_bad, RS_BATCH_ACTIVE);
510 assert_reset_status(fd, ctx_good, RS_BATCH_PENDING);
512 igt_assert(gem_reset_stats(fd, ctx_good, &rs_good) == 0);
513 igt_assert(gem_reset_stats(fd, ctx_bad, &rs_bad) == 0);
515 igt_assert(rs_bad.batch_active == active_count);
516 igt_assert(rs_bad.batch_pending == pending_count);
517 igt_assert(rs_good.batch_active == 0);
518 igt_assert(rs_good.batch_pending == 2);
525 h1 = exec_valid(fd, ctx_good);
529 igt_assert(context_destroy(fd, ctx_good) == 0);
530 igt_assert(context_destroy(fd, ctx_bad) == 0);
531 igt_assert(gem_reset_status(fd, ctx_good) < 0);
532 igt_assert(gem_reset_status(fd, ctx_bad) < 0);
533 igt_assert(exec_valid(fd, ctx_good) < 0);
534 igt_assert(exec_valid(fd, ctx_bad) < 0);
539 static void test_nonrelated_hang(void)
543 int ctx_guilty, ctx_unrelated;
545 fd1 = drm_open_any();
546 fd2 = drm_open_any();
547 assert_reset_status(fd1, 0, RS_NO_ERROR);
548 assert_reset_status(fd2, 0, RS_NO_ERROR);
549 ctx_guilty = context_create(fd1);
550 ctx_unrelated = context_create(fd2);
552 assert_reset_status(fd1, ctx_guilty, RS_NO_ERROR);
553 assert_reset_status(fd2, ctx_unrelated, RS_NO_ERROR);
555 h1 = inject_hang(fd1, ctx_guilty);
558 assert_reset_status(fd1, ctx_guilty, RS_BATCH_ACTIVE);
559 assert_reset_status(fd2, ctx_unrelated, RS_NO_ERROR);
561 h2 = exec_valid(fd2, ctx_unrelated);
564 assert_reset_status(fd1, ctx_guilty, RS_BATCH_ACTIVE);
565 assert_reset_status(fd2, ctx_unrelated, RS_NO_ERROR);
569 igt_assert(context_destroy(fd1, ctx_guilty) == 0);
570 igt_assert(context_destroy(fd2, ctx_unrelated) == 0);
576 static int get_reset_count(int fd, int ctx)
579 struct local_drm_i915_reset_stats rs;
581 ret = gem_reset_stats(fd, ctx, &rs);
585 return rs.reset_count;
588 static void test_double_destroy_pending(void)
595 ctx = context_create(fd);
597 assert_reset_status(fd, ctx, RS_NO_ERROR);
599 h = inject_hang(fd, ctx);
601 igt_assert(context_destroy(fd, ctx) == 0);
602 igt_assert(context_destroy(fd, ctx) == -ENOENT);
608 static void test_close_pending(void)
615 assert_reset_status(fd, 0, RS_NO_ERROR);
617 h = inject_hang(fd, 0);
624 static void __test_count(const bool create_ctx)
632 ctx = context_create(fd);
636 assert_reset_status(fd, ctx, RS_NO_ERROR);
638 c1 = get_reset_count(fd, ctx);
641 h = inject_hang(fd, ctx);
645 assert_reset_status(fd, ctx, RS_BATCH_ACTIVE);
646 c2 = get_reset_count(fd, ctx);
649 igt_assert(c2 == (c1 + 1));
654 context_destroy(fd, ctx);
659 static void test_count(void)
661 return __test_count(false);
664 static void test_count_context(void)
666 return __test_count(true);
669 static void test_global_reset_count(void)
672 test_count_context();
675 static int _test_params(int fd, int ctx, uint32_t flags, uint32_t pad)
677 struct local_drm_i915_reset_stats rs;
682 rs.reset_count = rand();
683 rs.batch_active = rand();
684 rs.batch_pending = rand();
688 ret = ioctl(fd, GET_RESET_STATS_IOCTL, &rs);
689 } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
697 static void test_param_ctx(int fd, int ctx)
699 const uint32_t bad = rand() + 1;
701 igt_assert(_test_params(fd, ctx, 0, 0) == 0);
702 igt_assert(_test_params(fd, ctx, 0, bad) == -EINVAL);
703 igt_assert(_test_params(fd, ctx, bad, 0) == -EINVAL);
704 igt_assert(_test_params(fd, ctx, bad, bad) == -EINVAL);
707 static void test_params(void)
713 ctx = context_create(fd);
715 igt_assert(ioctl(fd, GET_RESET_STATS_IOCTL, 0) == -1);
717 igt_assert(_test_params(fd, 0xbadbad, 0, 0) == -ENOENT);
719 test_param_ctx(fd, 0);
720 test_param_ctx(fd, ctx);
728 struct local_drm_i915_gem_context_create create;
733 igt_skip_on_simulation();
737 devid = intel_get_drm_devid(fd);
738 igt_require_f(intel_gen(devid) >= 4,
739 "Architecture %d too old\n", intel_gen(devid));
741 ret = drmIoctl(fd, CONTEXT_CREATE_IOCTL, &create);
742 igt_skip_on_f(ret != 0 && (errno == ENODEV || errno == EINVAL),
743 "Kernel is too old, or contexts not supported: %s\n",
749 igt_subtest("basic-reset-status")
752 igt_subtest("context-reset-status")
753 test_rs_ctx(4, 4, 1, 2);
758 igt_subtest("ctx-unrelated")
759 test_nonrelated_hang();
761 igt_subtest("global-count")
762 test_global_reset_count();
764 igt_subtest("double-destroy-pending")
765 test_double_destroy_pending();
767 igt_subtest("close-pending")
768 test_close_pending();
770 igt_subtest("params")