2 * Copyright © 2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Chris Wilson <chris@chris-wilson.co.uk>
28 /** @file gem_linear_render_blits.c
30 * This is a test of doing many blits, with a working set
31 * larger than the aperture size.
33 * The goal is to simply ensure the basics work.
37 #include <sys/ioctl.h>
49 #include "ioctl_wrappers.h"
51 #include "intel_bufmgr.h"
52 #include "intel_batchbuffer.h"
54 #include "intel_chipset.h"
58 #define STRIDE (WIDTH*4)
60 #define SIZE (HEIGHT*STRIDE)
62 static igt_render_copyfunc_t render_copy;
63 static drm_intel_bo *linear;
64 static uint32_t data[WIDTH*HEIGHT];
68 check_bo(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t val)
76 tmp.tiling = I915_TILING_NONE;
79 render_copy(batch, NULL, buf, 0, 0, WIDTH, HEIGHT, &tmp, 0, 0);
81 do_or_die(dri_bo_map(linear, 0));
82 ptr = linear->virtual;
84 do_or_die(drm_intel_bo_get_subdata(linear, 0, sizeof(data), data));
87 for (i = 0; i < WIDTH*HEIGHT; i++) {
88 igt_assert_f(ptr[i] == val,
89 "Expected 0x%08x, found 0x%08x "
98 int main(int argc, char **argv)
100 drm_intel_bufmgr *bufmgr;
101 struct intel_batchbuffer *batch;
110 igt_skip_on_simulation();
113 devid = intel_get_drm_devid(fd);
115 render_copy = igt_get_render_copyfunc(devid);
116 igt_require(render_copy);
119 if (IS_GEN2(devid)) /* chipset only handles cached -> uncached */
121 if (IS_BROADWATER(devid) || IS_CRESTLINE(devid)) /* snafu */
124 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
125 drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 32);
126 batch = intel_batchbuffer_alloc(bufmgr, devid);
130 count = atoi(argv[1]);
132 count = 3 * gem_aperture_size(fd) / SIZE / 2;
133 else if (count < 2) {
134 igt_warn("count must be >= 2\n");
138 if (count > intel_get_total_ram_mb() * 9 / 10) {
139 count = intel_get_total_ram_mb() * 9 / 10;
140 igt_info("not enough RAM to run test, reducing buffer count\n");
143 igt_info("Using %d 1MiB buffers\n", count);
145 linear = drm_intel_bo_alloc(bufmgr, "linear", WIDTH*HEIGHT*4, 0);
147 gem_set_caching(fd, linear->handle, 1);
148 igt_info("Using a snoop linear buffer for comparisons\n");
151 buf = malloc(sizeof(*buf)*count);
152 start_val = malloc(sizeof(*start_val)*count);
154 for (i = 0; i < count; i++) {
155 uint32_t tiling = I915_TILING_X + (random() & 1);
156 unsigned long pitch = STRIDE;
159 buf[i].bo = drm_intel_bo_alloc_tiled(bufmgr, "",
162 buf[i].stride = pitch;
163 buf[i].tiling = tiling;
166 start_val[i] = start;
168 do_or_die(drm_intel_gem_bo_map_gtt(buf[i].bo));
169 ptr = buf[i].bo->virtual;
170 for (j = 0; j < WIDTH*HEIGHT; j++)
172 drm_intel_gem_bo_unmap_gtt(buf[i].bo);
175 igt_info("Verifying initialisation...\n");
176 for (i = 0; i < count; i++)
177 check_bo(batch, &buf[i], start_val[i]);
179 igt_info("Cyclic blits, forward...\n");
180 for (i = 0; i < count * 4; i++) {
182 int dst = (i + 1) % count;
184 render_copy(batch, NULL, buf+src, 0, 0, WIDTH, HEIGHT, buf+dst, 0, 0);
185 start_val[dst] = start_val[src];
187 for (i = 0; i < count; i++)
188 check_bo(batch, &buf[i], start_val[i]);
190 igt_info("Cyclic blits, backward...\n");
191 for (i = 0; i < count * 4; i++) {
192 int src = (i + 1) % count;
195 render_copy(batch, NULL, buf+src, 0, 0, WIDTH, HEIGHT, buf+dst, 0, 0);
196 start_val[dst] = start_val[src];
198 for (i = 0; i < count; i++)
199 check_bo(batch, &buf[i], start_val[i]);
201 igt_info("Random blits...\n");
202 for (i = 0; i < count * 4; i++) {
203 int src = random() % count;
204 int dst = random() % count;
209 render_copy(batch, NULL, buf+src, 0, 0, WIDTH, HEIGHT, buf+dst, 0, 0);
210 start_val[dst] = start_val[src];
212 for (i = 0; i < count; i++)
213 check_bo(batch, &buf[i], start_val[i]);