2 * Copyright © 2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Chris Wilson <chris@chris-wilson.co.uk>
28 /** @file gem_linear_render_blits.c
30 * This is a test of doing many blits, with a working set
31 * larger than the aperture size.
33 * The goal is to simply ensure the basics work.
41 #include <sys/ioctl.h>
53 #include "ioctl_wrappers.h"
55 #include "intel_bufmgr.h"
56 #include "intel_batchbuffer.h"
58 #include "intel_chipset.h"
62 #define STRIDE (WIDTH*4)
64 #define SIZE (HEIGHT*STRIDE)
66 static uint32_t linear[WIDTH*HEIGHT];
67 static igt_render_copyfunc_t render_copy;
70 check_bo(int fd, uint32_t handle, uint32_t val)
74 gem_read(fd, handle, 0, linear, sizeof(linear));
75 for (i = 0; i < WIDTH*HEIGHT; i++) {
76 igt_assert_f(linear[i] == val,
77 "Expected 0x%08x, found 0x%08x "
79 val, linear[i], i * 4);
84 int main(int argc, char **argv)
86 drm_intel_bufmgr *bufmgr;
87 struct intel_batchbuffer *batch;
97 render_copy = igt_get_render_copyfunc(intel_get_drm_devid(fd));
98 igt_require(render_copy);
100 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
101 batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
104 if (igt_run_in_simulation())
107 count = atoi(argv[1]);
110 count = 3 * gem_aperture_size(fd) / SIZE / 2;
111 else if (count < 2) {
112 igt_warn("count must be >= 2\n");
116 if (count > intel_get_total_ram_mb() * 9 / 10) {
117 count = intel_get_total_ram_mb() * 9 / 10;
118 igt_info("not enough RAM to run test, reducing buffer count\n");
121 bo = malloc(sizeof(*bo)*count);
122 start_val = malloc(sizeof(*start_val)*count);
124 for (i = 0; i < count; i++) {
125 bo[i] = drm_intel_bo_alloc(bufmgr, "", SIZE, 4096);
126 start_val[i] = start;
127 for (j = 0; j < WIDTH*HEIGHT; j++)
129 gem_write(fd, bo[i]->handle, 0, linear, sizeof(linear));
132 igt_info("Verifying initialisation...\n");
133 for (i = 0; i < count; i++)
134 check_bo(fd, bo[i]->handle, start_val[i]);
136 igt_info("Cyclic blits, forward...\n");
137 for (i = 0; i < count * 4; i++) {
138 struct igt_buf src, dst;
140 src.bo = bo[i % count];
142 src.tiling = I915_TILING_NONE;
145 dst.bo = bo[(i + 1) % count];
147 dst.tiling = I915_TILING_NONE;
150 render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
151 start_val[(i + 1) % count] = start_val[i % count];
153 for (i = 0; i < count; i++)
154 check_bo(fd, bo[i]->handle, start_val[i]);
156 if (igt_run_in_simulation())
159 igt_info("Cyclic blits, backward...\n");
160 for (i = 0; i < count * 4; i++) {
161 struct igt_buf src, dst;
163 src.bo = bo[(i + 1) % count];
165 src.tiling = I915_TILING_NONE;
168 dst.bo = bo[i % count];
170 dst.tiling = I915_TILING_NONE;
173 render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
174 start_val[i % count] = start_val[(i + 1) % count];
176 for (i = 0; i < count; i++)
177 check_bo(fd, bo[i]->handle, start_val[i]);
179 igt_info("Random blits...\n");
180 for (i = 0; i < count * 4; i++) {
181 struct igt_buf src, dst;
182 int s = random() % count;
183 int d = random() % count;
190 src.tiling = I915_TILING_NONE;
195 dst.tiling = I915_TILING_NONE;
198 render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
199 start_val[d] = start_val[s];
201 for (i = 0; i < count; i++)
202 check_bo(fd, bo[i]->handle, start_val[i]);