2 * Copyright © 2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Chris Wilson <chris@chris-wilson.co.uk>
28 /** @file gem_linear_render_blits.c
30 * This is a test of doing many blits, with a working set
31 * larger than the aperture size.
33 * The goal is to simply ensure the basics work.
41 #include <sys/ioctl.h>
52 #include "ioctl_wrappers.h"
54 #include "intel_bufmgr.h"
55 #include "intel_batchbuffer.h"
57 #include "intel_chipset.h"
61 #define STRIDE (WIDTH*4)
63 #define SIZE (HEIGHT*STRIDE)
65 static uint32_t linear[WIDTH*HEIGHT];
66 static igt_render_copyfunc_t render_copy;
69 check_bo(int fd, uint32_t handle, uint32_t val)
73 gem_read(fd, handle, 0, linear, sizeof(linear));
74 for (i = 0; i < WIDTH*HEIGHT; i++) {
75 igt_assert_f(linear[i] == val,
76 "Expected 0x%08x, found 0x%08x "
78 val, linear[i], i * 4);
83 int main(int argc, char **argv)
85 drm_intel_bufmgr *bufmgr;
86 struct intel_batchbuffer *batch;
92 igt_simple_init(argc, argv);
96 render_copy = igt_get_render_copyfunc(intel_get_drm_devid(fd));
97 igt_require(render_copy);
99 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
100 batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
103 if (igt_run_in_simulation())
106 count = atoi(argv[1]);
109 count = 3 * gem_aperture_size(fd) / SIZE / 2;
110 else if (count < 2) {
111 igt_warn("count must be >= 2\n");
115 if (count > intel_get_total_ram_mb() * 9 / 10) {
116 count = intel_get_total_ram_mb() * 9 / 10;
117 igt_info("not enough RAM to run test, reducing buffer count\n");
120 bo = malloc(sizeof(*bo)*count);
121 start_val = malloc(sizeof(*start_val)*count);
123 for (i = 0; i < count; i++) {
124 bo[i] = drm_intel_bo_alloc(bufmgr, "", SIZE, 4096);
125 start_val[i] = start;
126 for (j = 0; j < WIDTH*HEIGHT; j++)
128 gem_write(fd, bo[i]->handle, 0, linear, sizeof(linear));
131 igt_info("Verifying initialisation...\n");
132 for (i = 0; i < count; i++)
133 check_bo(fd, bo[i]->handle, start_val[i]);
135 igt_info("Cyclic blits, forward...\n");
136 for (i = 0; i < count * 4; i++) {
137 struct igt_buf src, dst;
139 src.bo = bo[i % count];
141 src.tiling = I915_TILING_NONE;
144 dst.bo = bo[(i + 1) % count];
146 dst.tiling = I915_TILING_NONE;
149 render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
150 start_val[(i + 1) % count] = start_val[i % count];
152 for (i = 0; i < count; i++)
153 check_bo(fd, bo[i]->handle, start_val[i]);
155 if (igt_run_in_simulation())
158 igt_info("Cyclic blits, backward...\n");
159 for (i = 0; i < count * 4; i++) {
160 struct igt_buf src, dst;
162 src.bo = bo[(i + 1) % count];
164 src.tiling = I915_TILING_NONE;
167 dst.bo = bo[i % count];
169 dst.tiling = I915_TILING_NONE;
172 render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
173 start_val[i % count] = start_val[(i + 1) % count];
175 for (i = 0; i < count; i++)
176 check_bo(fd, bo[i]->handle, start_val[i]);
178 igt_info("Random blits...\n");
179 for (i = 0; i < count * 4; i++) {
180 struct igt_buf src, dst;
181 int s = random() % count;
182 int d = random() % count;
189 src.tiling = I915_TILING_NONE;
194 dst.tiling = I915_TILING_NONE;
197 render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
198 start_val[d] = start_val[s];
200 for (i = 0; i < count; i++)
201 check_bo(fd, bo[i]->handle, start_val[i]);