2 * Copyright © 2009 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
28 /** @file gem_pread_after_blit.c
30 * This is a test of pread's behavior when getting values out of just-drawn-to
33 * The goal is to catch failure in the whole-buffer-flush or
34 * ranged-buffer-flush paths in the kernel.
49 #include "intel_bufmgr.h"
50 #include "intel_batchbuffer.h"
51 #include "intel_gpu_tools.h"
53 static drm_intel_bufmgr *bufmgr;
54 struct intel_batchbuffer *batch;
55 static const int width = 512, height = 512;
56 static const int size = 1024 * 1024;
58 #define PAGE_SIZE 4096
61 create_bo(uint32_t val)
67 bo = drm_intel_bo_alloc(bufmgr, "src bo", size, 4096);
69 /* Fill the BO with dwords starting at start_val */
70 drm_intel_bo_map(bo, 1);
73 for (i = 0; i < 1024 * 1024 / 4; i++)
76 drm_intel_bo_unmap(bo);
82 verify_large_read(drm_intel_bo *bo, uint32_t val)
84 uint32_t buf[size / 4];
87 drm_intel_bo_get_subdata(bo, 0, size, buf);
89 for (i = 0; i < size / 4; i++) {
92 "Unexpected value 0x%08x instead of "
93 "0x%08x at offset 0x%08x (%p)\n",
94 buf[i], val, i * 4, buf);
101 /** This reads at the size that Mesa usees for software fallbacks. */
103 verify_small_read(drm_intel_bo *bo, uint32_t val)
105 uint32_t buf[4096 / 4];
108 for (i = 0; i < 4096 / 4; i++)
111 for (offset = 0; offset < size; offset += PAGE_SIZE) {
112 drm_intel_bo_get_subdata(bo, offset, PAGE_SIZE, buf);
114 for (i = 0; i < PAGE_SIZE; i += 4) {
115 if (buf[i / 4] != val) {
117 "Unexpected value 0x%08x instead of "
118 "0x%08x at offset 0x%08x\n",
119 buf[i / 4], val, i * 4);
128 main(int argc, char **argv)
131 drm_intel_bo *src1, *src2, *bo;
133 uint32_t start2 = 1024 * 1024 / 4;
137 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
138 drm_intel_bufmgr_gem_enable_reuse(bufmgr);
139 batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
141 src1 = create_bo(start1);
142 src2 = create_bo(start2);
144 bo = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096);
146 /* First, do a full-buffer read after blitting */
147 printf("Large read after blit 1\n");
148 intel_copy_bo(batch, bo, src1, width, height);
149 verify_large_read(bo, start1);
150 printf("Large read after blit 2\n");
151 intel_copy_bo(batch, bo, src2, width, height);
152 verify_large_read(bo, start2);
154 printf("Small reads after blit 1\n");
155 intel_copy_bo(batch, bo, src1, width, height);
156 verify_small_read(bo, start1);
157 printf("Small reads after blit 2\n");
158 intel_copy_bo(batch, bo, src2, width, height);
159 verify_small_read(bo, start2);
161 printf("Large read after blit 3\n");
162 intel_copy_bo(batch, bo, src1, width, height);
163 verify_large_read(bo, start1);
165 drm_intel_bo_unreference(src1);
166 drm_intel_bo_unreference(src2);
167 drm_intel_bo_unreference(bo);
169 intel_batchbuffer_free(batch);
170 drm_intel_bufmgr_destroy(bufmgr);