2 * Copyright © 2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Daniel Vetter <daniel.vetter@ffwll.ch> (based on gem_storedw_*.c)
37 #include "ioctl_wrappers.h"
39 #include "intel_bufmgr.h"
40 #include "intel_batchbuffer.h"
41 #include "intel_chipset.h"
45 static drm_intel_bufmgr *bufmgr;
46 struct intel_batchbuffer *batch;
49 * Testcase: Basic check of non-secure batches
51 * This test tries to stop the render ring with a MI_LOAD_REG command, which
52 * should fail if the non-secure handling works correctly.
55 #define MI_LOAD_REGISTER_IMM (0x22<<23)
57 static int num_rings = 1;
66 for (i = 0; i < 0x100; i++) {
67 int ring = random() % num_rings + 1;
70 OUT_BATCH(MI_LOAD_REGISTER_IMM | 1);
71 OUT_BATCH(0x203c); /* RENDER RING CTL */
72 OUT_BATCH(0); /* try to stop the ring */
76 intel_batchbuffer_flush_on_ring(batch, ring);
86 devid = intel_get_drm_devid(fd);
88 if (HAS_BSD_RING(devid))
91 if (HAS_BLT_RING(devid))
95 igt_info("num rings detected: %i\n", num_rings);
97 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
99 drm_intel_bufmgr_gem_enable_reuse(bufmgr);
101 batch = intel_batchbuffer_alloc(bufmgr, devid);
105 gem_quiescent_gpu(fd);
107 intel_batchbuffer_free(batch);
108 drm_intel_bufmgr_destroy(bufmgr);