2 * Copyright © 2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Chris Wilson <chris@chris-wilson.co.uk>
37 #include <sys/ioctl.h>
40 #include "ioctl_wrappers.h"
42 #include "intel_chipset.h"
45 #define OBJECT_SIZE 16384
47 #define COPY_BLT_CMD (2<<29|0x53<<22|0x6)
48 #define BLT_WRITE_ALPHA (1<<21)
49 #define BLT_WRITE_RGB (1<<20)
50 #define BLT_SRC_TILED (1<<15)
51 #define BLT_DST_TILED (1<<11)
53 static int gem_linear_blt(int fd,
58 struct drm_i915_gem_relocation_entry *reloc)
61 int height = length / (16 * 1024);
63 igt_assert(height <= 1<<16);
67 b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
68 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
70 b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024);
72 b[i++] = height << 16 | (4*1024);
74 reloc->offset = (b-batch+4) * sizeof(uint32_t);
76 reloc->target_handle = dst;
77 reloc->read_domains = I915_GEM_DOMAIN_RENDER;
78 reloc->write_domain = I915_GEM_DOMAIN_RENDER;
79 reloc->presumed_offset = 0;
81 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
82 b[i++] = 0; /* FIXME */
87 reloc->offset = (b-batch+7) * sizeof(uint32_t);
88 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
89 reloc->offset += sizeof(uint32_t);
91 reloc->target_handle = src;
92 reloc->read_domains = I915_GEM_DOMAIN_RENDER;
93 reloc->write_domain = 0;
94 reloc->presumed_offset = 0;
96 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
97 b[i++] = 0; /* FIXME */
100 length -= height * 16*1024;
105 b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
106 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
108 b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024);
109 b[i++] = height << 16;
110 b[i++] = (1+height) << 16 | (length / 4);
112 reloc->offset = (b-batch+4) * sizeof(uint32_t);
114 reloc->target_handle = dst;
115 reloc->read_domains = I915_GEM_DOMAIN_RENDER;
116 reloc->write_domain = I915_GEM_DOMAIN_RENDER;
117 reloc->presumed_offset = 0;
119 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
120 b[i++] = 0; /* FIXME */
122 b[i++] = height << 16;
125 reloc->offset = (b-batch+7) * sizeof(uint32_t);
126 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
127 reloc->offset += sizeof(uint32_t);
129 reloc->target_handle = src;
130 reloc->read_domains = I915_GEM_DOMAIN_RENDER;
131 reloc->write_domain = 0;
132 reloc->presumed_offset = 0;
134 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
135 b[i++] = 0; /* FIXME */
140 b[0] = MI_BATCH_BUFFER_END;
143 return (b+2 - batch) * sizeof(uint32_t);
146 static double elapsed(const struct timeval *start,
147 const struct timeval *end,
150 return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_usec - start->tv_usec))/loop;
153 static const char *bytes_per_sec(char *buf, double v)
155 const char *order[] = {
165 while (v > 1024 && o[1]) {
169 sprintf(buf, "%.1f%s/s", v, *o);
173 static void run(int object_size)
175 struct drm_i915_gem_execbuffer2 execbuf;
176 struct drm_i915_gem_exec_object2 exec[3];
177 struct drm_i915_gem_relocation_entry reloc[4];
179 uint32_t handle, src, dst;
184 handle = gem_create(fd, 4096);
185 src = gem_create(fd, object_size);
186 dst = gem_create(fd, object_size);
188 len = gem_linear_blt(fd, buf, src, dst, object_size, reloc);
189 gem_write(fd, handle, 0, buf, len);
191 exec[0].handle = src;
192 exec[0].relocation_count = 0;
193 exec[0].relocs_ptr = 0;
194 exec[0].alignment = 0;
200 exec[1].handle = dst;
201 exec[1].relocation_count = 0;
202 exec[1].relocs_ptr = 0;
203 exec[1].alignment = 0;
209 exec[2].handle = handle;
210 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
211 exec[2].relocation_count = len > 56 ? 4 : 2;
213 exec[2].relocation_count = len > 40 ? 4 : 2;
214 exec[2].relocs_ptr = (uintptr_t)reloc;
215 exec[2].alignment = 0;
222 if (HAS_BLT_RING(intel_get_drm_devid(fd)))
223 ring = I915_EXEC_BLT;
225 execbuf.buffers_ptr = (uintptr_t)exec;
226 execbuf.buffer_count = 3;
227 execbuf.batch_start_offset = 0;
228 execbuf.batch_len = len;
229 execbuf.cliprects_ptr = 0;
230 execbuf.num_cliprects = 0;
233 execbuf.flags = ring;
234 i915_execbuffer2_set_context_id(execbuf, 0);
237 for (count = 1; count <= 1<<12; count <<= 1) {
238 struct timeval start, end;
240 gettimeofday(&start, NULL);
241 for (int loop = 0; loop < count; loop++)
242 gem_execbuf(fd, &execbuf);
243 gem_sync(fd, handle);
244 gettimeofday(&end, NULL);
245 igt_info("Time to blt %d bytes x %6d: %7.3fµs, %s\n",
247 elapsed(&start, &end, count),
248 bytes_per_sec((char *)buf, object_size/elapsed(&start, &end, count)*1e6));
251 gem_close(fd, handle);
256 int main(int argc, char **argv)
262 igt_skip_on_simulation();
265 for (i = 1; i < argc; i++) {
266 int object_size = atoi(argv[i]);
268 run((object_size + 3) & -4);