2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Chris Wilson <chris@chris-wilson.co.uk>
37 #include <sys/ioctl.h>
40 #include "ioctl_wrappers.h"
43 #include "intel_chipset.h"
45 #define USE_LUT (1 << 12)
47 /* Simulates SNA behaviour using negative self-relocations for
48 * STATE_BASE_ADDRESS command packets. If they wrap around (to values greater
49 * than the total size of the GTT), the GPU will hang.
50 * See https://bugs.freedesktop.org/show_bug.cgi?id=78533
52 static int negative_reloc(int fd, unsigned flags)
54 struct drm_i915_gem_execbuffer2 execbuf;
55 struct drm_i915_gem_exec_object2 gem_exec[2];
56 struct drm_i915_gem_relocation_entry gem_reloc[1000];
57 uint64_t gtt_max = gem_aperture_size(fd);
58 uint32_t buf[1024] = {MI_BATCH_BUFFER_END};
61 #define BIAS (256*1024)
63 igt_require(intel_gen(intel_get_drm_devid(fd)) >= 7);
65 memset(gem_exec, 0, sizeof(gem_exec));
66 gem_exec[0].handle = gem_create(fd, 4096);
67 gem_write(fd, gem_exec[0].handle, 0, buf, 8);
69 gem_reloc[0].offset = 1024;
70 gem_reloc[0].delta = 0;
71 gem_reloc[0].target_handle = gem_exec[0].handle;
72 gem_reloc[0].read_domains = I915_GEM_DOMAIN_COMMAND;
74 gem_exec[1].handle = gem_create(fd, 4096);
75 gem_write(fd, gem_exec[1].handle, 0, buf, 8);
76 gem_exec[1].relocation_count = 1;
77 gem_exec[1].relocs_ptr = (uintptr_t)gem_reloc;
79 memset(&execbuf, 0, sizeof(execbuf));
80 execbuf.buffers_ptr = (uintptr_t)gem_exec;
81 execbuf.buffer_count = 2;
82 execbuf.batch_len = 8;
84 do_or_die(drmIoctl(fd,
85 DRM_IOCTL_I915_GEM_EXECBUFFER2,
87 gem_close(fd, gem_exec[1].handle);
89 igt_info("Found offset %ld for 4k batch\n", (long)gem_exec[0].offset);
90 igt_require(gem_exec[0].offset < BIAS);
92 memset(gem_reloc, 0, sizeof(gem_reloc));
93 for (i = 0; i < sizeof(gem_reloc)/sizeof(gem_reloc[0]); i++) {
94 gem_reloc[i].offset = 8 + 4*i;
95 gem_reloc[i].delta = -BIAS*i/1024;
96 gem_reloc[i].target_handle = flags & USE_LUT ? 0 : gem_exec[0].handle;
97 gem_reloc[i].read_domains = I915_GEM_DOMAIN_COMMAND;
100 gem_exec[0].relocation_count = sizeof(gem_reloc)/sizeof(gem_reloc[0]);
101 gem_exec[0].relocs_ptr = (uintptr_t)gem_reloc;
103 execbuf.buffer_count = 1;
104 execbuf.flags = flags & USE_LUT;
105 do_or_die(drmIoctl(fd,
106 DRM_IOCTL_I915_GEM_EXECBUFFER2,
109 igt_info("Batch is now at offset %ld\n", (long)gem_exec[0].offset);
111 gem_read(fd, gem_exec[0].handle, 0, buf, sizeof(buf));
112 gem_close(fd, gem_exec[0].handle);
114 for (i = 0; i < sizeof(gem_reloc)/sizeof(gem_reloc[0]); i++)
115 igt_assert(buf[2 + i] < gtt_max);
128 igt_subtest("negative-reloc")
129 negative_reloc(fd, 0);
131 igt_subtest("negative-reloc-lut")
132 negative_reloc(fd, USE_LUT);