2 * Copyright © 2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Daniel Vetter <daniel.vetter@ffwll.ch>
36 #include "ioctl_wrappers.h"
38 #include "intel_bufmgr.h"
39 #include "intel_batchbuffer.h"
41 #include "intel_chipset.h"
43 static drm_intel_bufmgr *bufmgr;
44 struct intel_batchbuffer *batch;
46 /* Testcase: check whether the libdrm vma limiter works
48 * We've had reports of the X server exhausting the default rlimit of 64k vma's
49 * in the kernel. libdrm has grown facilities to limit the vma caching since,
50 * this checks whether they actually work.
53 /* we do both cpu and gtt maps, so only need half of 64k to exhaust */
54 #define BO_ARRAY_SIZE 35000
55 drm_intel_bo *bos[BO_ARRAY_SIZE];
63 igt_skip_on_simulation();
67 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
68 drm_intel_bufmgr_gem_enable_reuse(bufmgr);
69 batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
71 drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 500);
73 for (i = 0; i < BO_ARRAY_SIZE; i++) {
74 bos[i] = drm_intel_bo_alloc(bufmgr, "mmap bo", 4096, 4096);
77 drm_intel_bo_map(bos[i], 1);
78 ptr = bos[i]->virtual;
81 drm_intel_bo_unmap(bos[i]);
83 drm_intel_gem_bo_map_gtt(bos[i]);
84 ptr = bos[i]->virtual;
87 drm_intel_gem_bo_unmap_gtt(bos[i]);
90 /* and recheck whether a second map of the same still works */
91 for (i = 0; i < BO_ARRAY_SIZE; i++) {
92 bos[i] = drm_intel_bo_alloc(bufmgr, "mmap bo", 4096, 4096);
95 drm_intel_bo_map(bos[i], 1);
96 ptr = bos[i]->virtual;
97 igt_assert(*ptr = 'c');
98 drm_intel_bo_unmap(bos[i]);
100 drm_intel_gem_bo_map_gtt(bos[i]);
101 ptr = bos[i]->virtual;
102 igt_assert(*ptr = 'c');
103 drm_intel_gem_bo_unmap_gtt(bos[i]);
106 intel_batchbuffer_free(batch);
107 drm_intel_bufmgr_destroy(bufmgr);