Merge tag 'for-master-20181130' of git://git.denx.de/u-boot-rockchip
[platform/kernel/u-boot.git] / test / dm / i2c.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2013 Google, Inc
4  *
5  * Note: Test coverage does not include 10-bit addressing
6  */
7
8 #include <common.h>
9 #include <dm.h>
10 #include <fdtdec.h>
11 #include <i2c.h>
12 #include <asm/state.h>
13 #include <asm/test.h>
14 #include <dm/device-internal.h>
15 #include <dm/test.h>
16 #include <dm/uclass-internal.h>
17 #include <dm/util.h>
18 #include <test/ut.h>
19
20 static const int busnum;
21 static const int chip = 0x2c;
22
23 /* Test that we can find buses and chips */
24 static int dm_test_i2c_find(struct unit_test_state *uts)
25 {
26         struct udevice *bus, *dev;
27         const int no_chip = 0x10;
28
29         ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_I2C, busnum,
30                                                        false, &bus));
31
32         /*
33          * The post_bind() method will bind devices to chip selects. Check
34          * this then remove the emulation and the slave device.
35          */
36         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
37         ut_assertok(dm_i2c_probe(bus, chip, 0, &dev));
38         ut_asserteq(-ENOENT, dm_i2c_probe(bus, no_chip, 0, &dev));
39         ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_I2C, 1, &bus));
40
41         return 0;
42 }
43 DM_TEST(dm_test_i2c_find, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
44
45 static int dm_test_i2c_read_write(struct unit_test_state *uts)
46 {
47         struct udevice *bus, *dev;
48         uint8_t buf[5];
49
50         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
51         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
52         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
53         ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
54         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
55         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
56         ut_assertok(memcmp(buf, "\0\0AB\0", sizeof(buf)));
57
58         return 0;
59 }
60 DM_TEST(dm_test_i2c_read_write, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
61
62 static int dm_test_i2c_speed(struct unit_test_state *uts)
63 {
64         struct udevice *bus, *dev;
65         uint8_t buf[5];
66
67         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
68
69         /* Use test mode so we create the required errors for invalid speeds */
70         sandbox_i2c_set_test_mode(bus, true);
71         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
72         ut_assertok(dm_i2c_set_bus_speed(bus, 100000));
73         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
74         ut_assertok(dm_i2c_set_bus_speed(bus, 400000));
75         ut_asserteq(400000, dm_i2c_get_bus_speed(bus));
76         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
77         ut_asserteq(-EINVAL, dm_i2c_write(dev, 0, buf, 5));
78         sandbox_i2c_set_test_mode(bus, false);
79
80         return 0;
81 }
82 DM_TEST(dm_test_i2c_speed, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
83
84 static int dm_test_i2c_offset_len(struct unit_test_state *uts)
85 {
86         struct udevice *bus, *dev;
87         uint8_t buf[5];
88
89         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
90         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
91         ut_assertok(i2c_set_chip_offset_len(dev, 1));
92         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
93
94         /* This is not supported by the uclass */
95         ut_asserteq(-EINVAL, i2c_set_chip_offset_len(dev, 5));
96
97         return 0;
98 }
99 DM_TEST(dm_test_i2c_offset_len, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
100
101 static int dm_test_i2c_probe_empty(struct unit_test_state *uts)
102 {
103         struct udevice *bus, *dev;
104
105         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
106
107         /* Use test mode so that this chip address will always probe */
108         sandbox_i2c_set_test_mode(bus, true);
109         ut_assertok(dm_i2c_probe(bus, SANDBOX_I2C_TEST_ADDR, 0, &dev));
110         sandbox_i2c_set_test_mode(bus, false);
111
112         return 0;
113 }
114 DM_TEST(dm_test_i2c_probe_empty, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
115
116 static int dm_test_i2c_bytewise(struct unit_test_state *uts)
117 {
118         struct udevice *bus, *dev;
119         struct udevice *eeprom;
120         uint8_t buf[5];
121
122         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
123         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
124         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
125         ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
126
127         /* Tell the EEPROM to only read/write one register at a time */
128         ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
129         ut_assertnonnull(eeprom);
130         sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_SINGLE_BYTE);
131
132         /* Now we only get the first byte - the rest will be 0xff */
133         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
134         ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
135
136         /* If we do a separate transaction for each byte, it works */
137         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
138         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
139         ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
140
141         /* This will only write A */
142         ut_assertok(i2c_set_chip_flags(dev, 0));
143         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
144         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
145         ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
146
147         /* Check that the B was ignored */
148         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
149         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
150         ut_assertok(memcmp(buf, "\0\0A\0\0\0", sizeof(buf)));
151
152         /* Now write it again with the new flags, it should work */
153         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS));
154         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
155         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
156         ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
157
158         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS |
159                                                 DM_I2C_CHIP_RD_ADDRESS));
160         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
161         ut_assertok(memcmp(buf, "\0\0AB\0\0", sizeof(buf)));
162
163         /* Restore defaults */
164         sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_NONE);
165         ut_assertok(i2c_set_chip_flags(dev, 0));
166
167         return 0;
168 }
169 DM_TEST(dm_test_i2c_bytewise, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
170
171 static int dm_test_i2c_offset(struct unit_test_state *uts)
172 {
173         struct udevice *eeprom;
174         struct udevice *dev;
175         uint8_t buf[5];
176
177         ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
178
179         /* Do a transfer so we can find the emulator */
180         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
181         ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
182
183         /* Offset length 0 */
184         sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
185         ut_assertok(i2c_set_chip_offset_len(dev, 0));
186         ut_assertok(dm_i2c_write(dev, 10 /* ignored */, (uint8_t *)"AB", 2));
187         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
188         ut_assertok(memcmp(buf, "AB\0\0\0\0", sizeof(buf)));
189
190         /* Offset length 1 */
191         sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
192         ut_assertok(i2c_set_chip_offset_len(dev, 1));
193         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
194         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
195         ut_assertok(memcmp(buf, "ABAB\0", sizeof(buf)));
196
197         /* Offset length 2 */
198         sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
199         ut_assertok(i2c_set_chip_offset_len(dev, 2));
200         ut_assertok(dm_i2c_write(dev, 0x210, (uint8_t *)"AB", 2));
201         ut_assertok(dm_i2c_read(dev, 0x210, buf, 5));
202         ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
203
204         /* Offset length 3 */
205         sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
206         ut_assertok(i2c_set_chip_offset_len(dev, 2));
207         ut_assertok(dm_i2c_write(dev, 0x410, (uint8_t *)"AB", 2));
208         ut_assertok(dm_i2c_read(dev, 0x410, buf, 5));
209         ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
210
211         /* Offset length 4 */
212         sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
213         ut_assertok(i2c_set_chip_offset_len(dev, 2));
214         ut_assertok(dm_i2c_write(dev, 0x420, (uint8_t *)"AB", 2));
215         ut_assertok(dm_i2c_read(dev, 0x420, buf, 5));
216         ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
217
218         /* Restore defaults */
219         sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
220
221         return 0;
222 }
223 DM_TEST(dm_test_i2c_offset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);