test/dm/i2c.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2013 Google, Inc
   4  *
   5  * Note: Test coverage does not include 10-bit addressing
   6  */
   7
   8 #include <common.h>
   9 #include <dm.h>
  10 #include <fdtdec.h>
  11 #include <i2c.h>
  12 #include <asm/state.h>
  13 #include <asm/test.h>
  14 #include <dm/device-internal.h>
  15 #include <dm/test.h>
  16 #include <dm/uclass-internal.h>
  17 #include <dm/util.h>
  18 #include <hexdump.h>
  19 #include <test/test.h>
  20 #include <test/ut.h>
  21
  22 static const int busnum;
  23 static const int chip = 0x2c;
  24
  25 /* Test that we can find buses and chips */
  26 static int dm_test_i2c_find(struct unit_test_state *uts)
  27 {
  28         struct udevice *bus, *dev;
  29         const int no_chip = 0x10;
  30
  31         /*
  32          * The post_bind() method will bind devices to chip selects. Check
  33          * this then remove the emulation and the slave device.
  34          */
  35         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  36         ut_assertok(dm_i2c_probe(bus, chip, 0, &dev));
  37         ut_asserteq(-ENOENT, dm_i2c_probe(bus, no_chip, 0, &dev));
  38         ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_I2C, 1, &bus));
  39
  40         return 0;
  41 }
  42 DM_TEST(dm_test_i2c_find, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
  43
  44 static int dm_test_i2c_read_write(struct unit_test_state *uts)
  45 {
  46         struct udevice *bus, *dev;
  47         uint8_t buf[5];
  48
  49         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  50         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
  51         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  52         ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
  53         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
  54         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  55         ut_asserteq_mem(buf, "\0\0AB\0", sizeof(buf));
  56
  57         return 0;
  58 }
  59 DM_TEST(dm_test_i2c_read_write, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
  60
  61 static int dm_test_i2c_speed(struct unit_test_state *uts)
  62 {
  63         struct udevice *bus, *dev;
  64         uint8_t buf[5];
  65
  66         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  67
  68         /* Use test mode so we create the required errors for invalid speeds */
  69         sandbox_i2c_set_test_mode(bus, true);
  70         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
  71         ut_assertok(dm_i2c_set_bus_speed(bus, 100000));
  72         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  73         ut_assertok(dm_i2c_set_bus_speed(bus, 400000));
  74         ut_asserteq(400000, dm_i2c_get_bus_speed(bus));
  75         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  76         ut_asserteq(-EINVAL, dm_i2c_write(dev, 0, buf, 5));
  77         sandbox_i2c_set_test_mode(bus, false);
  78
  79         return 0;
  80 }
  81 DM_TEST(dm_test_i2c_speed, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
  82
  83 static int dm_test_i2c_offset_len(struct unit_test_state *uts)
  84 {
  85         struct udevice *bus, *dev;
  86         uint8_t buf[5];
  87
  88         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  89         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
  90         ut_assertok(i2c_set_chip_offset_len(dev, 1));
  91         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  92
  93         /* This is not supported by the uclass */
  94         ut_asserteq(-EINVAL, i2c_set_chip_offset_len(dev, 5));
  95
  96         return 0;
  97 }
  98 DM_TEST(dm_test_i2c_offset_len, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
  99
 100 static int dm_test_i2c_probe_empty(struct unit_test_state *uts)
 101 {
 102         struct udevice *bus, *dev;
 103
 104         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
 105
 106         /* Use test mode so that this chip address will always probe */
 107         sandbox_i2c_set_test_mode(bus, true);
 108         ut_assertok(dm_i2c_probe(bus, SANDBOX_I2C_TEST_ADDR, 0, &dev));
 109         sandbox_i2c_set_test_mode(bus, false);
 110
 111         return 0;
 112 }
 113 DM_TEST(dm_test_i2c_probe_empty, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
 114
 115 static int dm_test_i2c_bytewise(struct unit_test_state *uts)
 116 {
 117         struct udevice *bus, *dev;
 118         struct udevice *eeprom;
 119         uint8_t buf[5];
 120
 121         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
 122         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
 123         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 124         ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
 125
 126         /* Tell the EEPROM to only read/write one register at a time */
 127         ut_assertok(uclass_first_device_err(UCLASS_I2C_EMUL, &eeprom));
 128         ut_assertnonnull(eeprom);
 129         sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_SINGLE_BYTE);
 130
 131         /* Now we only get the first byte - the rest will be 0xff */
 132         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 133         ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
 134
 135         /* If we do a separate transaction for each byte, it works */
 136         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
 137         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 138         ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
 139
 140         /* This will only write A */
 141         ut_assertok(i2c_set_chip_flags(dev, 0));
 142         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
 143         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 144         ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
 145
 146         /* Check that the B was ignored */
 147         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
 148         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 149         ut_asserteq_mem(buf, "\0\0A\0\0\0", sizeof(buf));
 150
 151         /* Now write it again with the new flags, it should work */
 152         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS));
 153         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
 154         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 155         ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
 156
 157         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS |
 158                                                 DM_I2C_CHIP_RD_ADDRESS));
 159         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 160         ut_asserteq_mem(buf, "\0\0AB\0\0", sizeof(buf));
 161
 162         /* Restore defaults */
 163         sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_NONE);
 164         ut_assertok(i2c_set_chip_flags(dev, 0));
 165
 166         return 0;
 167 }
 168 DM_TEST(dm_test_i2c_bytewise, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
 169
 170 static int dm_test_i2c_offset(struct unit_test_state *uts)
 171 {
 172         struct udevice *eeprom;
 173         struct udevice *dev;
 174         uint8_t buf[5];
 175
 176         ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
 177
 178         /* Do a transfer so we can find the emulator */
 179         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 180         ut_assertok(uclass_first_device_err(UCLASS_I2C_EMUL, &eeprom));
 181
 182         /* Offset length 0 */
 183         sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
 184         ut_assertok(i2c_set_chip_offset_len(dev, 0));
 185         ut_assertok(dm_i2c_write(dev, 10 /* ignored */, (uint8_t *)"AB", 2));
 186         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 187         ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
 188         ut_asserteq(0, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 189
 190         /* Offset length 1 */
 191         sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
 192         ut_assertok(i2c_set_chip_offset_len(dev, 1));
 193         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
 194         ut_asserteq(2, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 195         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 196         ut_asserteq_mem("ABAB\0", buf, sizeof(buf));
 197         ut_asserteq(0, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 198
 199         /* Offset length 2 boundary - check model wrapping */
 200         sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
 201         ut_assertok(i2c_set_chip_offset_len(dev, 2));
 202         ut_assertok(dm_i2c_write(dev, 0xFF, (uint8_t *)"A", 1));
 203         ut_asserteq(0xFF, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 204         ut_assertok(dm_i2c_write(dev, 0x100, (uint8_t *)"B", 1));
 205         ut_asserteq(0x100, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 206         ut_assertok(dm_i2c_write(dev, 0x101, (uint8_t *)"C", 1));
 207         ut_asserteq(0x101, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 208         ut_assertok(dm_i2c_read(dev, 0xFF, buf, 5));
 209         ut_asserteq_mem("ABCAB", buf, sizeof(buf));
 210         ut_asserteq(0xFF, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 211
 212         /* Offset length 2 */
 213         sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
 214         ut_assertok(i2c_set_chip_offset_len(dev, 2));
 215         ut_assertok(dm_i2c_write(dev, 0x2020, (uint8_t *)"AB", 2));
 216         ut_assertok(dm_i2c_read(dev, 0x2020, buf, 5));
 217         ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
 218         ut_asserteq(0x2020, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 219
 220         /* Offset length 3 */
 221         sandbox_i2c_eeprom_set_offset_len(eeprom, 3);
 222         ut_assertok(i2c_set_chip_offset_len(dev, 3));
 223         ut_assertok(dm_i2c_write(dev, 0x303030, (uint8_t *)"AB", 2));
 224         ut_assertok(dm_i2c_read(dev, 0x303030, buf, 5));
 225         ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
 226         ut_asserteq(0x303030, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 227
 228         /* Offset length 4 */
 229         sandbox_i2c_eeprom_set_offset_len(eeprom, 4);
 230         ut_assertok(i2c_set_chip_offset_len(dev, 4));
 231         ut_assertok(dm_i2c_write(dev, 0x40404040, (uint8_t *)"AB", 2));
 232         ut_assertok(dm_i2c_read(dev, 0x40404040, buf, 5));
 233         ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
 234         ut_asserteq(0x40404040, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 235
 236         /* Restore defaults */
 237         sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
 238
 239         return 0;
 240 }
 241 DM_TEST(dm_test_i2c_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
 242
 243 static int dm_test_i2c_addr_offset(struct unit_test_state *uts)
 244 {
 245         struct udevice *eeprom;
 246         struct udevice *dev;
 247         u8 buf[5];
 248
 249         ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
 250
 251         /* Do a transfer so we can find the emulator */
 252         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 253         ut_assertok(uclass_first_device_err(UCLASS_I2C_EMUL, &eeprom));
 254
 255         /* Offset length 0 */
 256         sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
 257         sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
 258         ut_assertok(i2c_set_chip_offset_len(dev, 0));
 259         ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
 260         ut_assertok(dm_i2c_write(dev, 0x3, (uint8_t *)"AB", 2));
 261         ut_assertok(dm_i2c_read(dev, 0x3, buf, 5));
 262         ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
 263         ut_asserteq(0x3, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 264         ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
 265
 266         /* Offset length 1 */
 267         sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
 268         sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
 269         ut_assertok(i2c_set_chip_offset_len(dev, 1));
 270         ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
 271         ut_assertok(dm_i2c_write(dev, 0x310, (uint8_t *)"AB", 2));
 272         ut_assertok(dm_i2c_read(dev, 0x310, buf, 5));
 273         ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
 274         ut_asserteq(0x310, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 275         ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
 276
 277         /* Offset length 2 */
 278         sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
 279         sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
 280         ut_assertok(i2c_set_chip_offset_len(dev, 2));
 281         ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
 282         ut_assertok(dm_i2c_write(dev, 0x32020, (uint8_t *)"AB", 2));
 283         ut_assertok(dm_i2c_read(dev, 0x32020, buf, 5));
 284         ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
 285         ut_asserteq(0x32020, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 286         ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
 287
 288         /* Offset length 3 */
 289         sandbox_i2c_eeprom_set_offset_len(eeprom, 3);
 290         sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
 291         ut_assertok(i2c_set_chip_offset_len(dev, 3));
 292         ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
 293         ut_assertok(dm_i2c_write(dev, 0x3303030, (uint8_t *)"AB", 2));
 294         ut_assertok(dm_i2c_read(dev, 0x3303030, buf, 5));
 295         ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
 296         ut_asserteq(0x3303030, sanbox_i2c_eeprom_get_prev_offset(eeprom));
 297         ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
 298
 299         /* Restore defaults */
 300         sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
 301         sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0);
 302
 303         return 0;
 304 }
 305
 306 DM_TEST(dm_test_i2c_addr_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
 307
 308 static int dm_test_i2c_reg_clrset(struct unit_test_state *uts)
 309 {
 310         struct udevice *eeprom;
 311         struct udevice *dev;
 312         u8 buf[5];
 313
 314         ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
 315
 316         /* Do a transfer so we can find the emulator */
 317         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 318         ut_assertok(uclass_first_device_err(UCLASS_I2C_EMUL, &eeprom));
 319
 320         /* Dummy data for the test */
 321         ut_assertok(dm_i2c_write(dev, 0, "\xff\x00\xff\x00\x10", 5));
 322
 323         /* Do some clrset tests */
 324         ut_assertok(dm_i2c_reg_clrset(dev, 0, 0xff, 0x10));
 325         ut_assertok(dm_i2c_reg_clrset(dev, 1, 0x00, 0x11));
 326         ut_assertok(dm_i2c_reg_clrset(dev, 2, 0xed, 0x00));
 327         ut_assertok(dm_i2c_reg_clrset(dev, 3, 0xff, 0x13));
 328         ut_assertok(dm_i2c_reg_clrset(dev, 4, 0x00, 0x14));
 329
 330         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 331         ut_asserteq_mem("\x10\x11\x12\x13\x14", buf, sizeof(buf));
 332
 333         return 0;
 334 }
 335 DM_TEST(dm_test_i2c_reg_clrset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);