1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2013 Google, Inc
5 * Note: Test coverage does not include 10-bit addressing
12 #include <asm/state.h>
14 #include <dm/device-internal.h>
16 #include <dm/uclass-internal.h>
19 #include <test/test.h>
22 static const int busnum;
23 static const int chip = 0x2c;
25 /* Test that we can find buses and chips */
26 static int dm_test_i2c_find(struct unit_test_state *uts)
28 struct udevice *bus, *dev;
29 const int no_chip = 0x10;
31 ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_I2C, busnum,
35 * The post_bind() method will bind devices to chip selects. Check
36 * this then remove the emulation and the slave device.
38 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
39 ut_assertok(dm_i2c_probe(bus, chip, 0, &dev));
40 ut_asserteq(-ENOENT, dm_i2c_probe(bus, no_chip, 0, &dev));
41 ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_I2C, 1, &bus));
45 DM_TEST(dm_test_i2c_find, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
47 static int dm_test_i2c_read_write(struct unit_test_state *uts)
49 struct udevice *bus, *dev;
52 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
53 ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
54 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
55 ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
56 ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
57 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
58 ut_asserteq_mem(buf, "\0\0AB\0", sizeof(buf));
62 DM_TEST(dm_test_i2c_read_write, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
64 static int dm_test_i2c_speed(struct unit_test_state *uts)
66 struct udevice *bus, *dev;
69 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
71 /* Use test mode so we create the required errors for invalid speeds */
72 sandbox_i2c_set_test_mode(bus, true);
73 ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
74 ut_assertok(dm_i2c_set_bus_speed(bus, 100000));
75 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
76 ut_assertok(dm_i2c_set_bus_speed(bus, 400000));
77 ut_asserteq(400000, dm_i2c_get_bus_speed(bus));
78 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
79 ut_asserteq(-EINVAL, dm_i2c_write(dev, 0, buf, 5));
80 sandbox_i2c_set_test_mode(bus, false);
84 DM_TEST(dm_test_i2c_speed, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
86 static int dm_test_i2c_offset_len(struct unit_test_state *uts)
88 struct udevice *bus, *dev;
91 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
92 ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
93 ut_assertok(i2c_set_chip_offset_len(dev, 1));
94 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
96 /* This is not supported by the uclass */
97 ut_asserteq(-EINVAL, i2c_set_chip_offset_len(dev, 5));
101 DM_TEST(dm_test_i2c_offset_len, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
103 static int dm_test_i2c_probe_empty(struct unit_test_state *uts)
105 struct udevice *bus, *dev;
107 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
109 /* Use test mode so that this chip address will always probe */
110 sandbox_i2c_set_test_mode(bus, true);
111 ut_assertok(dm_i2c_probe(bus, SANDBOX_I2C_TEST_ADDR, 0, &dev));
112 sandbox_i2c_set_test_mode(bus, false);
116 DM_TEST(dm_test_i2c_probe_empty, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
118 static int dm_test_i2c_bytewise(struct unit_test_state *uts)
120 struct udevice *bus, *dev;
121 struct udevice *eeprom;
124 ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
125 ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
126 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
127 ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
129 /* Tell the EEPROM to only read/write one register at a time */
130 ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
131 ut_assertnonnull(eeprom);
132 sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_SINGLE_BYTE);
134 /* Now we only get the first byte - the rest will be 0xff */
135 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
136 ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
138 /* If we do a separate transaction for each byte, it works */
139 ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
140 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
141 ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
143 /* This will only write A */
144 ut_assertok(i2c_set_chip_flags(dev, 0));
145 ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
146 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
147 ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
149 /* Check that the B was ignored */
150 ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
151 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
152 ut_asserteq_mem(buf, "\0\0A\0\0\0", sizeof(buf));
154 /* Now write it again with the new flags, it should work */
155 ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS));
156 ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
157 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
158 ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
160 ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS |
161 DM_I2C_CHIP_RD_ADDRESS));
162 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
163 ut_asserteq_mem(buf, "\0\0AB\0\0", sizeof(buf));
165 /* Restore defaults */
166 sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_NONE);
167 ut_assertok(i2c_set_chip_flags(dev, 0));
171 DM_TEST(dm_test_i2c_bytewise, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
173 static int dm_test_i2c_offset(struct unit_test_state *uts)
175 struct udevice *eeprom;
179 ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
181 /* Do a transfer so we can find the emulator */
182 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
183 ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
185 /* Offset length 0 */
186 sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
187 ut_assertok(i2c_set_chip_offset_len(dev, 0));
188 ut_assertok(dm_i2c_write(dev, 10 /* ignored */, (uint8_t *)"AB", 2));
189 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
190 ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
191 ut_asserteq(0, sanbox_i2c_eeprom_get_prev_offset(eeprom));
193 /* Offset length 1 */
194 sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
195 ut_assertok(i2c_set_chip_offset_len(dev, 1));
196 ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
197 ut_asserteq(2, sanbox_i2c_eeprom_get_prev_offset(eeprom));
198 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
199 ut_asserteq_mem("ABAB\0", buf, sizeof(buf));
200 ut_asserteq(0, sanbox_i2c_eeprom_get_prev_offset(eeprom));
202 /* Offset length 2 boundary - check model wrapping */
203 sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
204 ut_assertok(i2c_set_chip_offset_len(dev, 2));
205 ut_assertok(dm_i2c_write(dev, 0xFF, (uint8_t *)"A", 1));
206 ut_asserteq(0xFF, sanbox_i2c_eeprom_get_prev_offset(eeprom));
207 ut_assertok(dm_i2c_write(dev, 0x100, (uint8_t *)"B", 1));
208 ut_asserteq(0x100, sanbox_i2c_eeprom_get_prev_offset(eeprom));
209 ut_assertok(dm_i2c_write(dev, 0x101, (uint8_t *)"C", 1));
210 ut_asserteq(0x101, sanbox_i2c_eeprom_get_prev_offset(eeprom));
211 ut_assertok(dm_i2c_read(dev, 0xFF, buf, 5));
212 ut_asserteq_mem("ABCAB", buf, sizeof(buf));
213 ut_asserteq(0xFF, sanbox_i2c_eeprom_get_prev_offset(eeprom));
215 /* Offset length 2 */
216 sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
217 ut_assertok(i2c_set_chip_offset_len(dev, 2));
218 ut_assertok(dm_i2c_write(dev, 0x2020, (uint8_t *)"AB", 2));
219 ut_assertok(dm_i2c_read(dev, 0x2020, buf, 5));
220 ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
221 ut_asserteq(0x2020, sanbox_i2c_eeprom_get_prev_offset(eeprom));
223 /* Offset length 3 */
224 sandbox_i2c_eeprom_set_offset_len(eeprom, 3);
225 ut_assertok(i2c_set_chip_offset_len(dev, 3));
226 ut_assertok(dm_i2c_write(dev, 0x303030, (uint8_t *)"AB", 2));
227 ut_assertok(dm_i2c_read(dev, 0x303030, buf, 5));
228 ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
229 ut_asserteq(0x303030, sanbox_i2c_eeprom_get_prev_offset(eeprom));
231 /* Offset length 4 */
232 sandbox_i2c_eeprom_set_offset_len(eeprom, 4);
233 ut_assertok(i2c_set_chip_offset_len(dev, 4));
234 ut_assertok(dm_i2c_write(dev, 0x40404040, (uint8_t *)"AB", 2));
235 ut_assertok(dm_i2c_read(dev, 0x40404040, buf, 5));
236 ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
237 ut_asserteq(0x40404040, sanbox_i2c_eeprom_get_prev_offset(eeprom));
239 /* Restore defaults */
240 sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
244 DM_TEST(dm_test_i2c_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
246 static int dm_test_i2c_addr_offset(struct unit_test_state *uts)
248 struct udevice *eeprom;
252 ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
254 /* Do a transfer so we can find the emulator */
255 ut_assertok(dm_i2c_read(dev, 0, buf, 5));
256 ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
258 /* Offset length 0 */
259 sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
260 sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
261 ut_assertok(i2c_set_chip_offset_len(dev, 0));
262 ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
263 ut_assertok(dm_i2c_write(dev, 0x3, (uint8_t *)"AB", 2));
264 ut_assertok(dm_i2c_read(dev, 0x3, buf, 5));
265 ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
266 ut_asserteq(0x3, sanbox_i2c_eeprom_get_prev_offset(eeprom));
267 ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
269 /* Offset length 1 */
270 sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
271 sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
272 ut_assertok(i2c_set_chip_offset_len(dev, 1));
273 ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
274 ut_assertok(dm_i2c_write(dev, 0x310, (uint8_t *)"AB", 2));
275 ut_assertok(dm_i2c_read(dev, 0x310, buf, 5));
276 ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
277 ut_asserteq(0x310, sanbox_i2c_eeprom_get_prev_offset(eeprom));
278 ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
280 /* Offset length 2 */
281 sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
282 sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
283 ut_assertok(i2c_set_chip_offset_len(dev, 2));
284 ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
285 ut_assertok(dm_i2c_write(dev, 0x32020, (uint8_t *)"AB", 2));
286 ut_assertok(dm_i2c_read(dev, 0x32020, buf, 5));
287 ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
288 ut_asserteq(0x32020, sanbox_i2c_eeprom_get_prev_offset(eeprom));
289 ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
291 /* Offset length 3 */
292 sandbox_i2c_eeprom_set_offset_len(eeprom, 3);
293 sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
294 ut_assertok(i2c_set_chip_offset_len(dev, 3));
295 ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
296 ut_assertok(dm_i2c_write(dev, 0x3303030, (uint8_t *)"AB", 2));
297 ut_assertok(dm_i2c_read(dev, 0x3303030, buf, 5));
298 ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
299 ut_asserteq(0x3303030, sanbox_i2c_eeprom_get_prev_offset(eeprom));
300 ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
302 /* Restore defaults */
303 sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
304 sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0);
309 DM_TEST(dm_test_i2c_addr_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);