2 * x86 memory access helpers
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
22 #include "exec/helper-proto.h"
23 #include "exec/exec-all.h"
24 #include "exec/cpu_ldst.h"
25 #include "qemu/int128.h"
28 /* broken thread support */
30 #if defined(CONFIG_USER_ONLY)
31 QemuMutex global_cpu_lock;
33 void helper_lock(void)
35 qemu_mutex_lock(&global_cpu_lock);
38 void helper_unlock(void)
40 qemu_mutex_unlock(&global_cpu_lock);
43 void helper_lock_init(void)
45 qemu_mutex_init(&global_cpu_lock);
48 void helper_lock(void)
52 void helper_unlock(void)
56 void helper_lock_init(void)
61 void helper_cmpxchg8b_unlocked(CPUX86State *env, target_ulong a0)
63 uintptr_t ra = GETPC();
64 uint64_t oldv, cmpv, newv;
67 eflags = cpu_cc_compute_all(env, CC_OP);
69 cmpv = deposit64(env->regs[R_EAX], 32, 32, env->regs[R_EDX]);
70 newv = deposit64(env->regs[R_EBX], 32, 32, env->regs[R_ECX]);
72 oldv = cpu_ldq_data_ra(env, a0, ra);
73 newv = (cmpv == oldv ? newv : oldv);
74 /* always do the store */
75 cpu_stq_data_ra(env, a0, newv, ra);
80 env->regs[R_EAX] = (uint32_t)oldv;
81 env->regs[R_EDX] = (uint32_t)(oldv >> 32);
87 void helper_cmpxchg8b(CPUX86State *env, target_ulong a0)
89 #ifdef CONFIG_ATOMIC64
90 uint64_t oldv, cmpv, newv;
93 eflags = cpu_cc_compute_all(env, CC_OP);
95 cmpv = deposit64(env->regs[R_EAX], 32, 32, env->regs[R_EDX]);
96 newv = deposit64(env->regs[R_EBX], 32, 32, env->regs[R_ECX]);
98 #ifdef CONFIG_USER_ONLY
100 uint64_t *haddr = g2h(a0);
101 cmpv = cpu_to_le64(cmpv);
102 newv = cpu_to_le64(newv);
103 oldv = atomic_cmpxchg__nocheck(haddr, cmpv, newv);
104 oldv = le64_to_cpu(oldv);
108 uintptr_t ra = GETPC();
109 int mem_idx = cpu_mmu_index(env, false);
110 TCGMemOpIdx oi = make_memop_idx(MO_TEQ, mem_idx);
111 oldv = helper_atomic_cmpxchgq_le_mmu(env, a0, cmpv, newv, oi, ra);
118 env->regs[R_EAX] = (uint32_t)oldv;
119 env->regs[R_EDX] = (uint32_t)(oldv >> 32);
124 cpu_loop_exit_atomic(ENV_GET_CPU(env), GETPC());
125 #endif /* CONFIG_ATOMIC64 */
129 void helper_cmpxchg16b_unlocked(CPUX86State *env, target_ulong a0)
131 uintptr_t ra = GETPC();
132 Int128 oldv, cmpv, newv;
137 if ((a0 & 0xf) != 0) {
138 raise_exception_ra(env, EXCP0D_GPF, GETPC());
140 eflags = cpu_cc_compute_all(env, CC_OP);
142 cmpv = int128_make128(env->regs[R_EAX], env->regs[R_EDX]);
143 newv = int128_make128(env->regs[R_EBX], env->regs[R_ECX]);
145 o0 = cpu_ldq_data_ra(env, a0 + 0, ra);
146 o1 = cpu_ldq_data_ra(env, a0 + 8, ra);
148 oldv = int128_make128(o0, o1);
149 success = int128_eq(oldv, cmpv);
154 cpu_stq_data_ra(env, a0 + 0, int128_getlo(newv), ra);
155 cpu_stq_data_ra(env, a0 + 8, int128_gethi(newv), ra);
160 env->regs[R_EAX] = int128_getlo(oldv);
161 env->regs[R_EDX] = int128_gethi(oldv);
167 void helper_cmpxchg16b(CPUX86State *env, target_ulong a0)
169 uintptr_t ra = GETPC();
171 if ((a0 & 0xf) != 0) {
172 raise_exception_ra(env, EXCP0D_GPF, ra);
174 #ifndef CONFIG_ATOMIC128
175 cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
177 int eflags = cpu_cc_compute_all(env, CC_OP);
179 Int128 cmpv = int128_make128(env->regs[R_EAX], env->regs[R_EDX]);
180 Int128 newv = int128_make128(env->regs[R_EBX], env->regs[R_ECX]);
182 int mem_idx = cpu_mmu_index(env, false);
183 TCGMemOpIdx oi = make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx);
184 Int128 oldv = helper_atomic_cmpxchgo_le_mmu(env, a0, cmpv,
187 if (int128_eq(oldv, cmpv)) {
190 env->regs[R_EAX] = int128_getlo(oldv);
191 env->regs[R_EDX] = int128_gethi(oldv);
200 void helper_boundw(CPUX86State *env, target_ulong a0, int v)
204 low = cpu_ldsw_data_ra(env, a0, GETPC());
205 high = cpu_ldsw_data_ra(env, a0 + 2, GETPC());
207 if (v < low || v > high) {
208 if (env->hflags & HF_MPX_EN_MASK) {
209 env->bndcs_regs.sts = 0;
211 raise_exception_ra(env, EXCP05_BOUND, GETPC());
215 void helper_boundl(CPUX86State *env, target_ulong a0, int v)
219 low = cpu_ldl_data_ra(env, a0, GETPC());
220 high = cpu_ldl_data_ra(env, a0 + 4, GETPC());
221 if (v < low || v > high) {
222 if (env->hflags & HF_MPX_EN_MASK) {
223 env->bndcs_regs.sts = 0;
225 raise_exception_ra(env, EXCP05_BOUND, GETPC());
229 #if !defined(CONFIG_USER_ONLY)
230 /* try to fill the TLB and return an exception if error. If retaddr is
231 * NULL, it means that the function was called in C code (i.e. not
232 * from generated code or from helper.c)
234 /* XXX: fix it to restore all registers */
235 void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
236 int mmu_idx, uintptr_t retaddr)
240 ret = x86_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
242 X86CPU *cpu = X86_CPU(cs);
243 CPUX86State *env = &cpu->env;
245 raise_exception_err_ra(env, cs->exception_index, env->error_code, retaddr);