stdlib/longlong.h

   1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
   2    Copyright (C) 1991,92,93,94,96,97,98,99 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Library General Public License as
   7    published by the Free Software Foundation; either version 2 of the
   8    License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Library General Public License for more details.
  14
  15    You should have received a copy of the GNU Library General Public
  16    License along with the GNU C Library; see the file COPYING.LIB.  If not,
  17    write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
  18    Boston, MA 02111-1307, USA.  */
  19
  20 /* You have to define the following before including this file:
  21
  22    UWtype -- An unsigned type, default type for operations (typically a "word")
  23    UHWtype -- An unsigned type, at least half the size of UWtype.
  24    UDWtype -- An unsigned type, at least twice as large a UWtype
  25    W_TYPE_SIZE -- size in bits of UWtype
  26
  27    SItype, USItype -- Signed and unsigned 32 bit types.
  28    DItype, UDItype -- Signed and unsigned 64 bit types.
  29
  30    On a 32 bit machine UWtype should typically be USItype;
  31    on a 64 bit machine, UWtype should typically be UDItype.
  32 */
  33
  34 #define __BITS4 (W_TYPE_SIZE / 4)
  35 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  36 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  37 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  38
  39 /* This is used to make sure no undesirable sharing between different libraries
  40    that use this file takes place.  */
  41 #ifndef __MPN
  42 #define __MPN(x) __##x
  43 #endif
  44
  45 #ifndef __P
  46 # if defined __GNUC__ || (defined (__STDC__) && __STDC__) \
  47      || defined (__cplusplus)
  48 #  define __P(args)     args
  49 # else
  50 #  define __P(args)     ()
  51 # endif
  52 #endif
  53
  54 /* Define auxiliary asm macros.
  55
  56    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
  57    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
  58    word product in HIGH_PROD and LOW_PROD.
  59
  60    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  61    UDWtype product.  This is just a variant of umul_ppmm.
  62
  63    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  64    denominator) divides a UDWtype, composed by the UWtype integers
  65    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  66    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
  67    than DENOMINATOR for correct operation.  If, in addition, the most
  68    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  69    UDIV_NEEDS_NORMALIZATION is defined to 1.
  70
  71    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  72    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
  73    is rounded towards 0.
  74
  75    5) count_leading_zeros(count, x) counts the number of zero-bits from the
  76    msb to the first non-zero bit in the UWtype X.  This is the number of
  77    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
  78    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  79
  80    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  81    from the least significant end.
  82
  83    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  84    high_addend_2, low_addend_2) adds two UWtype integers, composed by
  85    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  86    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  87    (i.e. carry out) is not stored anywhere, and is lost.
  88
  89    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  90    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  91    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  92    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
  93    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  94    and is lost.
  95
  96    If any of these macros are left undefined for a particular CPU,
  97    C macros are used.  */
  98
  99 /* The CPUs come in alphabetical order below.
 100
 101    Please add support for more CPUs here, or improve the current support
 102    for the CPUs below!  */
 103
 104 #if defined (__GNUC__) && !defined (NO_ASM)
 105
 106 /* We sometimes need to clobber "cc" with gcc2, but that would not be
 107    understood by gcc1.  Use cpp to avoid major code duplication.  */
 108 #if __GNUC__ < 2
 109 #define __CLOBBER_CC
 110 #define __AND_CLOBBER_CC
 111 #else /* __GNUC__ >= 2 */
 112 #define __CLOBBER_CC : "cc"
 113 #define __AND_CLOBBER_CC , "cc"
 114 #endif /* __GNUC__ < 2 */
 115
 116 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
 117 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 118   __asm__ ("add %1,%4,%5
 119         addc %0,%2,%3"                                                  \
 120            : "=r" ((USItype)(sh)),                                      \
 121             "=&r" ((USItype)(sl))                                       \
 122            : "%r" ((USItype)(ah)),                                      \
 123              "rI" ((USItype)(bh)),                                      \
 124              "%r" ((USItype)(al)),                                      \
 125              "rI" ((USItype)(bl)))
 126 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 127   __asm__ ("sub %1,%4,%5
 128         subc %0,%2,%3"                                                  \
 129            : "=r" ((USItype)(sh)),                                      \
 130              "=&r" ((USItype)(sl))                                      \
 131            : "r" ((USItype)(ah)),                                       \
 132              "rI" ((USItype)(bh)),                                      \
 133              "r" ((USItype)(al)),                                       \
 134              "rI" ((USItype)(bl)))
 135 #define umul_ppmm(xh, xl, m0, m1) \
 136   do {                                                                  \
 137     USItype __m0 = (m0), __m1 = (m1);                                   \
 138     __asm__ ("multiplu %0,%1,%2"                                        \
 139              : "=r" ((USItype)(xl))                                     \
 140              : "r" (__m0),                                              \
 141                "r" (__m1));                                             \
 142     __asm__ ("multmu %0,%1,%2"                                          \
 143              : "=r" ((USItype)(xh))                                     \
 144              : "r" (__m0),                                              \
 145                "r" (__m1));                                             \
 146   } while (0)
 147 #define udiv_qrnnd(q, r, n1, n0, d) \
 148   __asm__ ("dividu %0,%3,%4"                                            \
 149            : "=r" ((USItype)(q)),                                       \
 150              "=q" ((USItype)(r))                                        \
 151            : "1" ((USItype)(n1)),                                       \
 152              "r" ((USItype)(n0)),                                       \
 153              "r" ((USItype)(d)))
 154 #define count_leading_zeros(count, x) \
 155     __asm__ ("clz %0,%1"                                                \
 156              : "=r" ((USItype)(count))                                  \
 157              : "r" ((USItype)(x)))
 158 #define COUNT_LEADING_ZEROS_0 32
 159 #endif /* __a29k__ */
 160
 161 #if defined (__alpha) && W_TYPE_SIZE == 64
 162 #define umul_ppmm(ph, pl, m0, m1) \
 163   do {                                                                  \
 164     UDItype __m0 = (m0), __m1 = (m1);                                   \
 165     __asm__ ("umulh %r1,%2,%0"                                          \
 166              : "=r" ((UDItype) ph)                                      \
 167              : "%rJ" (__m0),                                            \
 168                "rI" (__m1));                                            \
 169     (pl) = __m0 * __m1;                                                 \
 170   } while (0)
 171 #define UMUL_TIME 46
 172 #ifndef LONGLONG_STANDALONE
 173 #define udiv_qrnnd(q, r, n1, n0, d) \
 174   do { UDItype __r;                                                     \
 175     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 176     (r) = __r;                                                          \
 177   } while (0)
 178 extern UDItype __udiv_qrnnd __P ((UDItype *, UDItype, UDItype, UDItype));
 179 #define UDIV_TIME 220
 180 #endif /* LONGLONG_STANDALONE */
 181 #endif /* __alpha */
 182
 183 #if defined (__arm__) && W_TYPE_SIZE == 32
 184 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 185   __asm__ ("adds        %1, %4, %5
 186         adc     %0, %2, %3"                                             \
 187            : "=r" ((USItype)(sh)),                                      \
 188              "=&r" ((USItype)(sl))                                      \
 189            : "%r" ((USItype)(ah)),                                      \
 190              "rI" ((USItype)(bh)),                                      \
 191              "%r" ((USItype)(al)),                                      \
 192              "rI" ((USItype)(bl)))
 193 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 194   __asm__ ("subs        %1, %4, %5
 195         sbc     %0, %2, %3"                                             \
 196            : "=r" ((USItype)(sh)),                                      \
 197              "=&r" ((USItype)(sl))                                      \
 198            : "r" ((USItype)(ah)),                                       \
 199              "rI" ((USItype)(bh)),                                      \
 200              "r" ((USItype)(al)),                                       \
 201              "rI" ((USItype)(bl)))
 202 #if 0
 203 #define umul_ppmm(xh, xl, a, b) \
 204   __asm__ ("%@ Inlined umul_ppmm
 205         mov     %|r0, %2, lsr #16
 206         mov     %|r2, %3, lsr #16
 207         bic     %|r1, %2, %|r0, lsl #16
 208         bic     %|r2, %3, %|r2, lsl #16
 209         mul     %1, %|r1, %|r2
 210         mul     %|r2, %|r0, %|r2
 211         mul     %|r1, %0, %|r1
 212         mul     %0, %|r0, %0
 213         adds    %|r1, %|r2, %|r1
 214         addcs   %0, %0, #65536
 215         adds    %1, %1, %|r1, lsl #16
 216         adc     %0, %0, %|r1, lsr #16"                                  \
 217            : "=&r" ((USItype)(xh)),                                     \
 218              "=r" ((USItype)(xl))                                       \
 219            : "r" ((USItype)(a)),                                        \
 220              "r" ((USItype)(b))                                         \
 221            : "r0", "r1", "r2")
 222 #define UMUL_TIME 20
 223 #define UDIV_TIME 100
 224 #endif
 225 #endif /* __arm__ */
 226
 227 #if defined (__clipper__) && W_TYPE_SIZE == 32
 228 #define umul_ppmm(w1, w0, u, v) \
 229   ({union {UDItype __ll;                                                \
 230            struct {USItype __l, __h;} __i;                              \
 231           } __xx;                                                       \
 232   __asm__ ("mulwux %2,%0"                                               \
 233            : "=r" (__xx.__ll)                                           \
 234            : "%0" ((USItype)(u)),                                       \
 235              "r" ((USItype)(v)));                                       \
 236   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 237 #define smul_ppmm(w1, w0, u, v) \
 238   ({union {DItype __ll;                                                 \
 239            struct {SItype __l, __h;} __i;                               \
 240           } __xx;                                                       \
 241   __asm__ ("mulwx %2,%0"                                                \
 242            : "=r" (__xx.__ll)                                           \
 243            : "%0" ((SItype)(u)),                                        \
 244              "r" ((SItype)(v)));                                        \
 245   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 246 #define __umulsidi3(u, v) \
 247   ({UDItype __w;                                                        \
 248     __asm__ ("mulwux %2,%0"                                             \
 249              : "=r" (__w)                                               \
 250              : "%0" ((USItype)(u)),                                     \
 251                "r" ((USItype)(v)));                                     \
 252     __w; })
 253 #endif /* __clipper__ */
 254
 255 #if defined (__gmicro__) && W_TYPE_SIZE == 32
 256 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 257   __asm__ ("add.w %5,%1
 258         addx %3,%0"                                                     \
 259            : "=g" ((USItype)(sh)),                                      \
 260              "=&g" ((USItype)(sl))                                      \
 261            : "%0" ((USItype)(ah)),                                      \
 262              "g" ((USItype)(bh)),                                       \
 263              "%1" ((USItype)(al)),                                      \
 264              "g" ((USItype)(bl)))
 265 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 266   __asm__ ("sub.w %5,%1
 267         subx %3,%0"                                                     \
 268            : "=g" ((USItype)(sh)),                                      \
 269              "=&g" ((USItype)(sl))                                      \
 270            : "0" ((USItype)(ah)),                                       \
 271              "g" ((USItype)(bh)),                                       \
 272              "1" ((USItype)(al)),                                       \
 273              "g" ((USItype)(bl)))
 274 #define umul_ppmm(ph, pl, m0, m1) \
 275   __asm__ ("mulx %3,%0,%1"                                              \
 276            : "=g" ((USItype)(ph)),                                      \
 277              "=r" ((USItype)(pl))                                       \
 278            : "%0" ((USItype)(m0)),                                      \
 279              "g" ((USItype)(m1)))
 280 #define udiv_qrnnd(q, r, nh, nl, d) \
 281   __asm__ ("divx %4,%0,%1"                                              \
 282            : "=g" ((USItype)(q)),                                       \
 283              "=r" ((USItype)(r))                                        \
 284            : "1" ((USItype)(nh)),                                       \
 285              "0" ((USItype)(nl)),                                       \
 286              "g" ((USItype)(d)))
 287 #define count_leading_zeros(count, x) \
 288   __asm__ ("bsch/1 %1,%0"                                               \
 289            : "=g" (count)                                               \
 290            : "g" ((USItype)(x)),                                        \
 291              "0" ((USItype)0))
 292 #endif
 293
 294 #if defined (__hppa) && W_TYPE_SIZE == 32
 295 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 296   __asm__ ("add %4,%5,%1
 297         addc %2,%3,%0"                                                  \
 298            : "=r" ((USItype)(sh)),                                      \
 299              "=&r" ((USItype)(sl))                                      \
 300            : "%rM" ((USItype)(ah)),                                     \
 301              "rM" ((USItype)(bh)),                                      \
 302              "%rM" ((USItype)(al)),                                     \
 303              "rM" ((USItype)(bl)))
 304 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 305   __asm__ ("sub %4,%5,%1
 306         subb %2,%3,%0"                                                  \
 307            : "=r" ((USItype)(sh)),                                      \
 308              "=&r" ((USItype)(sl))                                      \
 309            : "rM" ((USItype)(ah)),                                      \
 310              "rM" ((USItype)(bh)),                                      \
 311              "rM" ((USItype)(al)),                                      \
 312              "rM" ((USItype)(bl)))
 313 #if defined (_PA_RISC1_1)
 314 #define umul_ppmm(wh, wl, u, v) \
 315   do {                                                                  \
 316     union {UDItype __ll;                                                \
 317            struct {USItype __h, __l;} __i;                              \
 318           } __xx;                                                       \
 319     __asm__ ("xmpyu %1,%2,%0"                                           \
 320              : "=*f" (__xx.__ll)                                        \
 321              : "*f" ((USItype)(u)),                                     \
 322                "*f" ((USItype)(v)));                                    \
 323     (wh) = __xx.__i.__h;                                                \
 324     (wl) = __xx.__i.__l;                                                \
 325   } while (0)
 326 #define UMUL_TIME 8
 327 #define UDIV_TIME 60
 328 #else
 329 #define UMUL_TIME 40
 330 #define UDIV_TIME 80
 331 #endif
 332 #ifndef LONGLONG_STANDALONE
 333 #define udiv_qrnnd(q, r, n1, n0, d) \
 334   do { USItype __r;                                                     \
 335     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 336     (r) = __r;                                                          \
 337   } while (0)
 338 extern USItype __udiv_qrnnd ();
 339 #endif /* LONGLONG_STANDALONE */
 340 #define count_leading_zeros(count, x) \
 341   do {                                                                  \
 342     USItype __tmp;                                                      \
 343     __asm__ (                                                           \
 344        "ldi             1,%0
 345         extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?
 346         extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.
 347         ldo             16(%0),%0               ; Yes.  Perform add.
 348         extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?
 349         extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.
 350         ldo             8(%0),%0                ; Yes.  Perform add.
 351         extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?
 352         extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.
 353         ldo             4(%0),%0                ; Yes.  Perform add.
 354         extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?
 355         extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.
 356         ldo             2(%0),%0                ; Yes.  Perform add.
 357         extru           %1,30,1,%1              ; Extract bit 1.
 358         sub             %0,%1,%0                ; Subtract it.
 359         " : "=r" (count), "=r" (__tmp) : "1" (x));                      \
 360   } while (0)
 361 #endif /* hppa */
 362
 363 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
 364 #define umul_ppmm(xh, xl, m0, m1) \
 365   do {                                                                  \
 366     union {UDItype __ll;                                                \
 367            struct {USItype __h, __l;} __i;                              \
 368           } __xx;                                                       \
 369     USItype __m0 = (m0), __m1 = (m1);                                   \
 370     __asm__ ("mr %0,%3"                                                 \
 371              : "=r" (__xx.__i.__h),                                     \
 372                "=r" (__xx.__i.__l)                                      \
 373              : "%1" (__m0),                                             \
 374                "r" (__m1));                                             \
 375     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 376     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 377              + (((SItype) __m1 >> 31) & __m0));                         \
 378   } while (0)
 379 #define smul_ppmm(xh, xl, m0, m1) \
 380   do {                                                                  \
 381     union {DItype __ll;                                                 \
 382            struct {USItype __h, __l;} __i;                              \
 383           } __xx;                                                       \
 384     __asm__ ("mr %0,%3"                                                 \
 385              : "=r" (__xx.__i.__h),                                     \
 386                "=r" (__xx.__i.__l)                                      \
 387              : "%1" (m0),                                               \
 388                "r" (m1));                                               \
 389     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 390   } while (0)
 391 #define sdiv_qrnnd(q, r, n1, n0, d) \
 392   do {                                                                  \
 393     union {DItype __ll;                                                 \
 394            struct {USItype __h, __l;} __i;                              \
 395           } __xx;                                                       \
 396     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
 397     __asm__ ("dr %0,%2"                                                 \
 398              : "=r" (__xx.__ll)                                         \
 399              : "0" (__xx.__ll), "r" (d));                               \
 400     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
 401   } while (0)
 402 #endif
 403
 404 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 405 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 406   __asm__ ("addl %5,%1
 407         adcl %3,%0"                                                     \
 408            : "=r" ((USItype)(sh)),                                      \
 409              "=&r" ((USItype)(sl))                                      \
 410            : "%0" ((USItype)(ah)),                                      \
 411              "g" ((USItype)(bh)),                                       \
 412              "%1" ((USItype)(al)),                                      \
 413              "g" ((USItype)(bl)))
 414 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 415   __asm__ ("subl %5,%1
 416         sbbl %3,%0"                                                     \
 417            : "=r" ((USItype)(sh)),                                      \
 418              "=&r" ((USItype)(sl))                                      \
 419            : "0" ((USItype)(ah)),                                       \
 420              "g" ((USItype)(bh)),                                       \
 421              "1" ((USItype)(al)),                                       \
 422              "g" ((USItype)(bl)))
 423 #define umul_ppmm(w1, w0, u, v) \
 424   __asm__ ("mull %3"                                                    \
 425            : "=a" ((USItype)(w0)),                                      \
 426              "=d" ((USItype)(w1))                                       \
 427            : "%0" ((USItype)(u)),                                       \
 428              "rm" ((USItype)(v)))
 429 #define udiv_qrnnd(q, r, n1, n0, d) \
 430   __asm__ ("divl %4"                                                    \
 431            : "=a" ((USItype)(q)),                                       \
 432              "=d" ((USItype)(r))                                        \
 433            : "0" ((USItype)(n0)),                                       \
 434              "1" ((USItype)(n1)),                                       \
 435              "rm" ((USItype)(d)))
 436 #define count_leading_zeros(count, x) \
 437   do {                                                                  \
 438     USItype __cbtmp;                                                    \
 439     __asm__ ("bsrl %1,%0"                                               \
 440              : "=r" (__cbtmp) : "rm" ((USItype)(x)));                   \
 441     (count) = __cbtmp ^ 31;                                             \
 442   } while (0)
 443 #define count_trailing_zeros(count, x) \
 444   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
 445 #ifndef UMUL_TIME
 446 #define UMUL_TIME 40
 447 #endif
 448 #ifndef UDIV_TIME
 449 #define UDIV_TIME 40
 450 #endif
 451 #endif /* 80x86 */
 452
 453 #if defined (__i860__) && W_TYPE_SIZE == 32
 454 #define rshift_rhlc(r,h,l,c) \
 455   __asm__ ("shr %3,r0,r0\;shrd %1,%2,%0"                                \
 456            "=r" (r) : "r" (h), "r" (l), "rn" (c))
 457 #endif /* i860 */
 458
 459 #if defined (__i960__) && W_TYPE_SIZE == 32
 460 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 461   __asm__ ("cmpo 1,0\;addc %5,%4,%1\;addc %3,%2,%0"                     \
 462            : "=r" ((USItype)(sh)),                                      \
 463              "=&r" ((USItype)(sl))                                      \
 464            : "%dI" ((USItype)(ah)),                                     \
 465              "dI" ((USItype)(bh)),                                      \
 466              "%dI" ((USItype)(al)),                                     \
 467              "dI" ((USItype)(bl)))
 468 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 469   __asm__ ("cmpo 0,0\;subc %5,%4,%1\;subc %3,%2,%0"                     \
 470            : "=r" ((USItype)(sh)),                                      \
 471              "=&r" ((USItype)(sl))                                      \
 472            : "dI" ((USItype)(ah)),                                      \
 473              "dI" ((USItype)(bh)),                                      \
 474              "dI" ((USItype)(al)),                                      \
 475              "dI" ((USItype)(bl)))
 476 #define umul_ppmm(w1, w0, u, v) \
 477   ({union {UDItype __ll;                                                \
 478            struct {USItype __l, __h;} __i;                              \
 479           } __xx;                                                       \
 480   __asm__ ("emul        %2,%1,%0"                                       \
 481            : "=d" (__xx.__ll)                                           \
 482            : "%dI" ((USItype)(u)),                                      \
 483              "dI" ((USItype)(v)));                                      \
 484   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 485 #define __umulsidi3(u, v) \
 486   ({UDItype __w;                                                        \
 487     __asm__ ("emul      %2,%1,%0"                                       \
 488              : "=d" (__w)                                               \
 489              : "%dI" ((USItype)(u)),                                    \
 490                "dI" ((USItype)(v)));                                    \
 491     __w; })
 492 #define udiv_qrnnd(q, r, nh, nl, d) \
 493   do {                                                                  \
 494     union {UDItype __ll;                                                \
 495            struct {USItype __l, __h;} __i;                              \
 496           } __nn;                                                       \
 497     __nn.__i.__h = (nh); __nn.__i.__l = (nl);                           \
 498     __asm__ ("ediv %d,%n,%0"                                            \
 499            : "=d" (__rq.__ll)                                           \
 500            : "dI" (__nn.__ll),                                          \
 501              "dI" ((USItype)(d)));                                      \
 502     (r) = __rq.__i.__l; (q) = __rq.__i.__h;                             \
 503   } while (0)
 504 #define count_leading_zeros(count, x) \
 505   do {                                                                  \
 506     USItype __cbtmp;                                                    \
 507     __asm__ ("scanbit %1,%0"                                            \
 508              : "=r" (__cbtmp)                                           \
 509              : "r" ((USItype)(x)));                                     \
 510     (count) = __cbtmp ^ 31;                                             \
 511   } while (0)
 512 #define COUNT_LEADING_ZEROS_0 (-32) /* sic */
 513 #if defined (__i960mx)          /* what is the proper symbol to test??? */
 514 #define rshift_rhlc(r,h,l,c) \
 515   do {                                                                  \
 516     union {UDItype __ll;                                                \
 517            struct {USItype __l, __h;} __i;                              \
 518           } __nn;                                                       \
 519     __nn.__i.__h = (h); __nn.__i.__l = (l);                             \
 520     __asm__ ("shre %2,%1,%0"                                            \
 521              : "=d" (r) : "dI" (__nn.__ll), "dI" (c));                  \
 522   }
 523 #endif /* i960mx */
 524 #endif /* i960 */
 525
 526 #if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
 527 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 528   __asm__ ("add%.l %5,%1
 529         addx%.l %3,%0"                                                  \
 530            : "=d" ((USItype)(sh)),                                      \
 531              "=&d" ((USItype)(sl))                                      \
 532            : "%0" ((USItype)(ah)),                                      \
 533              "d" ((USItype)(bh)),                                       \
 534              "%1" ((USItype)(al)),                                      \
 535              "g" ((USItype)(bl)))
 536 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 537   __asm__ ("sub%.l %5,%1
 538         subx%.l %3,%0"                                                  \
 539            : "=d" ((USItype)(sh)),                                      \
 540              "=&d" ((USItype)(sl))                                      \
 541            : "0" ((USItype)(ah)),                                       \
 542              "d" ((USItype)(bh)),                                       \
 543              "1" ((USItype)(al)),                                       \
 544              "g" ((USItype)(bl)))
 545 #if (defined (__mc68020__) || defined (__NeXT__) || defined(mc68020))
 546 #define umul_ppmm(w1, w0, u, v) \
 547   __asm__ ("mulu%.l %3,%1:%0"                                           \
 548            : "=d" ((USItype)(w0)),                                      \
 549              "=d" ((USItype)(w1))                                       \
 550            : "%0" ((USItype)(u)),                                       \
 551              "dmi" ((USItype)(v)))
 552 #define UMUL_TIME 45
 553 #define udiv_qrnnd(q, r, n1, n0, d) \
 554   __asm__ ("divu%.l %4,%1:%0"                                           \
 555            : "=d" ((USItype)(q)),                                       \
 556              "=d" ((USItype)(r))                                        \
 557            : "0" ((USItype)(n0)),                                       \
 558              "1" ((USItype)(n1)),                                       \
 559              "dmi" ((USItype)(d)))
 560 #define UDIV_TIME 90
 561 #define sdiv_qrnnd(q, r, n1, n0, d) \
 562   __asm__ ("divs%.l %4,%1:%0"                                           \
 563            : "=d" ((USItype)(q)),                                       \
 564              "=d" ((USItype)(r))                                        \
 565            : "0" ((USItype)(n0)),                                       \
 566              "1" ((USItype)(n1)),                                       \
 567              "dmi" ((USItype)(d)))
 568 #define count_leading_zeros(count, x) \
 569   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
 570            : "=d" ((USItype)(count))                                    \
 571            : "od" ((USItype)(x)), "n" (0))
 572 #define COUNT_LEADING_ZEROS_0 32
 573 #else /* not mc68020 */
 574 #define umul_ppmm(xh, xl, a, b) \
 575   do { USItype __umul_tmp1, __umul_tmp2;                                \
 576         __asm__ ("| Inlined umul_ppmm
 577         move%.l %5,%3
 578         move%.l %2,%0
 579         move%.w %3,%1
 580         swap    %3
 581         swap    %0
 582         mulu    %2,%1
 583         mulu    %3,%0
 584         mulu    %2,%3
 585         swap    %2
 586         mulu    %5,%2
 587         add%.l  %3,%2
 588         jcc     1f
 589         add%.l  %#0x10000,%0
 590 1:      move%.l %2,%3
 591         clr%.w  %2
 592         swap    %2
 593         swap    %3
 594         clr%.w  %3
 595         add%.l  %3,%1
 596         addx%.l %2,%0
 597         | End inlined umul_ppmm"                                        \
 598               : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)),           \
 599                 "=d" (__umul_tmp1), "=&d" (__umul_tmp2)                 \
 600               : "%2" ((USItype)(a)), "d" ((USItype)(b)));               \
 601   } while (0)
 602 #define UMUL_TIME 100
 603 #define UDIV_TIME 400
 604 #endif /* not mc68020 */
 605 #endif /* mc68000 */
 606
 607 #if defined (__m88000__) && W_TYPE_SIZE == 32
 608 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 609   __asm__ ("addu.co %1,%r4,%r5
 610         addu.ci %0,%r2,%r3"                                             \
 611            : "=r" ((USItype)(sh)),                                      \
 612              "=&r" ((USItype)(sl))                                      \
 613            : "%rJ" ((USItype)(ah)),                                     \
 614              "rJ" ((USItype)(bh)),                                      \
 615              "%rJ" ((USItype)(al)),                                     \
 616              "rJ" ((USItype)(bl)))
 617 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 618   __asm__ ("subu.co %1,%r4,%r5
 619         subu.ci %0,%r2,%r3"                                             \
 620            : "=r" ((USItype)(sh)),                                      \
 621              "=&r" ((USItype)(sl))                                      \
 622            : "rJ" ((USItype)(ah)),                                      \
 623              "rJ" ((USItype)(bh)),                                      \
 624              "rJ" ((USItype)(al)),                                      \
 625              "rJ" ((USItype)(bl)))
 626 #define count_leading_zeros(count, x) \
 627   do {                                                                  \
 628     USItype __cbtmp;                                                    \
 629     __asm__ ("ff1 %0,%1"                                                \
 630              : "=r" (__cbtmp)                                           \
 631              : "r" ((USItype)(x)));                                     \
 632     (count) = __cbtmp ^ 31;                                             \
 633   } while (0)
 634 #define COUNT_LEADING_ZEROS_0 63 /* sic */
 635 #if defined (__m88110__)
 636 #define umul_ppmm(wh, wl, u, v) \
 637   do {                                                                  \
 638     union {UDItype __ll;                                                \
 639            struct {USItype __h, __l;} __i;                              \
 640           } __xx;                                                       \
 641     __asm__ ("mulu.d    %0,%1,%2"                                       \
 642              : "=r" (__xx.__ll)                                         \
 643              : "r" ((USItype)(u)),                                      \
 644                "r" ((USItype)(v)));                                     \
 645     (wh) = __xx.__i.__h;                                                \
 646     (wl) = __xx.__i.__l;                                                \
 647   } while (0)
 648 #define udiv_qrnnd(q, r, n1, n0, d) \
 649   ({union {UDItype __ll;                                                \
 650            struct {USItype __h, __l;} __i;                              \
 651           } __xx;                                                       \
 652   USItype __q;                                                          \
 653   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 654   __asm__ ("divu.d %0,%1,%2"                                            \
 655            : "=r" (__q)                                                 \
 656            : "r" (__xx.__ll),                                           \
 657              "r" ((USItype)(d)));                                       \
 658   (r) = (n0) - __q * (d); (q) = __q; })
 659 #define UMUL_TIME 5
 660 #define UDIV_TIME 25
 661 #else
 662 #define UMUL_TIME 17
 663 #define UDIV_TIME 150
 664 #endif /* __m88110__ */
 665 #endif /* __m88000__ */
 666
 667 #if defined (__mips__) && W_TYPE_SIZE == 32
 668 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
 669 #define umul_ppmm(w1, w0, u, v) \
 670   __asm__ ("multu %2,%3"                                                \
 671            : "=l" ((USItype)(w0)),                                      \
 672              "=h" ((USItype)(w1))                                       \
 673            : "d" ((USItype)(u)),                                        \
 674              "d" ((USItype)(v)))
 675 #else
 676 #define umul_ppmm(w1, w0, u, v) \
 677   __asm__ ("multu %2,%3
 678         mflo %0
 679         mfhi %1"                                                        \
 680            : "=d" ((USItype)(w0)),                                      \
 681              "=d" ((USItype)(w1))                                       \
 682            : "d" ((USItype)(u)),                                        \
 683              "d" ((USItype)(v)))
 684 #endif
 685 #define UMUL_TIME 10
 686 #define UDIV_TIME 100
 687 #endif /* __mips__ */
 688
 689 #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64
 690 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
 691 #define umul_ppmm(w1, w0, u, v) \
 692   __asm__ ("dmultu %2,%3"                                               \
 693            : "=l" ((UDItype)(w0)),                                      \
 694              "=h" ((UDItype)(w1))                                       \
 695            : "d" ((UDItype)(u)),                                        \
 696              "d" ((UDItype)(v)))
 697 #else
 698 #define umul_ppmm(w1, w0, u, v) \
 699   __asm__ ("dmultu %2,%3
 700         mflo %0
 701         mfhi %1"                                                        \
 702            : "=d" ((UDItype)(w0)),                                      \
 703              "=d" ((UDItype)(w1))                                       \
 704            : "d" ((UDItype)(u)),                                        \
 705              "d" ((UDItype)(v)))
 706 #endif
 707 #define UMUL_TIME 20
 708 #define UDIV_TIME 140
 709 #endif /* __mips__ */
 710
 711 #if defined (__ns32000__) && W_TYPE_SIZE == 32
 712 #define umul_ppmm(w1, w0, u, v) \
 713   ({union {UDItype __ll;                                                \
 714            struct {USItype __l, __h;} __i;                              \
 715           } __xx;                                                       \
 716   __asm__ ("meid %2,%0"                                                 \
 717            : "=g" (__xx.__ll)                                           \
 718            : "%0" ((USItype)(u)),                                       \
 719              "g" ((USItype)(v)));                                       \
 720   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 721 #define __umulsidi3(u, v) \
 722   ({UDItype __w;                                                        \
 723     __asm__ ("meid %2,%0"                                               \
 724              : "=g" (__w)                                               \
 725              : "%0" ((USItype)(u)),                                     \
 726                "g" ((USItype)(v)));                                     \
 727     __w; })
 728 #define udiv_qrnnd(q, r, n1, n0, d) \
 729   ({union {UDItype __ll;                                                \
 730            struct {USItype __l, __h;} __i;                              \
 731           } __xx;                                                       \
 732   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 733   __asm__ ("deid %2,%0"                                                 \
 734            : "=g" (__xx.__ll)                                           \
 735            : "0" (__xx.__ll),                                           \
 736              "g" ((USItype)(d)));                                       \
 737   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
 738 #define count_trailing_zeros(count,x) \
 739   do {
 740     __asm__ ("ffsd      %2,%0"                                          \
 741              : "=r" ((USItype) (count))                                 \
 742              : "0" ((USItype) 0),                                       \
 743                "r" ((USItype) (x)));                                    \
 744   } while (0)
 745 #endif /* __ns32000__ */
 746
 747 #if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
 748 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 749   do {                                                                  \
 750     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 751       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 752              : "=r" ((USItype)(sh)),                                    \
 753                "=&r" ((USItype)(sl))                                    \
 754              : "%r" ((USItype)(ah)),                                    \
 755                "%r" ((USItype)(al)),                                    \
 756                "rI" ((USItype)(bl)));                                   \
 757     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 758       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 759              : "=r" ((USItype)(sh)),                                    \
 760                "=&r" ((USItype)(sl))                                    \
 761              : "%r" ((USItype)(ah)),                                    \
 762                "%r" ((USItype)(al)),                                    \
 763                "rI" ((USItype)(bl)));                                   \
 764     else                                                                \
 765       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 766              : "=r" ((USItype)(sh)),                                    \
 767                "=&r" ((USItype)(sl))                                    \
 768              : "%r" ((USItype)(ah)),                                    \
 769                "r" ((USItype)(bh)),                                     \
 770                "%r" ((USItype)(al)),                                    \
 771                "rI" ((USItype)(bl)));                                   \
 772   } while (0)
 773 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 774   do {                                                                  \
 775     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 776       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 777                : "=r" ((USItype)(sh)),                                  \
 778                  "=&r" ((USItype)(sl))                                  \
 779                : "r" ((USItype)(bh)),                                   \
 780                  "rI" ((USItype)(al)),                                  \
 781                  "r" ((USItype)(bl)));                                  \
 782     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
 783       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 784                : "=r" ((USItype)(sh)),                                  \
 785                  "=&r" ((USItype)(sl))                                  \
 786                : "r" ((USItype)(bh)),                                   \
 787                  "rI" ((USItype)(al)),                                  \
 788                  "r" ((USItype)(bl)));                                  \
 789     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 790       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 791                : "=r" ((USItype)(sh)),                                  \
 792                  "=&r" ((USItype)(sl))                                  \
 793                : "r" ((USItype)(ah)),                                   \
 794                  "rI" ((USItype)(al)),                                  \
 795                  "r" ((USItype)(bl)));                                  \
 796     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 797       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 798                : "=r" ((USItype)(sh)),                                  \
 799                  "=&r" ((USItype)(sl))                                  \
 800                : "r" ((USItype)(ah)),                                   \
 801                  "rI" ((USItype)(al)),                                  \
 802                  "r" ((USItype)(bl)));                                  \
 803     else                                                                \
 804       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 805                : "=r" ((USItype)(sh)),                                  \
 806                  "=&r" ((USItype)(sl))                                  \
 807                : "r" ((USItype)(ah)),                                   \
 808                  "r" ((USItype)(bh)),                                   \
 809                  "rI" ((USItype)(al)),                                  \
 810                  "r" ((USItype)(bl)));                                  \
 811   } while (0)
 812 #define count_leading_zeros(count, x) \
 813   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
 814            : "=r" ((USItype)(count))                                    \
 815            : "r" ((USItype)(x)))
 816 #define COUNT_LEADING_ZEROS_0 32
 817 #if defined (_ARCH_PPC)
 818 #define umul_ppmm(ph, pl, m0, m1) \
 819   do {                                                                  \
 820     USItype __m0 = (m0), __m1 = (m1);                                   \
 821     __asm__ ("mulhwu %0,%1,%2"                                          \
 822              : "=r" ((USItype) ph)                                      \
 823              : "%r" (__m0),                                             \
 824                "r" (__m1));                                             \
 825     (pl) = __m0 * __m1;                                                 \
 826   } while (0)
 827 #define UMUL_TIME 15
 828 #define smul_ppmm(ph, pl, m0, m1) \
 829   do {                                                                  \
 830     SItype __m0 = (m0), __m1 = (m1);                                    \
 831     __asm__ ("mulhw %0,%1,%2"                                           \
 832              : "=r" ((SItype) ph)                                       \
 833              : "%r" (__m0),                                             \
 834                "r" (__m1));                                             \
 835     (pl) = __m0 * __m1;                                                 \
 836   } while (0)
 837 #define SMUL_TIME 14
 838 #define UDIV_TIME 120
 839 #else
 840 #define umul_ppmm(xh, xl, m0, m1) \
 841   do {                                                                  \
 842     USItype __m0 = (m0), __m1 = (m1);                                   \
 843     __asm__ ("mul %0,%2,%3"                                             \
 844              : "=r" ((USItype)(xh)),                                    \
 845                "=q" ((USItype)(xl))                                     \
 846              : "r" (__m0),                                              \
 847                "r" (__m1));                                             \
 848     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 849              + (((SItype) __m1 >> 31) & __m0));                         \
 850   } while (0)
 851 #define UMUL_TIME 8
 852 #define smul_ppmm(xh, xl, m0, m1) \
 853   __asm__ ("mul %0,%2,%3"                                               \
 854            : "=r" ((SItype)(xh)),                                       \
 855              "=q" ((SItype)(xl))                                        \
 856            : "r" (m0),                                                  \
 857              "r" (m1))
 858 #define SMUL_TIME 4
 859 #define sdiv_qrnnd(q, r, nh, nl, d) \
 860   __asm__ ("div %0,%2,%4"                                               \
 861            : "=r" ((SItype)(q)), "=q" ((SItype)(r))                     \
 862            : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
 863 #define UDIV_TIME 100
 864 #endif
 865 #endif /* Power architecture variants.  */
 866
 867 #if defined (__pyr__) && W_TYPE_SIZE == 32
 868 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 869   __asm__ ("addw        %5,%1
 870         addwc   %3,%0"                                                  \
 871            : "=r" ((USItype)(sh)),                                      \
 872              "=&r" ((USItype)(sl))                                      \
 873            : "%0" ((USItype)(ah)),                                      \
 874              "g" ((USItype)(bh)),                                       \
 875              "%1" ((USItype)(al)),                                      \
 876              "g" ((USItype)(bl)))
 877 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 878   __asm__ ("subw        %5,%1
 879         subwb   %3,%0"                                                  \
 880            : "=r" ((USItype)(sh)),                                      \
 881              "=&r" ((USItype)(sl))                                      \
 882            : "0" ((USItype)(ah)),                                       \
 883              "g" ((USItype)(bh)),                                       \
 884              "1" ((USItype)(al)),                                       \
 885              "g" ((USItype)(bl)))
 886 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
 887 #define umul_ppmm(w1, w0, u, v) \
 888   ({union {UDItype __ll;                                                \
 889            struct {USItype __h, __l;} __i;                              \
 890           } __xx;                                                       \
 891   __asm__ ("movw %1,%R0
 892         uemul %2,%0"                                                    \
 893            : "=&r" (__xx.__ll)                                          \
 894            : "g" ((USItype) (u)),                                       \
 895              "g" ((USItype)(v)));                                       \
 896   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 897 #endif /* __pyr__ */
 898
 899 #if defined (__ibm032__) /* RT/ROMP */  && W_TYPE_SIZE == 32
 900 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 901   __asm__ ("a %1,%5
 902         ae %0,%3"                                                       \
 903            : "=r" ((USItype)(sh)),                                      \
 904              "=&r" ((USItype)(sl))                                      \
 905            : "%0" ((USItype)(ah)),                                      \
 906              "r" ((USItype)(bh)),                                       \
 907              "%1" ((USItype)(al)),                                      \
 908              "r" ((USItype)(bl)))
 909 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 910   __asm__ ("s %1,%5
 911         se %0,%3"                                                       \
 912            : "=r" ((USItype)(sh)),                                      \
 913              "=&r" ((USItype)(sl))                                      \
 914            : "0" ((USItype)(ah)),                                       \
 915              "r" ((USItype)(bh)),                                       \
 916              "1" ((USItype)(al)),                                       \
 917              "r" ((USItype)(bl)))
 918 #define umul_ppmm(ph, pl, m0, m1) \
 919   do {                                                                  \
 920     USItype __m0 = (m0), __m1 = (m1);                                   \
 921     __asm__ (                                                           \
 922        "s       r2,r2
 923         mts     r10,%2
 924         m       r2,%3
 925         m       r2,%3
 926         m       r2,%3
 927         m       r2,%3
 928         m       r2,%3
 929         m       r2,%3
 930         m       r2,%3
 931         m       r2,%3
 932         m       r2,%3
 933         m       r2,%3
 934         m       r2,%3
 935         m       r2,%3
 936         m       r2,%3
 937         m       r2,%3
 938         m       r2,%3
 939         m       r2,%3
 940         cas     %0,r2,r0
 941         mfs     r10,%1"                                                 \
 942              : "=r" ((USItype)(ph)),                                    \
 943                "=r" ((USItype)(pl))                                     \
 944              : "%r" (__m0),                                             \
 945                 "r" (__m1)                                              \
 946              : "r2");                                                   \
 947     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
 948              + (((SItype) __m1 >> 31) & __m0));                         \
 949   } while (0)
 950 #define UMUL_TIME 20
 951 #define UDIV_TIME 200
 952 #define count_leading_zeros(count, x) \
 953   do {                                                                  \
 954     if ((x) >= 0x10000)                                                 \
 955       __asm__ ("clz     %0,%1"                                          \
 956                : "=r" ((USItype)(count))                                \
 957                : "r" ((USItype)(x) >> 16));                             \
 958     else                                                                \
 959       {                                                                 \
 960         __asm__ ("clz   %0,%1"                                          \
 961                  : "=r" ((USItype)(count))                              \
 962                  : "r" ((USItype)(x)));                                 \
 963         (count) += 16;                                                  \
 964       }                                                                 \
 965   } while (0)
 966 #endif /* RT/ROMP */
 967
 968 #if defined (__sh2__) && W_TYPE_SIZE == 32
 969 #define umul_ppmm(w1, w0, u, v) \
 970   __asm__ (                                                             \
 971        "dmulu.l %2,%3
 972         sts     macl,%1
 973         sts     mach,%0"                                                \
 974            : "=r" ((USItype)(w1)),                                      \
 975              "=r" ((USItype)(w0))                                       \
 976            : "r" ((USItype)(u)),                                        \
 977              "r" ((USItype)(v))                                         \
 978            : "macl", "mach")
 979 #define UMUL_TIME 5
 980 #endif
 981
 982 #if defined (__sparc__) && W_TYPE_SIZE == 32
 983 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 984   __asm__ ("addcc %r4,%5,%1
 985         addx %r2,%3,%0"                                                 \
 986            : "=r" ((USItype)(sh)),                                      \
 987              "=&r" ((USItype)(sl))                                      \
 988            : "%rJ" ((USItype)(ah)),                                     \
 989              "rI" ((USItype)(bh)),                                      \
 990              "%rJ" ((USItype)(al)),                                     \
 991              "rI" ((USItype)(bl))                                       \
 992            __CLOBBER_CC)
 993 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 994   __asm__ ("subcc %r4,%5,%1
 995         subx %r2,%3,%0"                                                 \
 996            : "=r" ((USItype)(sh)),                                      \
 997              "=&r" ((USItype)(sl))                                      \
 998            : "rJ" ((USItype)(ah)),                                      \
 999              "rI" ((USItype)(bh)),                                      \
1000              "rJ" ((USItype)(al)),                                      \
1001              "rI" ((USItype)(bl))                                       \
1002            __CLOBBER_CC)
1003 #if defined (__sparc_v8__)
1004 /* Don't match immediate range because, 1) it is not often useful,
1005    2) the 'I' flag thinks of the range as a 13 bit signed interval,
1006    while we want to match a 13 bit interval, sign extended to 32 bits,
1007    but INTERPRETED AS UNSIGNED.  */
1008 #define umul_ppmm(w1, w0, u, v) \
1009   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1010            : "=r" ((USItype)(w1)),                                      \
1011              "=r" ((USItype)(w0))                                       \
1012            : "r" ((USItype)(u)),                                        \
1013              "r" ((USItype)(v)))
1014 #define UMUL_TIME 5
1015 #ifndef SUPERSPARC      /* SuperSPARC's udiv only handles 53 bit dividends */
1016 #define udiv_qrnnd(q, r, n1, n0, d) \
1017   do {                                                                  \
1018     USItype __q;                                                        \
1019     __asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0"                     \
1020              : "=r" ((USItype)(__q))                                    \
1021              : "r" ((USItype)(n1)),                                     \
1022                "r" ((USItype)(n0)),                                     \
1023                "r" ((USItype)(d)));                                     \
1024     (r) = (n0) - __q * (d);                                             \
1025     (q) = __q;                                                          \
1026   } while (0)
1027 #define UDIV_TIME 25
1028 #endif /* SUPERSPARC */
1029 #else /* ! __sparc_v8__ */
1030 #if defined (__sparclite__)
1031 /* This has hardware multiply but not divide.  It also has two additional
1032    instructions scan (ffs from high bit) and divscc.  */
1033 #define umul_ppmm(w1, w0, u, v) \
1034   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1035            : "=r" ((USItype)(w1)),                                      \
1036              "=r" ((USItype)(w0))                                       \
1037            : "r" ((USItype)(u)),                                        \
1038              "r" ((USItype)(v)))
1039 #define UMUL_TIME 5
1040 #define udiv_qrnnd(q, r, n1, n0, d) \
1041   __asm__ ("! Inlined udiv_qrnnd
1042         wr      %%g0,%2,%%y     ! Not a delayed write for sparclite
1043         tst     %%g0
1044         divscc  %3,%4,%%g1
1045         divscc  %%g1,%4,%%g1
1046         divscc  %%g1,%4,%%g1
1047         divscc  %%g1,%4,%%g1
1048         divscc  %%g1,%4,%%g1
1049         divscc  %%g1,%4,%%g1
1050         divscc  %%g1,%4,%%g1
1051         divscc  %%g1,%4,%%g1
1052         divscc  %%g1,%4,%%g1
1053         divscc  %%g1,%4,%%g1
1054         divscc  %%g1,%4,%%g1
1055         divscc  %%g1,%4,%%g1
1056         divscc  %%g1,%4,%%g1
1057         divscc  %%g1,%4,%%g1
1058         divscc  %%g1,%4,%%g1
1059         divscc  %%g1,%4,%%g1
1060         divscc  %%g1,%4,%%g1
1061         divscc  %%g1,%4,%%g1
1062         divscc  %%g1,%4,%%g1
1063         divscc  %%g1,%4,%%g1
1064         divscc  %%g1,%4,%%g1
1065         divscc  %%g1,%4,%%g1
1066         divscc  %%g1,%4,%%g1
1067         divscc  %%g1,%4,%%g1
1068         divscc  %%g1,%4,%%g1
1069         divscc  %%g1,%4,%%g1
1070         divscc  %%g1,%4,%%g1
1071         divscc  %%g1,%4,%%g1
1072         divscc  %%g1,%4,%%g1
1073         divscc  %%g1,%4,%%g1
1074         divscc  %%g1,%4,%%g1
1075         divscc  %%g1,%4,%0
1076         rd      %%y,%1
1077         bl,a 1f
1078         add     %1,%4,%1
1079 1:      ! End of inline udiv_qrnnd"                                     \
1080            : "=r" ((USItype)(q)),                                       \
1081              "=r" ((USItype)(r))                                        \
1082            : "r" ((USItype)(n1)),                                       \
1083              "r" ((USItype)(n0)),                                       \
1084              "rI" ((USItype)(d))                                        \
1085            : "%g1" __AND_CLOBBER_CC)
1086 #define UDIV_TIME 37
1087 #define count_leading_zeros(count, x) \
1088   __asm__ ("scan %1,0,%0"                                               \
1089            : "=r" ((USItype)(x))                                        \
1090            : "r" ((USItype)(count)))
1091 /* Early sparclites return 63 for an argument of 0, but they warn that future
1092    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1093    undefined.  */
1094 #endif /* __sparclite__ */
1095 #endif /* __sparc_v8__ */
1096 /* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd.  */
1097 #ifndef umul_ppmm
1098 #define umul_ppmm(w1, w0, u, v) \
1099   __asm__ ("! Inlined umul_ppmm
1100         wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr
1101         sra     %3,31,%%g2      ! Don't move this insn
1102         and     %2,%%g2,%%g2    ! Don't move this insn
1103         andcc   %%g0,0,%%g1     ! Don't move this insn
1104         mulscc  %%g1,%3,%%g1
1105         mulscc  %%g1,%3,%%g1
1106         mulscc  %%g1,%3,%%g1
1107         mulscc  %%g1,%3,%%g1
1108         mulscc  %%g1,%3,%%g1
1109         mulscc  %%g1,%3,%%g1
1110         mulscc  %%g1,%3,%%g1
1111         mulscc  %%g1,%3,%%g1
1112         mulscc  %%g1,%3,%%g1
1113         mulscc  %%g1,%3,%%g1
1114         mulscc  %%g1,%3,%%g1
1115         mulscc  %%g1,%3,%%g1
1116         mulscc  %%g1,%3,%%g1
1117         mulscc  %%g1,%3,%%g1
1118         mulscc  %%g1,%3,%%g1
1119         mulscc  %%g1,%3,%%g1
1120         mulscc  %%g1,%3,%%g1
1121         mulscc  %%g1,%3,%%g1
1122         mulscc  %%g1,%3,%%g1
1123         mulscc  %%g1,%3,%%g1
1124         mulscc  %%g1,%3,%%g1
1125         mulscc  %%g1,%3,%%g1
1126         mulscc  %%g1,%3,%%g1
1127         mulscc  %%g1,%3,%%g1
1128         mulscc  %%g1,%3,%%g1
1129         mulscc  %%g1,%3,%%g1
1130         mulscc  %%g1,%3,%%g1
1131         mulscc  %%g1,%3,%%g1
1132         mulscc  %%g1,%3,%%g1
1133         mulscc  %%g1,%3,%%g1
1134         mulscc  %%g1,%3,%%g1
1135         mulscc  %%g1,%3,%%g1
1136         mulscc  %%g1,0,%%g1
1137         add     %%g1,%%g2,%0
1138         rd      %%y,%1"                                                 \
1139            : "=r" ((USItype)(w1)),                                      \
1140              "=r" ((USItype)(w0))                                       \
1141            : "%rI" ((USItype)(u)),                                      \
1142              "r" ((USItype)(v))                                         \
1143            : "%g1", "%g2" __AND_CLOBBER_CC)
1144 #define UMUL_TIME 39            /* 39 instructions */
1145 #endif
1146 #ifndef udiv_qrnnd
1147 /* It's quite necessary to add this much assembler for the sparc.
1148    The default udiv_qrnnd (in C) is more than 10 times slower!  */
1149 #define udiv_qrnnd(q, r, n1, n0, d) \
1150   __asm__ ("! Inlined udiv_qrnnd
1151         mov     32,%%g1
1152         subcc   %1,%2,%%g0
1153 1:      bcs     5f
1154          addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb
1155         sub     %1,%2,%1        ! this kills msb of n
1156         addx    %1,%1,%1        ! so this can't give carry
1157         subcc   %%g1,1,%%g1
1158 2:      bne     1b
1159          subcc  %1,%2,%%g0
1160         bcs     3f
1161          addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb
1162         b       3f
1163          sub    %1,%2,%1        ! this kills msb of n
1164 4:      sub     %1,%2,%1
1165 5:      addxcc  %1,%1,%1
1166         bcc     2b
1167          subcc  %%g1,1,%%g1
1168 ! Got carry from n.  Subtract next step to cancel this carry.
1169         bne     4b
1170          addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb
1171         sub     %1,%2,%1
1172 3:      xnor    %0,0,%0
1173         ! End of inline udiv_qrnnd"                                     \
1174            : "=&r" ((USItype)(q)),                                      \
1175              "=&r" ((USItype)(r))                                       \
1176            : "r" ((USItype)(d)),                                        \
1177              "1" ((USItype)(n1)),                                       \
1178              "0" ((USItype)(n0)) : "%g1" __AND_CLOBBER_CC)
1179 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations. */
1180 #else
1181 extern USItype __udiv_qrnnd __P ((USItype *, USItype, USItype, USItype));
1182 #ifndef UDIV_TIME
1183 #define UDIV_TIME 140
1184 #endif /* UDIV_TIME */
1185 #endif /* udiv_qrnnd */
1186 #endif /* __sparc__ */
1187
1188 #if (defined (__sparc_v9__) || (defined (__sparc__) && defined (__arch64__)) \
1189     || defined (__sparcv9)) && W_TYPE_SIZE == 64
1190 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1191   __asm__ ("addcc %4,%5,%1
1192             add %2,%3,%0
1193             bcs,a,pn %%xcc, 1f
1194             add %0, 1, %0
1195             1:"                                                         \
1196            : "=r" ((UDItype)(sh)),                                      \
1197              "=&r" ((UDItype)(sl))                                      \
1198            : "r" ((UDItype)(ah)),                                       \
1199              "r" ((UDItype)(bh)),                                       \
1200              "r" ((UDItype)(al)),                                       \
1201              "r" ((UDItype)(bl))                                        \
1202            : "cc")
1203
1204 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1205   __asm__ ("subcc %4,%5,%1
1206             sub %2,%3,%0
1207             bcs,a,pn %%xcc, 1f
1208             sub %0, 1, %0
1209             1:"                                                         \
1210            : "=r" ((UDItype)(sh)),                                      \
1211              "=&r" ((UDItype)(sl))                                      \
1212            : "r" ((UDItype)(ah)),                                       \
1213              "r" ((UDItype)(bh)),                                       \
1214              "r" ((UDItype)(al)),                                       \
1215              "r" ((UDItype)(bl))                                        \
1216            : "cc")
1217
1218 #define umul_ppmm(wh, wl, u, v)                                         \
1219   do {                                                                  \
1220           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1221           __asm__ __volatile__ (                                        \
1222                    "srl %7,0,%3
1223                     mulx %3,%6,%1
1224                     srlx %6,32,%2
1225                     mulx %2,%3,%4
1226                     sllx %4,32,%5
1227                     srl %6,0,%3
1228                     sub %1,%5,%5
1229                     srlx %5,32,%5
1230                     addcc %4,%5,%4
1231                     srlx %7,32,%5
1232                     mulx %3,%5,%3
1233                     mulx %2,%5,%5
1234                     sethi %%hi(0x80000000),%2
1235                     addcc %4,%3,%4
1236                     srlx %4,32,%4
1237                     add %2,%2,%2
1238                     movcc %%xcc,%%g0,%2
1239                     addcc %5,%4,%5
1240                     sllx %3,32,%3
1241                     add %1,%3,%1
1242                     add %5,%2,%0"                                       \
1243            : "=r" ((UDItype)(wh)),                                      \
1244              "=&r" ((UDItype)(wl)),                                     \
1245              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1246            : "r" ((UDItype)(u)),                                        \
1247              "r" ((UDItype)(v))                                         \
1248            : "cc");                                                     \
1249   } while (0)
1250 #define UMUL_TIME 96
1251 #define UDIV_TIME 230
1252 #endif /* __sparc_v9__ */
1253
1254 #if defined (__vax__) && W_TYPE_SIZE == 32
1255 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1256   __asm__ ("addl2 %5,%1
1257         adwc %3,%0"                                                     \
1258            : "=g" ((USItype)(sh)),                                      \
1259              "=&g" ((USItype)(sl))                                      \
1260            : "%0" ((USItype)(ah)),                                      \
1261              "g" ((USItype)(bh)),                                       \
1262              "%1" ((USItype)(al)),                                      \
1263              "g" ((USItype)(bl)))
1264 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1265   __asm__ ("subl2 %5,%1
1266         sbwc %3,%0"                                                     \
1267            : "=g" ((USItype)(sh)),                                      \
1268              "=&g" ((USItype)(sl))                                      \
1269            : "0" ((USItype)(ah)),                                       \
1270              "g" ((USItype)(bh)),                                       \
1271              "1" ((USItype)(al)),                                       \
1272              "g" ((USItype)(bl)))
1273 #define umul_ppmm(xh, xl, m0, m1) \
1274   do {                                                                  \
1275     union {UDItype __ll;                                                \
1276            struct {USItype __l, __h;} __i;                              \
1277           } __xx;                                                       \
1278     USItype __m0 = (m0), __m1 = (m1);                                   \
1279     __asm__ ("emul %1,%2,$0,%0"                                         \
1280              : "=g" (__xx.__ll)                                         \
1281              : "g" (__m0),                                              \
1282                "g" (__m1));                                             \
1283     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1284     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1285              + (((SItype) __m1 >> 31) & __m0));                         \
1286   } while (0)
1287 #define sdiv_qrnnd(q, r, n1, n0, d) \
1288   do {                                                                  \
1289     union {DItype __ll;                                                 \
1290            struct {SItype __l, __h;} __i;                               \
1291           } __xx;                                                       \
1292     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1293     __asm__ ("ediv %3,%2,%0,%1"                                         \
1294              : "=g" (q), "=g" (r)                                       \
1295              : "g" (__xx.ll), "g" (d));                                 \
1296   } while (0)
1297 #endif /* __vax__ */
1298
1299 #if defined (__z8000__) && W_TYPE_SIZE == 16
1300 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1301   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1302            : "=r" ((unsigned int)(sh)),                                 \
1303              "=&r" ((unsigned int)(sl))                                 \
1304            : "%0" ((unsigned int)(ah)),                                 \
1305              "r" ((unsigned int)(bh)),                                  \
1306              "%1" ((unsigned int)(al)),                                 \
1307              "rQR" ((unsigned int)(bl)))
1308 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1309   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1310            : "=r" ((unsigned int)(sh)),                                 \
1311              "=&r" ((unsigned int)(sl))                                 \
1312            : "0" ((unsigned int)(ah)),                                  \
1313              "r" ((unsigned int)(bh)),                                  \
1314              "1" ((unsigned int)(al)),                                  \
1315              "rQR" ((unsigned int)(bl)))
1316 #define umul_ppmm(xh, xl, m0, m1) \
1317   do {                                                                  \
1318     union {long int __ll;                                               \
1319            struct {unsigned int __h, __l;} __i;                         \
1320           } __xx;                                                       \
1321     unsigned int __m0 = (m0), __m1 = (m1);                              \
1322     __asm__ ("mult      %S0,%H3"                                        \
1323              : "=r" (__xx.__i.__h),                                     \
1324                "=r" (__xx.__i.__l)                                      \
1325              : "%1" (__m0),                                             \
1326                "rQR" (__m1));                                           \
1327     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1328     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1329              + (((signed int) __m1 >> 15) & __m0));                     \
1330   } while (0)
1331 #endif /* __z8000__ */
1332
1333 #endif /* __GNUC__ */
1334
1335
1336 #if !defined (umul_ppmm) && defined (__umulsidi3)
1337 #define umul_ppmm(ph, pl, m0, m1) \
1338   {                                                                     \
1339     UDWtype __ll = __umulsidi3 (m0, m1);                                \
1340     ph = (UWtype) (__ll >> W_TYPE_SIZE);                                \
1341     pl = (UWtype) __ll;                                                 \
1342   }
1343 #endif
1344
1345 #if !defined (__umulsidi3)
1346 #define __umulsidi3(u, v) \
1347   ({UWtype __hi, __lo;                                                  \
1348     umul_ppmm (__hi, __lo, u, v);                                       \
1349     ((UDWtype) __hi << W_TYPE_SIZE) | __lo; })
1350 #endif
1351
1352 /* If this machine has no inline assembler, use C macros.  */
1353
1354 #if !defined (add_ssaaaa)
1355 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1356   do {                                                                  \
1357     UWtype __x;                                                         \
1358     __x = (al) + (bl);                                                  \
1359     (sh) = (ah) + (bh) + (__x < (al));                                  \
1360     (sl) = __x;                                                         \
1361   } while (0)
1362 #endif
1363
1364 #if !defined (sub_ddmmss)
1365 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1366   do {                                                                  \
1367     UWtype __x;                                                         \
1368     __x = (al) - (bl);                                                  \
1369     (sh) = (ah) - (bh) - (__x > (al));                                  \
1370     (sl) = __x;                                                         \
1371   } while (0)
1372 #endif
1373
1374 #if !defined (umul_ppmm)
1375 #define umul_ppmm(w1, w0, u, v)                                         \
1376   do {                                                                  \
1377     UWtype __x0, __x1, __x2, __x3;                                      \
1378     UHWtype __ul, __vl, __uh, __vh;                                     \
1379     UWtype __u = (u), __v = (v);                                        \
1380                                                                         \
1381     __ul = __ll_lowpart (__u);                                          \
1382     __uh = __ll_highpart (__u);                                         \
1383     __vl = __ll_lowpart (__v);                                          \
1384     __vh = __ll_highpart (__v);                                         \
1385                                                                         \
1386     __x0 = (UWtype) __ul * __vl;                                        \
1387     __x1 = (UWtype) __ul * __vh;                                        \
1388     __x2 = (UWtype) __uh * __vl;                                        \
1389     __x3 = (UWtype) __uh * __vh;                                        \
1390                                                                         \
1391     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1392     __x1 += __x2;               /* but this indeed can */               \
1393     if (__x1 < __x2)            /* did we get it? */                    \
1394       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1395                                                                         \
1396     (w1) = __x3 + __ll_highpart (__x1);                                 \
1397     (w0) = (__ll_lowpart (__x1) << W_TYPE_SIZE/2) + __ll_lowpart (__x0);\
1398   } while (0)
1399 #endif
1400
1401 #if !defined (umul_ppmm)
1402 #define smul_ppmm(w1, w0, u, v)                                         \
1403   do {                                                                  \
1404     UWtype __w1;                                                        \
1405     UWtype __m0 = (u), __m1 = (v);                                      \
1406     umul_ppmm (__w1, w0, __m0, __m1);                                   \
1407     (w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1)                 \
1408                 - (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0);                \
1409   } while (0)
1410 #endif
1411
1412 /* Define this unconditionally, so it can be used for debugging.  */
1413 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1414   do {                                                                  \
1415     UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m;                     \
1416     __d1 = __ll_highpart (d);                                           \
1417     __d0 = __ll_lowpart (d);                                            \
1418                                                                         \
1419     __r1 = (n1) % __d1;                                                 \
1420     __q1 = (n1) / __d1;                                                 \
1421     __m = (UWtype) __q1 * __d0;                                         \
1422     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1423     if (__r1 < __m)                                                     \
1424       {                                                                 \
1425         __q1--, __r1 += (d);                                            \
1426         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1427           if (__r1 < __m)                                               \
1428             __q1--, __r1 += (d);                                        \
1429       }                                                                 \
1430     __r1 -= __m;                                                        \
1431                                                                         \
1432     __r0 = __r1 % __d1;                                                 \
1433     __q0 = __r1 / __d1;                                                 \
1434     __m = (UWtype) __q0 * __d0;                                         \
1435     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1436     if (__r0 < __m)                                                     \
1437       {                                                                 \
1438         __q0--, __r0 += (d);                                            \
1439         if (__r0 >= (d))                                                \
1440           if (__r0 < __m)                                               \
1441             __q0--, __r0 += (d);                                        \
1442       }                                                                 \
1443     __r0 -= __m;                                                        \
1444                                                                         \
1445     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1446     (r) = __r0;                                                         \
1447   } while (0)
1448
1449 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1450    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1451 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1452 #define udiv_qrnnd(q, r, nh, nl, d) \
1453   do {                                                                  \
1454     UWtype __r;                                                         \
1455     (q) = __MPN(udiv_w_sdiv) (&__r, nh, nl, d);                         \
1456     (r) = __r;                                                          \
1457   } while (0)
1458 #endif
1459
1460 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1461 #if !defined (udiv_qrnnd)
1462 #define UDIV_NEEDS_NORMALIZATION 1
1463 #define udiv_qrnnd __udiv_qrnnd_c
1464 #endif
1465
1466 #if !defined (count_leading_zeros)
1467 extern
1468 #ifdef __STDC__
1469 const
1470 #endif
1471 unsigned char __clz_tab[];
1472 #define count_leading_zeros(count, x) \
1473   do {                                                                  \
1474     UWtype __xr = (x);                                                  \
1475     UWtype __a;                                                         \
1476                                                                         \
1477     if (W_TYPE_SIZE <= 32)                                              \
1478       {                                                                 \
1479         __a = __xr < ((UWtype) 1 << 2*__BITS4)                          \
1480           ? (__xr < ((UWtype) 1 << __BITS4) ? 0 : __BITS4)              \
1481           : (__xr < ((UWtype) 1 << 3*__BITS4) ?  2*__BITS4 : 3*__BITS4);\
1482       }                                                                 \
1483     else                                                                \
1484       {                                                                 \
1485         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1486           if (((__xr >> __a) & 0xff) != 0)                              \
1487             break;                                                      \
1488       }                                                                 \
1489                                                                         \
1490     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1491   } while (0)
1492 /* This version gives a well-defined value for zero. */
1493 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1494 #endif
1495
1496 #if !defined (count_trailing_zeros)
1497 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1498    defined in asm, but if it is not, the C version above is good enough.  */
1499 #define count_trailing_zeros(count, x) \
1500   do {                                                                  \
1501     UWtype __ctz_x = (x);                                               \
1502     UWtype __ctz_c;                                                     \
1503     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1504     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1505   } while (0)
1506 #endif
1507
1508 #ifndef UDIV_NEEDS_NORMALIZATION
1509 #define UDIV_NEEDS_NORMALIZATION 0
1510 #endif