stdlib/longlong.h

   1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
   2    Copyright (C) 1991,92,93,94,96,97,98,99 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Library General Public License as
   7    published by the Free Software Foundation; either version 2 of the
   8    License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Library General Public License for more details.
  14
  15    You should have received a copy of the GNU Library General Public
  16    License along with the GNU C Library; see the file COPYING.LIB.  If not,
  17    write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
  18    Boston, MA 02111-1307, USA.  */
  19
  20 /* You have to define the following before including this file:
  21
  22    UWtype -- An unsigned type, default type for operations (typically a "word")
  23    UHWtype -- An unsigned type, at least half the size of UWtype.
  24    UDWtype -- An unsigned type, at least twice as large a UWtype
  25    W_TYPE_SIZE -- size in bits of UWtype
  26
  27    SItype, USItype -- Signed and unsigned 32 bit types.
  28    DItype, UDItype -- Signed and unsigned 64 bit types.
  29
  30    On a 32 bit machine UWtype should typically be USItype;
  31    on a 64 bit machine, UWtype should typically be UDItype.
  32 */
  33
  34 #define __BITS4 (W_TYPE_SIZE / 4)
  35 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  36 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  37 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  38
  39 /* This is used to make sure no undesirable sharing between different libraries
  40    that use this file takes place.  */
  41 #ifndef __MPN
  42 #define __MPN(x) __##x
  43 #endif
  44
  45 /* Define auxiliary asm macros.
  46
  47    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
  48    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
  49    word product in HIGH_PROD and LOW_PROD.
  50
  51    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  52    UDWtype product.  This is just a variant of umul_ppmm.
  53
  54    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  55    denominator) divides a UDWtype, composed by the UWtype integers
  56    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  57    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
  58    than DENOMINATOR for correct operation.  If, in addition, the most
  59    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  60    UDIV_NEEDS_NORMALIZATION is defined to 1.
  61
  62    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  63    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
  64    is rounded towards 0.
  65
  66    5) count_leading_zeros(count, x) counts the number of zero-bits from the
  67    msb to the first non-zero bit in the UWtype X.  This is the number of
  68    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
  69    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  70
  71    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  72    from the least significant end.
  73
  74    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  75    high_addend_2, low_addend_2) adds two UWtype integers, composed by
  76    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  77    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  78    (i.e. carry out) is not stored anywhere, and is lost.
  79
  80    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  81    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  82    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  83    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
  84    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  85    and is lost.
  86
  87    If any of these macros are left undefined for a particular CPU,
  88    C macros are used.  */
  89
  90 /* The CPUs come in alphabetical order below.
  91
  92    Please add support for more CPUs here, or improve the current support
  93    for the CPUs below!  */
  94
  95 #if defined (__GNUC__) && !defined (NO_ASM)
  96
  97 /* We sometimes need to clobber "cc" with gcc2, but that would not be
  98    understood by gcc1.  Use cpp to avoid major code duplication.  */
  99 #if __GNUC__ < 2
 100 #define __CLOBBER_CC
 101 #define __AND_CLOBBER_CC
 102 #else /* __GNUC__ >= 2 */
 103 #define __CLOBBER_CC : "cc"
 104 #define __AND_CLOBBER_CC , "cc"
 105 #endif /* __GNUC__ < 2 */
 106
 107 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
 108 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 109   __asm__ ("add %1,%4,%5
 110         addc %0,%2,%3"                                                  \
 111            : "=r" ((USItype)(sh)),                                      \
 112             "=&r" ((USItype)(sl))                                       \
 113            : "%r" ((USItype)(ah)),                                      \
 114              "rI" ((USItype)(bh)),                                      \
 115              "%r" ((USItype)(al)),                                      \
 116              "rI" ((USItype)(bl)))
 117 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 118   __asm__ ("sub %1,%4,%5
 119         subc %0,%2,%3"                                                  \
 120            : "=r" ((USItype)(sh)),                                      \
 121              "=&r" ((USItype)(sl))                                      \
 122            : "r" ((USItype)(ah)),                                       \
 123              "rI" ((USItype)(bh)),                                      \
 124              "r" ((USItype)(al)),                                       \
 125              "rI" ((USItype)(bl)))
 126 #define umul_ppmm(xh, xl, m0, m1) \
 127   do {                                                                  \
 128     USItype __m0 = (m0), __m1 = (m1);                                   \
 129     __asm__ ("multiplu %0,%1,%2"                                        \
 130              : "=r" ((USItype)(xl))                                     \
 131              : "r" (__m0),                                              \
 132                "r" (__m1));                                             \
 133     __asm__ ("multmu %0,%1,%2"                                          \
 134              : "=r" ((USItype)(xh))                                     \
 135              : "r" (__m0),                                              \
 136                "r" (__m1));                                             \
 137   } while (0)
 138 #define udiv_qrnnd(q, r, n1, n0, d) \
 139   __asm__ ("dividu %0,%3,%4"                                            \
 140            : "=r" ((USItype)(q)),                                       \
 141              "=q" ((USItype)(r))                                        \
 142            : "1" ((USItype)(n1)),                                       \
 143              "r" ((USItype)(n0)),                                       \
 144              "r" ((USItype)(d)))
 145 #define count_leading_zeros(count, x) \
 146     __asm__ ("clz %0,%1"                                                \
 147              : "=r" ((USItype)(count))                                  \
 148              : "r" ((USItype)(x)))
 149 #define COUNT_LEADING_ZEROS_0 32
 150 #endif /* __a29k__ */
 151
 152 #if defined (__alpha) && W_TYPE_SIZE == 64
 153 #define umul_ppmm(ph, pl, m0, m1) \
 154   do {                                                                  \
 155     UDItype __m0 = (m0), __m1 = (m1);                                   \
 156     __asm__ ("umulh %r1,%2,%0"                                          \
 157              : "=r" ((UDItype) ph)                                      \
 158              : "%rJ" (__m0),                                            \
 159                "rI" (__m1));                                            \
 160     (pl) = __m0 * __m1;                                                 \
 161   } while (0)
 162 #define UMUL_TIME 46
 163 #ifndef LONGLONG_STANDALONE
 164 #define udiv_qrnnd(q, r, n1, n0, d) \
 165   do { UDItype __r;                                                     \
 166     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 167     (r) = __r;                                                          \
 168   } while (0)
 169 extern UDItype __udiv_qrnnd __P ((UDItype *, UDItype, UDItype, UDItype));
 170 #define UDIV_TIME 220
 171 #endif /* LONGLONG_STANDALONE */
 172 #endif /* __alpha */
 173
 174 #if defined (__arm__) && W_TYPE_SIZE == 32
 175 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 176   __asm__ ("adds        %1, %4, %5
 177         adc     %0, %2, %3"                                             \
 178            : "=r" ((USItype)(sh)),                                      \
 179              "=&r" ((USItype)(sl))                                      \
 180            : "%r" ((USItype)(ah)),                                      \
 181              "rI" ((USItype)(bh)),                                      \
 182              "%r" ((USItype)(al)),                                      \
 183              "rI" ((USItype)(bl)))
 184 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 185   __asm__ ("subs        %1, %4, %5
 186         sbc     %0, %2, %3"                                             \
 187            : "=r" ((USItype)(sh)),                                      \
 188              "=&r" ((USItype)(sl))                                      \
 189            : "r" ((USItype)(ah)),                                       \
 190              "rI" ((USItype)(bh)),                                      \
 191              "r" ((USItype)(al)),                                       \
 192              "rI" ((USItype)(bl)))
 193 #if 0
 194 #define umul_ppmm(xh, xl, a, b) \
 195   __asm__ ("%@ Inlined umul_ppmm
 196         mov     %|r0, %2, lsr #16
 197         mov     %|r2, %3, lsr #16
 198         bic     %|r1, %2, %|r0, lsl #16
 199         bic     %|r2, %3, %|r2, lsl #16
 200         mul     %1, %|r1, %|r2
 201         mul     %|r2, %|r0, %|r2
 202         mul     %|r1, %0, %|r1
 203         mul     %0, %|r0, %0
 204         adds    %|r1, %|r2, %|r1
 205         addcs   %0, %0, #65536
 206         adds    %1, %1, %|r1, lsl #16
 207         adc     %0, %0, %|r1, lsr #16"                                  \
 208            : "=&r" ((USItype)(xh)),                                     \
 209              "=r" ((USItype)(xl))                                       \
 210            : "r" ((USItype)(a)),                                        \
 211              "r" ((USItype)(b))                                         \
 212            : "r0", "r1", "r2")
 213 #define UMUL_TIME 20
 214 #define UDIV_TIME 100
 215 #endif
 216 #endif /* __arm__ */
 217
 218 #if defined (__clipper__) && W_TYPE_SIZE == 32
 219 #define umul_ppmm(w1, w0, u, v) \
 220   ({union {UDItype __ll;                                                \
 221            struct {USItype __l, __h;} __i;                              \
 222           } __xx;                                                       \
 223   __asm__ ("mulwux %2,%0"                                               \
 224            : "=r" (__xx.__ll)                                           \
 225            : "%0" ((USItype)(u)),                                       \
 226              "r" ((USItype)(v)));                                       \
 227   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 228 #define smul_ppmm(w1, w0, u, v) \
 229   ({union {DItype __ll;                                                 \
 230            struct {SItype __l, __h;} __i;                               \
 231           } __xx;                                                       \
 232   __asm__ ("mulwx %2,%0"                                                \
 233            : "=r" (__xx.__ll)                                           \
 234            : "%0" ((SItype)(u)),                                        \
 235              "r" ((SItype)(v)));                                        \
 236   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 237 #define __umulsidi3(u, v) \
 238   ({UDItype __w;                                                        \
 239     __asm__ ("mulwux %2,%0"                                             \
 240              : "=r" (__w)                                               \
 241              : "%0" ((USItype)(u)),                                     \
 242                "r" ((USItype)(v)));                                     \
 243     __w; })
 244 #endif /* __clipper__ */
 245
 246 #if defined (__gmicro__) && W_TYPE_SIZE == 32
 247 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 248   __asm__ ("add.w %5,%1
 249         addx %3,%0"                                                     \
 250            : "=g" ((USItype)(sh)),                                      \
 251              "=&g" ((USItype)(sl))                                      \
 252            : "%0" ((USItype)(ah)),                                      \
 253              "g" ((USItype)(bh)),                                       \
 254              "%1" ((USItype)(al)),                                      \
 255              "g" ((USItype)(bl)))
 256 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 257   __asm__ ("sub.w %5,%1
 258         subx %3,%0"                                                     \
 259            : "=g" ((USItype)(sh)),                                      \
 260              "=&g" ((USItype)(sl))                                      \
 261            : "0" ((USItype)(ah)),                                       \
 262              "g" ((USItype)(bh)),                                       \
 263              "1" ((USItype)(al)),                                       \
 264              "g" ((USItype)(bl)))
 265 #define umul_ppmm(ph, pl, m0, m1) \
 266   __asm__ ("mulx %3,%0,%1"                                              \
 267            : "=g" ((USItype)(ph)),                                      \
 268              "=r" ((USItype)(pl))                                       \
 269            : "%0" ((USItype)(m0)),                                      \
 270              "g" ((USItype)(m1)))
 271 #define udiv_qrnnd(q, r, nh, nl, d) \
 272   __asm__ ("divx %4,%0,%1"                                              \
 273            : "=g" ((USItype)(q)),                                       \
 274              "=r" ((USItype)(r))                                        \
 275            : "1" ((USItype)(nh)),                                       \
 276              "0" ((USItype)(nl)),                                       \
 277              "g" ((USItype)(d)))
 278 #define count_leading_zeros(count, x) \
 279   __asm__ ("bsch/1 %1,%0"                                               \
 280            : "=g" (count)                                               \
 281            : "g" ((USItype)(x)),                                        \
 282              "0" ((USItype)0))
 283 #endif
 284
 285 #if defined (__hppa) && W_TYPE_SIZE == 32
 286 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 287   __asm__ ("add %4,%5,%1
 288         addc %2,%3,%0"                                                  \
 289            : "=r" ((USItype)(sh)),                                      \
 290              "=&r" ((USItype)(sl))                                      \
 291            : "%rM" ((USItype)(ah)),                                     \
 292              "rM" ((USItype)(bh)),                                      \
 293              "%rM" ((USItype)(al)),                                     \
 294              "rM" ((USItype)(bl)))
 295 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 296   __asm__ ("sub %4,%5,%1
 297         subb %2,%3,%0"                                                  \
 298            : "=r" ((USItype)(sh)),                                      \
 299              "=&r" ((USItype)(sl))                                      \
 300            : "rM" ((USItype)(ah)),                                      \
 301              "rM" ((USItype)(bh)),                                      \
 302              "rM" ((USItype)(al)),                                      \
 303              "rM" ((USItype)(bl)))
 304 #if defined (_PA_RISC1_1)
 305 #define umul_ppmm(wh, wl, u, v) \
 306   do {                                                                  \
 307     union {UDItype __ll;                                                \
 308            struct {USItype __h, __l;} __i;                              \
 309           } __xx;                                                       \
 310     __asm__ ("xmpyu %1,%2,%0"                                           \
 311              : "=*f" (__xx.__ll)                                        \
 312              : "*f" ((USItype)(u)),                                     \
 313                "*f" ((USItype)(v)));                                    \
 314     (wh) = __xx.__i.__h;                                                \
 315     (wl) = __xx.__i.__l;                                                \
 316   } while (0)
 317 #define UMUL_TIME 8
 318 #define UDIV_TIME 60
 319 #else
 320 #define UMUL_TIME 40
 321 #define UDIV_TIME 80
 322 #endif
 323 #ifndef LONGLONG_STANDALONE
 324 #define udiv_qrnnd(q, r, n1, n0, d) \
 325   do { USItype __r;                                                     \
 326     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 327     (r) = __r;                                                          \
 328   } while (0)
 329 extern USItype __udiv_qrnnd ();
 330 #endif /* LONGLONG_STANDALONE */
 331 #define count_leading_zeros(count, x) \
 332   do {                                                                  \
 333     USItype __tmp;                                                      \
 334     __asm__ (                                                           \
 335        "ldi             1,%0
 336         extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?
 337         extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.
 338         ldo             16(%0),%0               ; Yes.  Perform add.
 339         extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?
 340         extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.
 341         ldo             8(%0),%0                ; Yes.  Perform add.
 342         extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?
 343         extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.
 344         ldo             4(%0),%0                ; Yes.  Perform add.
 345         extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?
 346         extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.
 347         ldo             2(%0),%0                ; Yes.  Perform add.
 348         extru           %1,30,1,%1              ; Extract bit 1.
 349         sub             %0,%1,%0                ; Subtract it.
 350         " : "=r" (count), "=r" (__tmp) : "1" (x));                      \
 351   } while (0)
 352 #endif /* hppa */
 353
 354 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
 355 #define umul_ppmm(xh, xl, m0, m1) \
 356   do {                                                                  \
 357     union {UDItype __ll;                                                \
 358            struct {USItype __h, __l;} __i;                              \
 359           } __xx;                                                       \
 360     USItype __m0 = (m0), __m1 = (m1);                                   \
 361     __asm__ ("mr %0,%3"                                                 \
 362              : "=r" (__xx.__i.__h),                                     \
 363                "=r" (__xx.__i.__l)                                      \
 364              : "%1" (__m0),                                             \
 365                "r" (__m1));                                             \
 366     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 367     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 368              + (((SItype) __m1 >> 31) & __m0));                         \
 369   } while (0)
 370 #define smul_ppmm(xh, xl, m0, m1) \
 371   do {                                                                  \
 372     union {DItype __ll;                                                 \
 373            struct {USItype __h, __l;} __i;                              \
 374           } __xx;                                                       \
 375     __asm__ ("mr %0,%3"                                                 \
 376              : "=r" (__xx.__i.__h),                                     \
 377                "=r" (__xx.__i.__l)                                      \
 378              : "%1" (m0),                                               \
 379                "r" (m1));                                               \
 380     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 381   } while (0)
 382 #define sdiv_qrnnd(q, r, n1, n0, d) \
 383   do {                                                                  \
 384     union {DItype __ll;                                                 \
 385            struct {USItype __h, __l;} __i;                              \
 386           } __xx;                                                       \
 387     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
 388     __asm__ ("dr %0,%2"                                                 \
 389              : "=r" (__xx.__ll)                                         \
 390              : "0" (__xx.__ll), "r" (d));                               \
 391     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
 392   } while (0)
 393 #endif
 394
 395 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 396 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 397   __asm__ ("addl %5,%1
 398         adcl %3,%0"                                                     \
 399            : "=r" ((USItype)(sh)),                                      \
 400              "=&r" ((USItype)(sl))                                      \
 401            : "%0" ((USItype)(ah)),                                      \
 402              "g" ((USItype)(bh)),                                       \
 403              "%1" ((USItype)(al)),                                      \
 404              "g" ((USItype)(bl)))
 405 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 406   __asm__ ("subl %5,%1
 407         sbbl %3,%0"                                                     \
 408            : "=r" ((USItype)(sh)),                                      \
 409              "=&r" ((USItype)(sl))                                      \
 410            : "0" ((USItype)(ah)),                                       \
 411              "g" ((USItype)(bh)),                                       \
 412              "1" ((USItype)(al)),                                       \
 413              "g" ((USItype)(bl)))
 414 #define umul_ppmm(w1, w0, u, v) \
 415   __asm__ ("mull %3"                                                    \
 416            : "=a" ((USItype)(w0)),                                      \
 417              "=d" ((USItype)(w1))                                       \
 418            : "%0" ((USItype)(u)),                                       \
 419              "rm" ((USItype)(v)))
 420 #define udiv_qrnnd(q, r, n1, n0, d) \
 421   __asm__ ("divl %4"                                                    \
 422            : "=a" ((USItype)(q)),                                       \
 423              "=d" ((USItype)(r))                                        \
 424            : "0" ((USItype)(n0)),                                       \
 425              "1" ((USItype)(n1)),                                       \
 426              "rm" ((USItype)(d)))
 427 #define count_leading_zeros(count, x) \
 428   do {                                                                  \
 429     USItype __cbtmp;                                                    \
 430     __asm__ ("bsrl %1,%0"                                               \
 431              : "=r" (__cbtmp) : "rm" ((USItype)(x)));                   \
 432     (count) = __cbtmp ^ 31;                                             \
 433   } while (0)
 434 #define count_trailing_zeros(count, x) \
 435   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
 436 #ifndef UMUL_TIME
 437 #define UMUL_TIME 40
 438 #endif
 439 #ifndef UDIV_TIME
 440 #define UDIV_TIME 40
 441 #endif
 442 #endif /* 80x86 */
 443
 444 #if defined (__i860__) && W_TYPE_SIZE == 32
 445 #define rshift_rhlc(r,h,l,c) \
 446   __asm__ ("shr %3,r0,r0\;shrd %1,%2,%0"                                \
 447            "=r" (r) : "r" (h), "r" (l), "rn" (c))
 448 #endif /* i860 */
 449
 450 #if defined (__i960__) && W_TYPE_SIZE == 32
 451 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 452   __asm__ ("cmpo 1,0\;addc %5,%4,%1\;addc %3,%2,%0"                     \
 453            : "=r" ((USItype)(sh)),                                      \
 454              "=&r" ((USItype)(sl))                                      \
 455            : "%dI" ((USItype)(ah)),                                     \
 456              "dI" ((USItype)(bh)),                                      \
 457              "%dI" ((USItype)(al)),                                     \
 458              "dI" ((USItype)(bl)))
 459 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 460   __asm__ ("cmpo 0,0\;subc %5,%4,%1\;subc %3,%2,%0"                     \
 461            : "=r" ((USItype)(sh)),                                      \
 462              "=&r" ((USItype)(sl))                                      \
 463            : "dI" ((USItype)(ah)),                                      \
 464              "dI" ((USItype)(bh)),                                      \
 465              "dI" ((USItype)(al)),                                      \
 466              "dI" ((USItype)(bl)))
 467 #define umul_ppmm(w1, w0, u, v) \
 468   ({union {UDItype __ll;                                                \
 469            struct {USItype __l, __h;} __i;                              \
 470           } __xx;                                                       \
 471   __asm__ ("emul        %2,%1,%0"                                       \
 472            : "=d" (__xx.__ll)                                           \
 473            : "%dI" ((USItype)(u)),                                      \
 474              "dI" ((USItype)(v)));                                      \
 475   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 476 #define __umulsidi3(u, v) \
 477   ({UDItype __w;                                                        \
 478     __asm__ ("emul      %2,%1,%0"                                       \
 479              : "=d" (__w)                                               \
 480              : "%dI" ((USItype)(u)),                                    \
 481                "dI" ((USItype)(v)));                                    \
 482     __w; })
 483 #define udiv_qrnnd(q, r, nh, nl, d) \
 484   do {                                                                  \
 485     union {UDItype __ll;                                                \
 486            struct {USItype __l, __h;} __i;                              \
 487           } __nn;                                                       \
 488     __nn.__i.__h = (nh); __nn.__i.__l = (nl);                           \
 489     __asm__ ("ediv %d,%n,%0"                                            \
 490            : "=d" (__rq.__ll)                                           \
 491            : "dI" (__nn.__ll),                                          \
 492              "dI" ((USItype)(d)));                                      \
 493     (r) = __rq.__i.__l; (q) = __rq.__i.__h;                             \
 494   } while (0)
 495 #define count_leading_zeros(count, x) \
 496   do {                                                                  \
 497     USItype __cbtmp;                                                    \
 498     __asm__ ("scanbit %1,%0"                                            \
 499              : "=r" (__cbtmp)                                           \
 500              : "r" ((USItype)(x)));                                     \
 501     (count) = __cbtmp ^ 31;                                             \
 502   } while (0)
 503 #define COUNT_LEADING_ZEROS_0 (-32) /* sic */
 504 #if defined (__i960mx)          /* what is the proper symbol to test??? */
 505 #define rshift_rhlc(r,h,l,c) \
 506   do {                                                                  \
 507     union {UDItype __ll;                                                \
 508            struct {USItype __l, __h;} __i;                              \
 509           } __nn;                                                       \
 510     __nn.__i.__h = (h); __nn.__i.__l = (l);                             \
 511     __asm__ ("shre %2,%1,%0"                                            \
 512              : "=d" (r) : "dI" (__nn.__ll), "dI" (c));                  \
 513   }
 514 #endif /* i960mx */
 515 #endif /* i960 */
 516
 517 #if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
 518 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 519   __asm__ ("add%.l %5,%1
 520         addx%.l %3,%0"                                                  \
 521            : "=d" ((USItype)(sh)),                                      \
 522              "=&d" ((USItype)(sl))                                      \
 523            : "%0" ((USItype)(ah)),                                      \
 524              "d" ((USItype)(bh)),                                       \
 525              "%1" ((USItype)(al)),                                      \
 526              "g" ((USItype)(bl)))
 527 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 528   __asm__ ("sub%.l %5,%1
 529         subx%.l %3,%0"                                                  \
 530            : "=d" ((USItype)(sh)),                                      \
 531              "=&d" ((USItype)(sl))                                      \
 532            : "0" ((USItype)(ah)),                                       \
 533              "d" ((USItype)(bh)),                                       \
 534              "1" ((USItype)(al)),                                       \
 535              "g" ((USItype)(bl)))
 536 #if (defined (__mc68020__) || defined (__NeXT__) || defined(mc68020))
 537 #define umul_ppmm(w1, w0, u, v) \
 538   __asm__ ("mulu%.l %3,%1:%0"                                           \
 539            : "=d" ((USItype)(w0)),                                      \
 540              "=d" ((USItype)(w1))                                       \
 541            : "%0" ((USItype)(u)),                                       \
 542              "dmi" ((USItype)(v)))
 543 #define UMUL_TIME 45
 544 #define udiv_qrnnd(q, r, n1, n0, d) \
 545   __asm__ ("divu%.l %4,%1:%0"                                           \
 546            : "=d" ((USItype)(q)),                                       \
 547              "=d" ((USItype)(r))                                        \
 548            : "0" ((USItype)(n0)),                                       \
 549              "1" ((USItype)(n1)),                                       \
 550              "dmi" ((USItype)(d)))
 551 #define UDIV_TIME 90
 552 #define sdiv_qrnnd(q, r, n1, n0, d) \
 553   __asm__ ("divs%.l %4,%1:%0"                                           \
 554            : "=d" ((USItype)(q)),                                       \
 555              "=d" ((USItype)(r))                                        \
 556            : "0" ((USItype)(n0)),                                       \
 557              "1" ((USItype)(n1)),                                       \
 558              "dmi" ((USItype)(d)))
 559 #define count_leading_zeros(count, x) \
 560   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
 561            : "=d" ((USItype)(count))                                    \
 562            : "od" ((USItype)(x)), "n" (0))
 563 #define COUNT_LEADING_ZEROS_0 32
 564 #else /* not mc68020 */
 565 #define umul_ppmm(xh, xl, a, b) \
 566   do { USItype __umul_tmp1, __umul_tmp2;                                \
 567         __asm__ ("| Inlined umul_ppmm
 568         move%.l %5,%3
 569         move%.l %2,%0
 570         move%.w %3,%1
 571         swap    %3
 572         swap    %0
 573         mulu    %2,%1
 574         mulu    %3,%0
 575         mulu    %2,%3
 576         swap    %2
 577         mulu    %5,%2
 578         add%.l  %3,%2
 579         jcc     1f
 580         add%.l  %#0x10000,%0
 581 1:      move%.l %2,%3
 582         clr%.w  %2
 583         swap    %2
 584         swap    %3
 585         clr%.w  %3
 586         add%.l  %3,%1
 587         addx%.l %2,%0
 588         | End inlined umul_ppmm"                                        \
 589               : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)),           \
 590                 "=d" (__umul_tmp1), "=&d" (__umul_tmp2)                 \
 591               : "%2" ((USItype)(a)), "d" ((USItype)(b)));               \
 592   } while (0)
 593 #define UMUL_TIME 100
 594 #define UDIV_TIME 400
 595 #endif /* not mc68020 */
 596 #endif /* mc68000 */
 597
 598 #if defined (__m88000__) && W_TYPE_SIZE == 32
 599 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 600   __asm__ ("addu.co %1,%r4,%r5
 601         addu.ci %0,%r2,%r3"                                             \
 602            : "=r" ((USItype)(sh)),                                      \
 603              "=&r" ((USItype)(sl))                                      \
 604            : "%rJ" ((USItype)(ah)),                                     \
 605              "rJ" ((USItype)(bh)),                                      \
 606              "%rJ" ((USItype)(al)),                                     \
 607              "rJ" ((USItype)(bl)))
 608 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 609   __asm__ ("subu.co %1,%r4,%r5
 610         subu.ci %0,%r2,%r3"                                             \
 611            : "=r" ((USItype)(sh)),                                      \
 612              "=&r" ((USItype)(sl))                                      \
 613            : "rJ" ((USItype)(ah)),                                      \
 614              "rJ" ((USItype)(bh)),                                      \
 615              "rJ" ((USItype)(al)),                                      \
 616              "rJ" ((USItype)(bl)))
 617 #define count_leading_zeros(count, x) \
 618   do {                                                                  \
 619     USItype __cbtmp;                                                    \
 620     __asm__ ("ff1 %0,%1"                                                \
 621              : "=r" (__cbtmp)                                           \
 622              : "r" ((USItype)(x)));                                     \
 623     (count) = __cbtmp ^ 31;                                             \
 624   } while (0)
 625 #define COUNT_LEADING_ZEROS_0 63 /* sic */
 626 #if defined (__m88110__)
 627 #define umul_ppmm(wh, wl, u, v) \
 628   do {                                                                  \
 629     union {UDItype __ll;                                                \
 630            struct {USItype __h, __l;} __i;                              \
 631           } __xx;                                                       \
 632     __asm__ ("mulu.d    %0,%1,%2"                                       \
 633              : "=r" (__xx.__ll)                                         \
 634              : "r" ((USItype)(u)),                                      \
 635                "r" ((USItype)(v)));                                     \
 636     (wh) = __xx.__i.__h;                                                \
 637     (wl) = __xx.__i.__l;                                                \
 638   } while (0)
 639 #define udiv_qrnnd(q, r, n1, n0, d) \
 640   ({union {UDItype __ll;                                                \
 641            struct {USItype __h, __l;} __i;                              \
 642           } __xx;                                                       \
 643   USItype __q;                                                          \
 644   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 645   __asm__ ("divu.d %0,%1,%2"                                            \
 646            : "=r" (__q)                                                 \
 647            : "r" (__xx.__ll),                                           \
 648              "r" ((USItype)(d)));                                       \
 649   (r) = (n0) - __q * (d); (q) = __q; })
 650 #define UMUL_TIME 5
 651 #define UDIV_TIME 25
 652 #else
 653 #define UMUL_TIME 17
 654 #define UDIV_TIME 150
 655 #endif /* __m88110__ */
 656 #endif /* __m88000__ */
 657
 658 #if defined (__mips__) && W_TYPE_SIZE == 32
 659 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
 660 #define umul_ppmm(w1, w0, u, v) \
 661   __asm__ ("multu %2,%3"                                                \
 662            : "=l" ((USItype)(w0)),                                      \
 663              "=h" ((USItype)(w1))                                       \
 664            : "d" ((USItype)(u)),                                        \
 665              "d" ((USItype)(v)))
 666 #else
 667 #define umul_ppmm(w1, w0, u, v) \
 668   __asm__ ("multu %2,%3
 669         mflo %0
 670         mfhi %1"                                                        \
 671            : "=d" ((USItype)(w0)),                                      \
 672              "=d" ((USItype)(w1))                                       \
 673            : "d" ((USItype)(u)),                                        \
 674              "d" ((USItype)(v)))
 675 #endif
 676 #define UMUL_TIME 10
 677 #define UDIV_TIME 100
 678 #endif /* __mips__ */
 679
 680 #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64
 681 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
 682 #define umul_ppmm(w1, w0, u, v) \
 683   __asm__ ("dmultu %2,%3"                                               \
 684            : "=l" ((UDItype)(w0)),                                      \
 685              "=h" ((UDItype)(w1))                                       \
 686            : "d" ((UDItype)(u)),                                        \
 687              "d" ((UDItype)(v)))
 688 #else
 689 #define umul_ppmm(w1, w0, u, v) \
 690   __asm__ ("dmultu %2,%3
 691         mflo %0
 692         mfhi %1"                                                        \
 693            : "=d" ((UDItype)(w0)),                                      \
 694              "=d" ((UDItype)(w1))                                       \
 695            : "d" ((UDItype)(u)),                                        \
 696              "d" ((UDItype)(v)))
 697 #endif
 698 #define UMUL_TIME 20
 699 #define UDIV_TIME 140
 700 #endif /* __mips__ */
 701
 702 #if defined (__ns32000__) && W_TYPE_SIZE == 32
 703 #define umul_ppmm(w1, w0, u, v) \
 704   ({union {UDItype __ll;                                                \
 705            struct {USItype __l, __h;} __i;                              \
 706           } __xx;                                                       \
 707   __asm__ ("meid %2,%0"                                                 \
 708            : "=g" (__xx.__ll)                                           \
 709            : "%0" ((USItype)(u)),                                       \
 710              "g" ((USItype)(v)));                                       \
 711   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 712 #define __umulsidi3(u, v) \
 713   ({UDItype __w;                                                        \
 714     __asm__ ("meid %2,%0"                                               \
 715              : "=g" (__w)                                               \
 716              : "%0" ((USItype)(u)),                                     \
 717                "g" ((USItype)(v)));                                     \
 718     __w; })
 719 #define udiv_qrnnd(q, r, n1, n0, d) \
 720   ({union {UDItype __ll;                                                \
 721            struct {USItype __l, __h;} __i;                              \
 722           } __xx;                                                       \
 723   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 724   __asm__ ("deid %2,%0"                                                 \
 725            : "=g" (__xx.__ll)                                           \
 726            : "0" (__xx.__ll),                                           \
 727              "g" ((USItype)(d)));                                       \
 728   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
 729 #define count_trailing_zeros(count,x) \
 730   do {
 731     __asm__ ("ffsd      %2,%0"                                          \
 732              : "=r" ((USItype) (count))                                 \
 733              : "0" ((USItype) 0),                                       \
 734                "r" ((USItype) (x)));                                    \
 735   } while (0)
 736 #endif /* __ns32000__ */
 737
 738 #if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
 739 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 740   do {                                                                  \
 741     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 742       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 743              : "=r" ((USItype)(sh)),                                    \
 744                "=&r" ((USItype)(sl))                                    \
 745              : "%r" ((USItype)(ah)),                                    \
 746                "%r" ((USItype)(al)),                                    \
 747                "rI" ((USItype)(bl)));                                   \
 748     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 749       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 750              : "=r" ((USItype)(sh)),                                    \
 751                "=&r" ((USItype)(sl))                                    \
 752              : "%r" ((USItype)(ah)),                                    \
 753                "%r" ((USItype)(al)),                                    \
 754                "rI" ((USItype)(bl)));                                   \
 755     else                                                                \
 756       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 757              : "=r" ((USItype)(sh)),                                    \
 758                "=&r" ((USItype)(sl))                                    \
 759              : "%r" ((USItype)(ah)),                                    \
 760                "r" ((USItype)(bh)),                                     \
 761                "%r" ((USItype)(al)),                                    \
 762                "rI" ((USItype)(bl)));                                   \
 763   } while (0)
 764 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 765   do {                                                                  \
 766     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 767       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 768                : "=r" ((USItype)(sh)),                                  \
 769                  "=&r" ((USItype)(sl))                                  \
 770                : "r" ((USItype)(bh)),                                   \
 771                  "rI" ((USItype)(al)),                                  \
 772                  "r" ((USItype)(bl)));                                  \
 773     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
 774       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 775                : "=r" ((USItype)(sh)),                                  \
 776                  "=&r" ((USItype)(sl))                                  \
 777                : "r" ((USItype)(bh)),                                   \
 778                  "rI" ((USItype)(al)),                                  \
 779                  "r" ((USItype)(bl)));                                  \
 780     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 781       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 782                : "=r" ((USItype)(sh)),                                  \
 783                  "=&r" ((USItype)(sl))                                  \
 784                : "r" ((USItype)(ah)),                                   \
 785                  "rI" ((USItype)(al)),                                  \
 786                  "r" ((USItype)(bl)));                                  \
 787     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 788       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 789                : "=r" ((USItype)(sh)),                                  \
 790                  "=&r" ((USItype)(sl))                                  \
 791                : "r" ((USItype)(ah)),                                   \
 792                  "rI" ((USItype)(al)),                                  \
 793                  "r" ((USItype)(bl)));                                  \
 794     else                                                                \
 795       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 796                : "=r" ((USItype)(sh)),                                  \
 797                  "=&r" ((USItype)(sl))                                  \
 798                : "r" ((USItype)(ah)),                                   \
 799                  "r" ((USItype)(bh)),                                   \
 800                  "rI" ((USItype)(al)),                                  \
 801                  "r" ((USItype)(bl)));                                  \
 802   } while (0)
 803 #define count_leading_zeros(count, x) \
 804   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
 805            : "=r" ((USItype)(count))                                    \
 806            : "r" ((USItype)(x)))
 807 #define COUNT_LEADING_ZEROS_0 32
 808 #if defined (_ARCH_PPC)
 809 #define umul_ppmm(ph, pl, m0, m1) \
 810   do {                                                                  \
 811     USItype __m0 = (m0), __m1 = (m1);                                   \
 812     __asm__ ("mulhwu %0,%1,%2"                                          \
 813              : "=r" ((USItype) ph)                                      \
 814              : "%r" (__m0),                                             \
 815                "r" (__m1));                                             \
 816     (pl) = __m0 * __m1;                                                 \
 817   } while (0)
 818 #define UMUL_TIME 15
 819 #define smul_ppmm(ph, pl, m0, m1) \
 820   do {                                                                  \
 821     SItype __m0 = (m0), __m1 = (m1);                                    \
 822     __asm__ ("mulhw %0,%1,%2"                                           \
 823              : "=r" ((SItype) ph)                                       \
 824              : "%r" (__m0),                                             \
 825                "r" (__m1));                                             \
 826     (pl) = __m0 * __m1;                                                 \
 827   } while (0)
 828 #define SMUL_TIME 14
 829 #define UDIV_TIME 120
 830 #else
 831 #define umul_ppmm(xh, xl, m0, m1) \
 832   do {                                                                  \
 833     USItype __m0 = (m0), __m1 = (m1);                                   \
 834     __asm__ ("mul %0,%2,%3"                                             \
 835              : "=r" ((USItype)(xh)),                                    \
 836                "=q" ((USItype)(xl))                                     \
 837              : "r" (__m0),                                              \
 838                "r" (__m1));                                             \
 839     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 840              + (((SItype) __m1 >> 31) & __m0));                         \
 841   } while (0)
 842 #define UMUL_TIME 8
 843 #define smul_ppmm(xh, xl, m0, m1) \
 844   __asm__ ("mul %0,%2,%3"                                               \
 845            : "=r" ((SItype)(xh)),                                       \
 846              "=q" ((SItype)(xl))                                        \
 847            : "r" (m0),                                                  \
 848              "r" (m1))
 849 #define SMUL_TIME 4
 850 #define sdiv_qrnnd(q, r, nh, nl, d) \
 851   __asm__ ("div %0,%2,%4"                                               \
 852            : "=r" ((SItype)(q)), "=q" ((SItype)(r))                     \
 853            : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
 854 #define UDIV_TIME 100
 855 #endif
 856 #endif /* Power architecture variants.  */
 857
 858 #if defined (__pyr__) && W_TYPE_SIZE == 32
 859 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 860   __asm__ ("addw        %5,%1
 861         addwc   %3,%0"                                                  \
 862            : "=r" ((USItype)(sh)),                                      \
 863              "=&r" ((USItype)(sl))                                      \
 864            : "%0" ((USItype)(ah)),                                      \
 865              "g" ((USItype)(bh)),                                       \
 866              "%1" ((USItype)(al)),                                      \
 867              "g" ((USItype)(bl)))
 868 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 869   __asm__ ("subw        %5,%1
 870         subwb   %3,%0"                                                  \
 871            : "=r" ((USItype)(sh)),                                      \
 872              "=&r" ((USItype)(sl))                                      \
 873            : "0" ((USItype)(ah)),                                       \
 874              "g" ((USItype)(bh)),                                       \
 875              "1" ((USItype)(al)),                                       \
 876              "g" ((USItype)(bl)))
 877 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
 878 #define umul_ppmm(w1, w0, u, v) \
 879   ({union {UDItype __ll;                                                \
 880            struct {USItype __h, __l;} __i;                              \
 881           } __xx;                                                       \
 882   __asm__ ("movw %1,%R0
 883         uemul %2,%0"                                                    \
 884            : "=&r" (__xx.__ll)                                          \
 885            : "g" ((USItype) (u)),                                       \
 886              "g" ((USItype)(v)));                                       \
 887   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 888 #endif /* __pyr__ */
 889
 890 #if defined (__ibm032__) /* RT/ROMP */  && W_TYPE_SIZE == 32
 891 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 892   __asm__ ("a %1,%5
 893         ae %0,%3"                                                       \
 894            : "=r" ((USItype)(sh)),                                      \
 895              "=&r" ((USItype)(sl))                                      \
 896            : "%0" ((USItype)(ah)),                                      \
 897              "r" ((USItype)(bh)),                                       \
 898              "%1" ((USItype)(al)),                                      \
 899              "r" ((USItype)(bl)))
 900 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 901   __asm__ ("s %1,%5
 902         se %0,%3"                                                       \
 903            : "=r" ((USItype)(sh)),                                      \
 904              "=&r" ((USItype)(sl))                                      \
 905            : "0" ((USItype)(ah)),                                       \
 906              "r" ((USItype)(bh)),                                       \
 907              "1" ((USItype)(al)),                                       \
 908              "r" ((USItype)(bl)))
 909 #define umul_ppmm(ph, pl, m0, m1) \
 910   do {                                                                  \
 911     USItype __m0 = (m0), __m1 = (m1);                                   \
 912     __asm__ (                                                           \
 913        "s       r2,r2
 914         mts     r10,%2
 915         m       r2,%3
 916         m       r2,%3
 917         m       r2,%3
 918         m       r2,%3
 919         m       r2,%3
 920         m       r2,%3
 921         m       r2,%3
 922         m       r2,%3
 923         m       r2,%3
 924         m       r2,%3
 925         m       r2,%3
 926         m       r2,%3
 927         m       r2,%3
 928         m       r2,%3
 929         m       r2,%3
 930         m       r2,%3
 931         cas     %0,r2,r0
 932         mfs     r10,%1"                                                 \
 933              : "=r" ((USItype)(ph)),                                    \
 934                "=r" ((USItype)(pl))                                     \
 935              : "%r" (__m0),                                             \
 936                 "r" (__m1)                                              \
 937              : "r2");                                                   \
 938     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
 939              + (((SItype) __m1 >> 31) & __m0));                         \
 940   } while (0)
 941 #define UMUL_TIME 20
 942 #define UDIV_TIME 200
 943 #define count_leading_zeros(count, x) \
 944   do {                                                                  \
 945     if ((x) >= 0x10000)                                                 \
 946       __asm__ ("clz     %0,%1"                                          \
 947                : "=r" ((USItype)(count))                                \
 948                : "r" ((USItype)(x) >> 16));                             \
 949     else                                                                \
 950       {                                                                 \
 951         __asm__ ("clz   %0,%1"                                          \
 952                  : "=r" ((USItype)(count))                              \
 953                  : "r" ((USItype)(x)));                                 \
 954         (count) += 16;                                                  \
 955       }                                                                 \
 956   } while (0)
 957 #endif /* RT/ROMP */
 958
 959 #if defined (__sh2__) && W_TYPE_SIZE == 32
 960 #define umul_ppmm(w1, w0, u, v) \
 961   __asm__ (                                                             \
 962        "dmulu.l %2,%3
 963         sts     macl,%1
 964         sts     mach,%0"                                                \
 965            : "=r" ((USItype)(w1)),                                      \
 966              "=r" ((USItype)(w0))                                       \
 967            : "r" ((USItype)(u)),                                        \
 968              "r" ((USItype)(v))                                         \
 969            : "macl", "mach")
 970 #define UMUL_TIME 5
 971 #endif
 972
 973 #if defined (__sparc__) && W_TYPE_SIZE == 32
 974 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 975   __asm__ ("addcc %r4,%5,%1
 976         addx %r2,%3,%0"                                                 \
 977            : "=r" ((USItype)(sh)),                                      \
 978              "=&r" ((USItype)(sl))                                      \
 979            : "%rJ" ((USItype)(ah)),                                     \
 980              "rI" ((USItype)(bh)),                                      \
 981              "%rJ" ((USItype)(al)),                                     \
 982              "rI" ((USItype)(bl))                                       \
 983            __CLOBBER_CC)
 984 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 985   __asm__ ("subcc %r4,%5,%1
 986         subx %r2,%3,%0"                                                 \
 987            : "=r" ((USItype)(sh)),                                      \
 988              "=&r" ((USItype)(sl))                                      \
 989            : "rJ" ((USItype)(ah)),                                      \
 990              "rI" ((USItype)(bh)),                                      \
 991              "rJ" ((USItype)(al)),                                      \
 992              "rI" ((USItype)(bl))                                       \
 993            __CLOBBER_CC)
 994 #if defined (__sparc_v8__)
 995 /* Don't match immediate range because, 1) it is not often useful,
 996    2) the 'I' flag thinks of the range as a 13 bit signed interval,
 997    while we want to match a 13 bit interval, sign extended to 32 bits,
 998    but INTERPRETED AS UNSIGNED.  */
 999 #define umul_ppmm(w1, w0, u, v) \
1000   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1001            : "=r" ((USItype)(w1)),                                      \
1002              "=r" ((USItype)(w0))                                       \
1003            : "r" ((USItype)(u)),                                        \
1004              "r" ((USItype)(v)))
1005 #define UMUL_TIME 5
1006 #ifndef SUPERSPARC      /* SuperSPARC's udiv only handles 53 bit dividends */
1007 #define udiv_qrnnd(q, r, n1, n0, d) \
1008   do {                                                                  \
1009     USItype __q;                                                        \
1010     __asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0"                     \
1011              : "=r" ((USItype)(__q))                                    \
1012              : "r" ((USItype)(n1)),                                     \
1013                "r" ((USItype)(n0)),                                     \
1014                "r" ((USItype)(d)));                                     \
1015     (r) = (n0) - __q * (d);                                             \
1016     (q) = __q;                                                          \
1017   } while (0)
1018 #define UDIV_TIME 25
1019 #endif /* SUPERSPARC */
1020 #else /* ! __sparc_v8__ */
1021 #if defined (__sparclite__)
1022 /* This has hardware multiply but not divide.  It also has two additional
1023    instructions scan (ffs from high bit) and divscc.  */
1024 #define umul_ppmm(w1, w0, u, v) \
1025   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1026            : "=r" ((USItype)(w1)),                                      \
1027              "=r" ((USItype)(w0))                                       \
1028            : "r" ((USItype)(u)),                                        \
1029              "r" ((USItype)(v)))
1030 #define UMUL_TIME 5
1031 #define udiv_qrnnd(q, r, n1, n0, d) \
1032   __asm__ ("! Inlined udiv_qrnnd
1033         wr      %%g0,%2,%%y     ! Not a delayed write for sparclite
1034         tst     %%g0
1035         divscc  %3,%4,%%g1
1036         divscc  %%g1,%4,%%g1
1037         divscc  %%g1,%4,%%g1
1038         divscc  %%g1,%4,%%g1
1039         divscc  %%g1,%4,%%g1
1040         divscc  %%g1,%4,%%g1
1041         divscc  %%g1,%4,%%g1
1042         divscc  %%g1,%4,%%g1
1043         divscc  %%g1,%4,%%g1
1044         divscc  %%g1,%4,%%g1
1045         divscc  %%g1,%4,%%g1
1046         divscc  %%g1,%4,%%g1
1047         divscc  %%g1,%4,%%g1
1048         divscc  %%g1,%4,%%g1
1049         divscc  %%g1,%4,%%g1
1050         divscc  %%g1,%4,%%g1
1051         divscc  %%g1,%4,%%g1
1052         divscc  %%g1,%4,%%g1
1053         divscc  %%g1,%4,%%g1
1054         divscc  %%g1,%4,%%g1
1055         divscc  %%g1,%4,%%g1
1056         divscc  %%g1,%4,%%g1
1057         divscc  %%g1,%4,%%g1
1058         divscc  %%g1,%4,%%g1
1059         divscc  %%g1,%4,%%g1
1060         divscc  %%g1,%4,%%g1
1061         divscc  %%g1,%4,%%g1
1062         divscc  %%g1,%4,%%g1
1063         divscc  %%g1,%4,%%g1
1064         divscc  %%g1,%4,%%g1
1065         divscc  %%g1,%4,%%g1
1066         divscc  %%g1,%4,%0
1067         rd      %%y,%1
1068         bl,a 1f
1069         add     %1,%4,%1
1070 1:      ! End of inline udiv_qrnnd"                                     \
1071            : "=r" ((USItype)(q)),                                       \
1072              "=r" ((USItype)(r))                                        \
1073            : "r" ((USItype)(n1)),                                       \
1074              "r" ((USItype)(n0)),                                       \
1075              "rI" ((USItype)(d))                                        \
1076            : "%g1" __AND_CLOBBER_CC)
1077 #define UDIV_TIME 37
1078 #define count_leading_zeros(count, x) \
1079   __asm__ ("scan %1,0,%0"                                               \
1080            : "=r" ((USItype)(x))                                        \
1081            : "r" ((USItype)(count)))
1082 /* Early sparclites return 63 for an argument of 0, but they warn that future
1083    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1084    undefined.  */
1085 #endif /* __sparclite__ */
1086 #endif /* __sparc_v8__ */
1087 /* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd.  */
1088 #ifndef umul_ppmm
1089 #define umul_ppmm(w1, w0, u, v) \
1090   __asm__ ("! Inlined umul_ppmm
1091         wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr
1092         sra     %3,31,%%g2      ! Don't move this insn
1093         and     %2,%%g2,%%g2    ! Don't move this insn
1094         andcc   %%g0,0,%%g1     ! Don't move this insn
1095         mulscc  %%g1,%3,%%g1
1096         mulscc  %%g1,%3,%%g1
1097         mulscc  %%g1,%3,%%g1
1098         mulscc  %%g1,%3,%%g1
1099         mulscc  %%g1,%3,%%g1
1100         mulscc  %%g1,%3,%%g1
1101         mulscc  %%g1,%3,%%g1
1102         mulscc  %%g1,%3,%%g1
1103         mulscc  %%g1,%3,%%g1
1104         mulscc  %%g1,%3,%%g1
1105         mulscc  %%g1,%3,%%g1
1106         mulscc  %%g1,%3,%%g1
1107         mulscc  %%g1,%3,%%g1
1108         mulscc  %%g1,%3,%%g1
1109         mulscc  %%g1,%3,%%g1
1110         mulscc  %%g1,%3,%%g1
1111         mulscc  %%g1,%3,%%g1
1112         mulscc  %%g1,%3,%%g1
1113         mulscc  %%g1,%3,%%g1
1114         mulscc  %%g1,%3,%%g1
1115         mulscc  %%g1,%3,%%g1
1116         mulscc  %%g1,%3,%%g1
1117         mulscc  %%g1,%3,%%g1
1118         mulscc  %%g1,%3,%%g1
1119         mulscc  %%g1,%3,%%g1
1120         mulscc  %%g1,%3,%%g1
1121         mulscc  %%g1,%3,%%g1
1122         mulscc  %%g1,%3,%%g1
1123         mulscc  %%g1,%3,%%g1
1124         mulscc  %%g1,%3,%%g1
1125         mulscc  %%g1,%3,%%g1
1126         mulscc  %%g1,%3,%%g1
1127         mulscc  %%g1,0,%%g1
1128         add     %%g1,%%g2,%0
1129         rd      %%y,%1"                                                 \
1130            : "=r" ((USItype)(w1)),                                      \
1131              "=r" ((USItype)(w0))                                       \
1132            : "%rI" ((USItype)(u)),                                      \
1133              "r" ((USItype)(v))                                         \
1134            : "%g1", "%g2" __AND_CLOBBER_CC)
1135 #define UMUL_TIME 39            /* 39 instructions */
1136 #endif
1137 #ifndef udiv_qrnnd
1138 /* It's quite necessary to add this much assembler for the sparc.
1139    The default udiv_qrnnd (in C) is more than 10 times slower!  */
1140 #define udiv_qrnnd(q, r, n1, n0, d) \
1141   __asm__ ("! Inlined udiv_qrnnd
1142         mov     32,%%g1
1143         subcc   %1,%2,%%g0
1144 1:      bcs     5f
1145          addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb
1146         sub     %1,%2,%1        ! this kills msb of n
1147         addx    %1,%1,%1        ! so this can't give carry
1148         subcc   %%g1,1,%%g1
1149 2:      bne     1b
1150          subcc  %1,%2,%%g0
1151         bcs     3f
1152          addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb
1153         b       3f
1154          sub    %1,%2,%1        ! this kills msb of n
1155 4:      sub     %1,%2,%1
1156 5:      addxcc  %1,%1,%1
1157         bcc     2b
1158          subcc  %%g1,1,%%g1
1159 ! Got carry from n.  Subtract next step to cancel this carry.
1160         bne     4b
1161          addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb
1162         sub     %1,%2,%1
1163 3:      xnor    %0,0,%0
1164         ! End of inline udiv_qrnnd"                                     \
1165            : "=&r" ((USItype)(q)),                                      \
1166              "=&r" ((USItype)(r))                                       \
1167            : "r" ((USItype)(d)),                                        \
1168              "1" ((USItype)(n1)),                                       \
1169              "0" ((USItype)(n0)) : "%g1" __AND_CLOBBER_CC)
1170 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations. */
1171 #else
1172 extern USItype __udiv_qrnnd __P ((USItype *, USItype, USItype, USItype));
1173 #define UDIV_TIME 140
1174 #endif /* udiv_qrnnd */
1175 #endif /* __sparc__ */
1176
1177 #if (defined (__sparc_v9__) || (defined (__sparc__) && defined (__arch64__)) \
1178     || defined (__sparcv9)) && W_TYPE_SIZE == 64
1179 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1180   __asm__ ("addcc %4,%5,%1
1181             add %2,%3,%0
1182             bcs,a,pn %%xcc, 1f
1183             add %0, 1, %0
1184             1:"                                                         \
1185            : "=r" ((UDItype)(sh)),                                      \
1186              "=&r" ((UDItype)(sl))                                      \
1187            : "r" ((UDItype)(ah)),                                       \
1188              "r" ((UDItype)(bh)),                                       \
1189              "r" ((UDItype)(al)),                                       \
1190              "r" ((UDItype)(bl))                                        \
1191            : "cc")
1192
1193 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1194   __asm__ ("subcc %4,%5,%1
1195             sub %2,%3,%0
1196             bcs,a,pn %%xcc, 1f
1197             sub %0, 1, %0
1198             1:"                                                         \
1199            : "=r" ((UDItype)(sh)),                                      \
1200              "=&r" ((UDItype)(sl))                                      \
1201            : "r" ((UDItype)(ah)),                                       \
1202              "r" ((UDItype)(bh)),                                       \
1203              "r" ((UDItype)(al)),                                       \
1204              "r" ((UDItype)(bl))                                        \
1205            : "cc")
1206
1207 #define umul_ppmm(wh, wl, u, v)                                         \
1208   do {                                                                  \
1209           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1210           __asm__ __volatile__ (                                        \
1211                    "srl %7,0,%3
1212                     mulx %3,%6,%1
1213                     srlx %6,32,%2
1214                     mulx %2,%3,%4
1215                     sllx %4,32,%5
1216                     srl %6,0,%3
1217                     sub %1,%5,%5
1218                     srlx %5,32,%5
1219                     addcc %4,%5,%4
1220                     srlx %7,32,%5
1221                     mulx %3,%5,%3
1222                     mulx %2,%5,%5
1223                     sethi 0x80000000,%2
1224                     addcc %4,%3,%4
1225                     srlx %4,32,%4
1226                     add %2,%2,%2
1227                     movcc %%xcc,%%g0,%2
1228                     addcc %5,%4,%5
1229                     sllx %3,32,%3
1230                     add %1,%3,%1
1231                     add %5,%2,%0"                                       \
1232            : "=r" ((UDItype)(wh)),                                      \
1233              "=&r" ((UDItype)(wl)),                                     \
1234              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1235            : "r" ((UDItype)(u)),                                        \
1236              "r" ((UDItype)(v))                                         \
1237            : "cc");                                                     \
1238   } while (0)
1239 #define UMUL_TIME 96
1240 #endif /* __sparc_v9__ */
1241
1242 #if defined (__vax__) && W_TYPE_SIZE == 32
1243 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1244   __asm__ ("addl2 %5,%1
1245         adwc %3,%0"                                                     \
1246            : "=g" ((USItype)(sh)),                                      \
1247              "=&g" ((USItype)(sl))                                      \
1248            : "%0" ((USItype)(ah)),                                      \
1249              "g" ((USItype)(bh)),                                       \
1250              "%1" ((USItype)(al)),                                      \
1251              "g" ((USItype)(bl)))
1252 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1253   __asm__ ("subl2 %5,%1
1254         sbwc %3,%0"                                                     \
1255            : "=g" ((USItype)(sh)),                                      \
1256              "=&g" ((USItype)(sl))                                      \
1257            : "0" ((USItype)(ah)),                                       \
1258              "g" ((USItype)(bh)),                                       \
1259              "1" ((USItype)(al)),                                       \
1260              "g" ((USItype)(bl)))
1261 #define umul_ppmm(xh, xl, m0, m1) \
1262   do {                                                                  \
1263     union {UDItype __ll;                                                \
1264            struct {USItype __l, __h;} __i;                              \
1265           } __xx;                                                       \
1266     USItype __m0 = (m0), __m1 = (m1);                                   \
1267     __asm__ ("emul %1,%2,$0,%0"                                         \
1268              : "=g" (__xx.__ll)                                         \
1269              : "g" (__m0),                                              \
1270                "g" (__m1));                                             \
1271     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1272     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1273              + (((SItype) __m1 >> 31) & __m0));                         \
1274   } while (0)
1275 #define sdiv_qrnnd(q, r, n1, n0, d) \
1276   do {                                                                  \
1277     union {DItype __ll;                                                 \
1278            struct {SItype __l, __h;} __i;                               \
1279           } __xx;                                                       \
1280     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1281     __asm__ ("ediv %3,%2,%0,%1"                                         \
1282              : "=g" (q), "=g" (r)                                       \
1283              : "g" (__xx.ll), "g" (d));                                 \
1284   } while (0)
1285 #endif /* __vax__ */
1286
1287 #if defined (__z8000__) && W_TYPE_SIZE == 16
1288 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1289   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1290            : "=r" ((unsigned int)(sh)),                                 \
1291              "=&r" ((unsigned int)(sl))                                 \
1292            : "%0" ((unsigned int)(ah)),                                 \
1293              "r" ((unsigned int)(bh)),                                  \
1294              "%1" ((unsigned int)(al)),                                 \
1295              "rQR" ((unsigned int)(bl)))
1296 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1297   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1298            : "=r" ((unsigned int)(sh)),                                 \
1299              "=&r" ((unsigned int)(sl))                                 \
1300            : "0" ((unsigned int)(ah)),                                  \
1301              "r" ((unsigned int)(bh)),                                  \
1302              "1" ((unsigned int)(al)),                                  \
1303              "rQR" ((unsigned int)(bl)))
1304 #define umul_ppmm(xh, xl, m0, m1) \
1305   do {                                                                  \
1306     union {long int __ll;                                               \
1307            struct {unsigned int __h, __l;} __i;                         \
1308           } __xx;                                                       \
1309     unsigned int __m0 = (m0), __m1 = (m1);                              \
1310     __asm__ ("mult      %S0,%H3"                                        \
1311              : "=r" (__xx.__i.__h),                                     \
1312                "=r" (__xx.__i.__l)                                      \
1313              : "%1" (__m0),                                             \
1314                "rQR" (__m1));                                           \
1315     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1316     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1317              + (((signed int) __m1 >> 15) & __m0));                     \
1318   } while (0)
1319 #endif /* __z8000__ */
1320
1321 #endif /* __GNUC__ */
1322
1323
1324 #if !defined (umul_ppmm) && defined (__umulsidi3)
1325 #define umul_ppmm(ph, pl, m0, m1) \
1326   {                                                                     \
1327     UDWtype __ll = __umulsidi3 (m0, m1);                                \
1328     ph = (UWtype) (__ll >> W_TYPE_SIZE);                                \
1329     pl = (UWtype) __ll;                                                 \
1330   }
1331 #endif
1332
1333 #if !defined (__umulsidi3)
1334 #define __umulsidi3(u, v) \
1335   ({UWtype __hi, __lo;                                                  \
1336     umul_ppmm (__hi, __lo, u, v);                                       \
1337     ((UDWtype) __hi << W_TYPE_SIZE) | __lo; })
1338 #endif
1339
1340 /* If this machine has no inline assembler, use C macros.  */
1341
1342 #if !defined (add_ssaaaa)
1343 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1344   do {                                                                  \
1345     UWtype __x;                                                         \
1346     __x = (al) + (bl);                                                  \
1347     (sh) = (ah) + (bh) + (__x < (al));                                  \
1348     (sl) = __x;                                                         \
1349   } while (0)
1350 #endif
1351
1352 #if !defined (sub_ddmmss)
1353 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1354   do {                                                                  \
1355     UWtype __x;                                                         \
1356     __x = (al) - (bl);                                                  \
1357     (sh) = (ah) - (bh) - (__x > (al));                                  \
1358     (sl) = __x;                                                         \
1359   } while (0)
1360 #endif
1361
1362 #if !defined (umul_ppmm)
1363 #define umul_ppmm(w1, w0, u, v)                                         \
1364   do {                                                                  \
1365     UWtype __x0, __x1, __x2, __x3;                                      \
1366     UHWtype __ul, __vl, __uh, __vh;                                     \
1367     UWtype __u = (u), __v = (v);                                        \
1368                                                                         \
1369     __ul = __ll_lowpart (__u);                                          \
1370     __uh = __ll_highpart (__u);                                         \
1371     __vl = __ll_lowpart (__v);                                          \
1372     __vh = __ll_highpart (__v);                                         \
1373                                                                         \
1374     __x0 = (UWtype) __ul * __vl;                                        \
1375     __x1 = (UWtype) __ul * __vh;                                        \
1376     __x2 = (UWtype) __uh * __vl;                                        \
1377     __x3 = (UWtype) __uh * __vh;                                        \
1378                                                                         \
1379     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1380     __x1 += __x2;               /* but this indeed can */               \
1381     if (__x1 < __x2)            /* did we get it? */                    \
1382       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1383                                                                         \
1384     (w1) = __x3 + __ll_highpart (__x1);                                 \
1385     (w0) = (__ll_lowpart (__x1) << W_TYPE_SIZE/2) + __ll_lowpart (__x0);\
1386   } while (0)
1387 #endif
1388
1389 #if !defined (umul_ppmm)
1390 #define smul_ppmm(w1, w0, u, v)                                         \
1391   do {                                                                  \
1392     UWtype __w1;                                                        \
1393     UWtype __m0 = (u), __m1 = (v);                                      \
1394     umul_ppmm (__w1, w0, __m0, __m1);                                   \
1395     (w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1)                 \
1396                 - (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0);                \
1397   } while (0)
1398 #endif
1399
1400 /* Define this unconditionally, so it can be used for debugging.  */
1401 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1402   do {                                                                  \
1403     UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m;                     \
1404     __d1 = __ll_highpart (d);                                           \
1405     __d0 = __ll_lowpart (d);                                            \
1406                                                                         \
1407     __r1 = (n1) % __d1;                                                 \
1408     __q1 = (n1) / __d1;                                                 \
1409     __m = (UWtype) __q1 * __d0;                                         \
1410     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1411     if (__r1 < __m)                                                     \
1412       {                                                                 \
1413         __q1--, __r1 += (d);                                            \
1414         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1415           if (__r1 < __m)                                               \
1416             __q1--, __r1 += (d);                                        \
1417       }                                                                 \
1418     __r1 -= __m;                                                        \
1419                                                                         \
1420     __r0 = __r1 % __d1;                                                 \
1421     __q0 = __r1 / __d1;                                                 \
1422     __m = (UWtype) __q0 * __d0;                                         \
1423     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1424     if (__r0 < __m)                                                     \
1425       {                                                                 \
1426         __q0--, __r0 += (d);                                            \
1427         if (__r0 >= (d))                                                \
1428           if (__r0 < __m)                                               \
1429             __q0--, __r0 += (d);                                        \
1430       }                                                                 \
1431     __r0 -= __m;                                                        \
1432                                                                         \
1433     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1434     (r) = __r0;                                                         \
1435   } while (0)
1436
1437 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1438    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1439 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1440 #define udiv_qrnnd(q, r, nh, nl, d) \
1441   do {                                                                  \
1442     UWtype __r;                                                         \
1443     (q) = __MPN(udiv_w_sdiv) (&__r, nh, nl, d);                         \
1444     (r) = __r;                                                          \
1445   } while (0)
1446 #endif
1447
1448 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1449 #if !defined (udiv_qrnnd)
1450 #define UDIV_NEEDS_NORMALIZATION 1
1451 #define udiv_qrnnd __udiv_qrnnd_c
1452 #endif
1453
1454 #if !defined (count_leading_zeros)
1455 extern
1456 #ifdef __STDC__
1457 const
1458 #endif
1459 unsigned char __clz_tab[];
1460 #define count_leading_zeros(count, x) \
1461   do {                                                                  \
1462     UWtype __xr = (x);                                                  \
1463     UWtype __a;                                                         \
1464                                                                         \
1465     if (W_TYPE_SIZE <= 32)                                              \
1466       {                                                                 \
1467         __a = __xr < ((UWtype) 1 << 2*__BITS4)                          \
1468           ? (__xr < ((UWtype) 1 << __BITS4) ? 0 : __BITS4)              \
1469           : (__xr < ((UWtype) 1 << 3*__BITS4) ?  2*__BITS4 : 3*__BITS4);\
1470       }                                                                 \
1471     else                                                                \
1472       {                                                                 \
1473         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1474           if (((__xr >> __a) & 0xff) != 0)                              \
1475             break;                                                      \
1476       }                                                                 \
1477                                                                         \
1478     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1479   } while (0)
1480 /* This version gives a well-defined value for zero. */
1481 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1482 #endif
1483
1484 #if !defined (count_trailing_zeros)
1485 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1486    defined in asm, but if it is not, the C version above is good enough.  */
1487 #define count_trailing_zeros(count, x) \
1488   do {                                                                  \
1489     UWtype __ctz_x = (x);                                               \
1490     UWtype __ctz_c;                                                     \
1491     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1492     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1493   } while (0)
1494 #endif
1495
1496 #ifndef UDIV_NEEDS_NORMALIZATION
1497 #define UDIV_NEEDS_NORMALIZATION 0
1498 #endif