stdlib/longlong.h

   1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
   2    Copyright (C) 1991,92,94,95,96,97,98,99,2000,2001 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Lesser General Public
   7    License as published by the Free Software Foundation; either
   8    version 2.1 of the License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Lesser General Public License for more details.
  14
  15    You should have received a copy of the GNU Lesser General Public
  16    License along with the GNU C Library; if not, write to the Free
  17    Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  18    02111-1307 USA.  */
  19
  20 /* You have to define the following before including this file:
  21
  22    UWtype -- An unsigned type, default type for operations (typically a "word")
  23    UHWtype -- An unsigned type, at least half the size of UWtype.
  24    UDWtype -- An unsigned type, at least twice as large a UWtype
  25    W_TYPE_SIZE -- size in bits of UWtype
  26
  27    UQItype -- Unsigned 8 bit type.
  28    SItype, USItype -- Signed and unsigned 32 bit types.
  29    DItype, UDItype -- Signed and unsigned 64 bit types.
  30
  31    On a 32 bit machine UWtype should typically be USItype;
  32    on a 64 bit machine, UWtype should typically be UDItype.
  33 */
  34
  35 #define __BITS4 (W_TYPE_SIZE / 4)
  36 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  37 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  38 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  39
  40 #ifndef W_TYPE_SIZE
  41 #define W_TYPE_SIZE     32
  42 #define UWtype          USItype
  43 #define UHWtype         USItype
  44 #define UDWtype         UDItype
  45 #endif
  46
  47 /* Define auxiliary asm macros.
  48
  49    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
  50    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
  51    word product in HIGH_PROD and LOW_PROD.
  52
  53    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  54    UDWtype product.  This is just a variant of umul_ppmm.
  55
  56    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  57    denominator) divides a UDWtype, composed by the UWtype integers
  58    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  59    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
  60    than DENOMINATOR for correct operation.  If, in addition, the most
  61    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  62    UDIV_NEEDS_NORMALIZATION is defined to 1.
  63
  64    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  65    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
  66    is rounded towards 0.
  67
  68    5) count_leading_zeros(count, x) counts the number of zero-bits from the
  69    msb to the first non-zero bit in the UWtype X.  This is the number of
  70    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
  71    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  72
  73    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  74    from the least significant end.
  75
  76    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  77    high_addend_2, low_addend_2) adds two UWtype integers, composed by
  78    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  79    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  80    (i.e. carry out) is not stored anywhere, and is lost.
  81
  82    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  83    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  84    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  85    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
  86    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  87    and is lost.
  88
  89    If any of these macros are left undefined for a particular CPU,
  90    C macros are used.  */
  91
  92 /* The CPUs come in alphabetical order below.
  93
  94    Please add support for more CPUs here, or improve the current support
  95    for the CPUs below!
  96    (E.g. WE32100, IBM360.)  */
  97
  98 #if defined (__GNUC__) && !defined (NO_ASM)
  99
 100 /* We sometimes need to clobber "cc" with gcc2, but that would not be
 101    understood by gcc1.  Use cpp to avoid major code duplication.  */
 102 #if __GNUC__ < 2
 103 #define __CLOBBER_CC
 104 #define __AND_CLOBBER_CC
 105 #else /* __GNUC__ >= 2 */
 106 #define __CLOBBER_CC : "cc"
 107 #define __AND_CLOBBER_CC , "cc"
 108 #endif /* __GNUC__ < 2 */
 109
 110 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
 111 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 112   __asm__ ("add %1,%4,%5\n"                                             \
 113         "addc %0,%2,%3"                                                 \
 114            : "=r" ((USItype) (sh)),                                     \
 115             "=&r" ((USItype) (sl))                                      \
 116            : "%r" ((USItype) (ah)),                                     \
 117              "rI" ((USItype) (bh)),                                     \
 118              "%r" ((USItype) (al)),                                     \
 119              "rI" ((USItype) (bl)))
 120 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 121   __asm__ ("sub %1,%4,%5\n"                                             \
 122         "subc %0,%2,%3"                                                 \
 123            : "=r" ((USItype) (sh)),                                     \
 124              "=&r" ((USItype) (sl))                                     \
 125            : "r" ((USItype) (ah)),                                      \
 126              "rI" ((USItype) (bh)),                                     \
 127              "r" ((USItype) (al)),                                      \
 128              "rI" ((USItype) (bl)))
 129 #define umul_ppmm(xh, xl, m0, m1) \
 130   do {                                                                  \
 131     USItype __m0 = (m0), __m1 = (m1);                                   \
 132     __asm__ ("multiplu %0,%1,%2"                                        \
 133              : "=r" ((USItype) (xl))                                    \
 134              : "r" (__m0),                                              \
 135                "r" (__m1));                                             \
 136     __asm__ ("multmu %0,%1,%2"                                          \
 137              : "=r" ((USItype) (xh))                                    \
 138              : "r" (__m0),                                              \
 139                "r" (__m1));                                             \
 140   } while (0)
 141 #define udiv_qrnnd(q, r, n1, n0, d) \
 142   __asm__ ("dividu %0,%3,%4"                                            \
 143            : "=r" ((USItype) (q)),                                      \
 144              "=q" ((USItype) (r))                                       \
 145            : "1" ((USItype) (n1)),                                      \
 146              "r" ((USItype) (n0)),                                      \
 147              "r" ((USItype) (d)))
 148 #define count_leading_zeros(count, x) \
 149     __asm__ ("clz %0,%1"                                                \
 150              : "=r" ((USItype) (count))                                 \
 151              : "r" ((USItype) (x)))
 152 #define COUNT_LEADING_ZEROS_0 32
 153 #endif /* __a29k__ */
 154
 155 #if defined (__alpha) && W_TYPE_SIZE == 64
 156 #define umul_ppmm(ph, pl, m0, m1) \
 157   do {                                                                  \
 158     UDItype __m0 = (m0), __m1 = (m1);                                   \
 159     __asm__ ("umulh %r1,%2,%0"                                          \
 160              : "=r" ((UDItype) ph)                                      \
 161              : "%rJ" (__m0),                                            \
 162                "rI" (__m1));                                            \
 163     (pl) = __m0 * __m1;                                                 \
 164   } while (0)
 165 #define UMUL_TIME 46
 166 #ifndef LONGLONG_STANDALONE
 167 #define udiv_qrnnd(q, r, n1, n0, d) \
 168   do { UDItype __r;                                                     \
 169     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 170     (r) = __r;                                                          \
 171   } while (0)
 172 extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
 173 #define UDIV_TIME 220
 174 #endif /* LONGLONG_STANDALONE */
 175 #endif /* __alpha */
 176
 177 #if defined (__arc__) && W_TYPE_SIZE == 32
 178 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 179   __asm__ ("add.f       %1, %4, %5\n"                                   \
 180         "adc    %0, %2, %3"                                             \
 181            : "=r" ((USItype) (sh)),                                     \
 182              "=&r" ((USItype) (sl))                                     \
 183            : "%r" ((USItype) (ah)),                                     \
 184              "rIJ" ((USItype) (bh)),                                    \
 185              "%r" ((USItype) (al)),                                     \
 186              "rIJ" ((USItype) (bl)))
 187 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 188   __asm__ ("sub.f       %1, %4, %5\n"                                   \
 189         "sbc    %0, %2, %3"                                             \
 190            : "=r" ((USItype) (sh)),                                     \
 191              "=&r" ((USItype) (sl))                                     \
 192            : "r" ((USItype) (ah)),                                      \
 193              "rIJ" ((USItype) (bh)),                                    \
 194              "r" ((USItype) (al)),                                      \
 195              "rIJ" ((USItype) (bl)))
 196 /* Call libgcc1 routine.  */
 197 #define umul_ppmm(w1, w0, u, v) \
 198 do {                                                                    \
 199   DIunion __w;                                                          \
 200   __w.ll = __umulsidi3 (u, v);                                          \
 201   w1 = __w.s.high;                                                      \
 202   w0 = __w.s.low;                                                       \
 203 } while (0)
 204 #define __umulsidi3 __umulsidi3
 205 UDItype __umulsidi3 (USItype, USItype);
 206 #endif
 207
 208 #if defined (__arm__) && W_TYPE_SIZE == 32
 209 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 210   __asm__ ("adds        %1, %4, %5\n"                                   \
 211         "adc    %0, %2, %3"                                             \
 212            : "=r" ((USItype) (sh)),                                     \
 213              "=&r" ((USItype) (sl))                                     \
 214            : "%r" ((USItype) (ah)),                                     \
 215              "rI" ((USItype) (bh)),                                     \
 216              "%r" ((USItype) (al)),                                     \
 217              "rI" ((USItype) (bl)))
 218 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 219   __asm__ ("subs        %1, %4, %5\n"                                   \
 220         "sbc    %0, %2, %3"                                             \
 221            : "=r" ((USItype) (sh)),                                     \
 222              "=&r" ((USItype) (sl))                                     \
 223            : "r" ((USItype) (ah)),                                      \
 224              "rI" ((USItype) (bh)),                                     \
 225              "r" ((USItype) (al)),                                      \
 226              "rI" ((USItype) (bl)))
 227 #define umul_ppmm(xh, xl, a, b) \
 228 {register USItype __t0, __t1, __t2;                                     \
 229   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
 230         "mov    %2, %5, lsr #16\n"                                      \
 231         "mov    %0, %6, lsr #16\n"                                      \
 232         "bic    %3, %5, %2, lsl #16\n"                                  \
 233         "bic    %4, %6, %0, lsl #16\n"                                  \
 234         "mul    %1, %3, %4\n"                                           \
 235         "mul    %4, %2, %4\n"                                           \
 236         "mul    %3, %0, %3\n"                                           \
 237         "mul    %0, %2, %0\n"                                           \
 238         "adds   %3, %4, %3\n"                                           \
 239         "addcs  %0, %0, #65536\n"                                       \
 240         "adds   %1, %1, %3, lsl #16\n"                                  \
 241         "adc    %0, %0, %3, lsr #16"                                    \
 242            : "=&r" ((USItype) (xh)),                                    \
 243              "=r" ((USItype) (xl)),                                     \
 244              "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
 245            : "r" ((USItype) (a)),                                       \
 246              "r" ((USItype) (b)));}
 247 #define UMUL_TIME 20
 248 #define UDIV_TIME 100
 249 #endif /* __arm__ */
 250
 251 #if defined (__clipper__) && W_TYPE_SIZE == 32
 252 #define umul_ppmm(w1, w0, u, v) \
 253   ({union {UDItype __ll;                                                \
 254            struct {USItype __l, __h;} __i;                              \
 255           } __xx;                                                       \
 256   __asm__ ("mulwux %2,%0"                                               \
 257            : "=r" (__xx.__ll)                                           \
 258            : "%0" ((USItype) (u)),                                      \
 259              "r" ((USItype) (v)));                                      \
 260   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 261 #define smul_ppmm(w1, w0, u, v) \
 262   ({union {DItype __ll;                                                 \
 263            struct {SItype __l, __h;} __i;                               \
 264           } __xx;                                                       \
 265   __asm__ ("mulwx %2,%0"                                                \
 266            : "=r" (__xx.__ll)                                           \
 267            : "%0" ((SItype) (u)),                                       \
 268              "r" ((SItype) (v)));                                       \
 269   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 270 #define __umulsidi3(u, v) \
 271   ({UDItype __w;                                                        \
 272     __asm__ ("mulwux %2,%0"                                             \
 273              : "=r" (__w)                                               \
 274              : "%0" ((USItype) (u)),                                    \
 275                "r" ((USItype) (v)));                                    \
 276     __w; })
 277 #endif /* __clipper__ */
 278
 279 #if defined (__gmicro__) && W_TYPE_SIZE == 32
 280 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 281   __asm__ ("add.w %5,%1\n"                                              \
 282         "addx %3,%0"                                                    \
 283            : "=g" ((USItype) (sh)),                                     \
 284              "=&g" ((USItype) (sl))                                     \
 285            : "%0" ((USItype) (ah)),                                     \
 286              "g" ((USItype) (bh)),                                      \
 287              "%1" ((USItype) (al)),                                     \
 288              "g" ((USItype) (bl)))
 289 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 290   __asm__ ("sub.w %5,%1\n"                                              \
 291         "subx %3,%0"                                                    \
 292            : "=g" ((USItype) (sh)),                                     \
 293              "=&g" ((USItype) (sl))                                     \
 294            : "0" ((USItype) (ah)),                                      \
 295              "g" ((USItype) (bh)),                                      \
 296              "1" ((USItype) (al)),                                      \
 297              "g" ((USItype) (bl)))
 298 #define umul_ppmm(ph, pl, m0, m1) \
 299   __asm__ ("mulx %3,%0,%1"                                              \
 300            : "=g" ((USItype) (ph)),                                     \
 301              "=r" ((USItype) (pl))                                      \
 302            : "%0" ((USItype) (m0)),                                     \
 303              "g" ((USItype) (m1)))
 304 #define udiv_qrnnd(q, r, nh, nl, d) \
 305   __asm__ ("divx %4,%0,%1"                                              \
 306            : "=g" ((USItype) (q)),                                      \
 307              "=r" ((USItype) (r))                                       \
 308            : "1" ((USItype) (nh)),                                      \
 309              "0" ((USItype) (nl)),                                      \
 310              "g" ((USItype) (d)))
 311 #define count_leading_zeros(count, x) \
 312   __asm__ ("bsch/1 %1,%0"                                               \
 313            : "=g" (count)                                               \
 314            : "g" ((USItype) (x)),                                       \
 315              "0" ((USItype) 0))
 316 #endif
 317
 318 #if defined (__hppa) && W_TYPE_SIZE == 32
 319 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 320   __asm__ ("add %4,%5,%1\n"                                             \
 321         "addc %2,%3,%0"                                                 \
 322            : "=r" ((USItype) (sh)),                                     \
 323              "=&r" ((USItype) (sl))                                     \
 324            : "%rM" ((USItype) (ah)),                                    \
 325              "rM" ((USItype) (bh)),                                     \
 326              "%rM" ((USItype) (al)),                                    \
 327              "rM" ((USItype) (bl)))
 328 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 329   __asm__ ("sub %4,%5,%1\n"                                             \
 330         "subb %2,%3,%0"                                                 \
 331            : "=r" ((USItype) (sh)),                                     \
 332              "=&r" ((USItype) (sl))                                     \
 333            : "rM" ((USItype) (ah)),                                     \
 334              "rM" ((USItype) (bh)),                                     \
 335              "rM" ((USItype) (al)),                                     \
 336              "rM" ((USItype) (bl)))
 337 #if defined (_PA_RISC1_1)
 338 #define umul_ppmm(w1, w0, u, v) \
 339   do {                                                                  \
 340     union                                                               \
 341       {                                                                 \
 342         UDItype __f;                                                    \
 343         struct {USItype __w1, __w0;} __w1w0;                            \
 344       } __t;                                                            \
 345     __asm__ ("xmpyu %1,%2,%0"                                           \
 346              : "=x" (__t.__f)                                           \
 347              : "x" ((USItype) (u)),                                     \
 348                "x" ((USItype) (v)));                                    \
 349     (w1) = __t.__w1w0.__w1;                                             \
 350     (w0) = __t.__w1w0.__w0;                                             \
 351      } while (0)
 352 #define UMUL_TIME 8
 353 #else
 354 #define UMUL_TIME 30
 355 #endif
 356 #define UDIV_TIME 40
 357 #define count_leading_zeros(count, x) \
 358   do {                                                                          \
 359     USItype __tmp;                                                              \
 360     __asm__ (                                                                   \
 361         "ldi            1,%0\n"                                                 \
 362         "extru,=        %1,15,16,%%r0           ; Bits 31..16 zero?\n"          \
 363         "extru,tr       %1,15,16,%1             ; No.  Shift down, skip add.\n" \
 364         "ldo            16(%0),%0               ; Yes.  Perform add.\n"         \
 365         "extru,=        %1,23,8,%%r0            ; Bits 15..8 zero?\n"           \
 366         "extru,tr       %1,23,8,%1              ; No.  Shift down, skip add.\n" \
 367         "ldo            8(%0),%0                ; Yes.  Perform add.\n"         \
 368         "extru,=        %1,27,4,%%r0            ; Bits 7..4 zero?\n"            \
 369         "extru,tr       %1,27,4,%1              ; No.  Shift down, skip add.\n" \
 370         "ldo            4(%0),%0                ; Yes.  Perform add.\n"         \
 371         "extru,=        %1,29,2,%%r0            ; Bits 3..2 zero?\n"            \
 372         "extru,tr       %1,29,2,%1              ; No.  Shift down, skip add.\n" \
 373         "ldo            2(%0),%0                ; Yes.  Perform add.\n"         \
 374         "extru          %1,30,1,%1              ; Extract bit 1.\n"             \
 375         "sub            %0,%1,%0                ; Subtract it."                 \
 376         : "=r" (count), "=r" (__tmp) : "1" (x));                                \
 377   } while (0)
 378 #endif
 379
 380 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
 381 #define umul_ppmm(xh, xl, m0, m1) \
 382   do {                                                                  \
 383     union {UDItype __ll;                                                \
 384            struct {USItype __h, __l;} __i;                              \
 385           } __xx;                                                       \
 386     USItype __m0 = (m0), __m1 = (m1);                                   \
 387     __asm__ ("mr %0,%3"                                                 \
 388              : "=r" (__xx.__i.__h),                                     \
 389                "=r" (__xx.__i.__l)                                      \
 390              : "%1" (__m0),                                             \
 391                "r" (__m1));                                             \
 392     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 393     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 394              + (((SItype) __m1 >> 31) & __m0));                         \
 395   } while (0)
 396 #define smul_ppmm(xh, xl, m0, m1) \
 397   do {                                                                  \
 398     union {DItype __ll;                                                 \
 399            struct {USItype __h, __l;} __i;                              \
 400           } __xx;                                                       \
 401     __asm__ ("mr %0,%3"                                                 \
 402              : "=r" (__xx.__i.__h),                                     \
 403                "=r" (__xx.__i.__l)                                      \
 404              : "%1" (m0),                                               \
 405                "r" (m1));                                               \
 406     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 407   } while (0)
 408 #define sdiv_qrnnd(q, r, n1, n0, d) \
 409   do {                                                                  \
 410     union {DItype __ll;                                                 \
 411            struct {USItype __h, __l;} __i;                              \
 412           } __xx;                                                       \
 413     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
 414     __asm__ ("dr %0,%2"                                                 \
 415              : "=r" (__xx.__ll)                                         \
 416              : "0" (__xx.__ll), "r" (d));                               \
 417     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
 418   } while (0)
 419 #endif
 420
 421 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 422 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 423   __asm__ ("addl %5,%1\n"                                               \
 424         "adcl %3,%0"                                                    \
 425            : "=r" ((USItype) (sh)),                                     \
 426              "=&r" ((USItype) (sl))                                     \
 427            : "%0" ((USItype) (ah)),                                     \
 428              "g" ((USItype) (bh)),                                      \
 429              "%1" ((USItype) (al)),                                     \
 430              "g" ((USItype) (bl)))
 431 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 432   __asm__ ("subl %5,%1\n"                                               \
 433         "sbbl %3,%0"                                                    \
 434            : "=r" ((USItype) (sh)),                                     \
 435              "=&r" ((USItype) (sl))                                     \
 436            : "0" ((USItype) (ah)),                                      \
 437              "g" ((USItype) (bh)),                                      \
 438              "1" ((USItype) (al)),                                      \
 439              "g" ((USItype) (bl)))
 440 #define umul_ppmm(w1, w0, u, v) \
 441   __asm__ ("mull %3"                                                    \
 442            : "=a" ((USItype) (w0)),                                     \
 443              "=d" ((USItype) (w1))                                      \
 444            : "%0" ((USItype) (u)),                                      \
 445              "rm" ((USItype) (v)))
 446 #define udiv_qrnnd(q, r, n1, n0, d) \
 447   __asm__ ("divl %4"                                                    \
 448            : "=a" ((USItype) (q)),                                      \
 449              "=d" ((USItype) (r))                                       \
 450            : "0" ((USItype) (n0)),                                      \
 451              "1" ((USItype) (n1)),                                      \
 452              "rm" ((USItype) (d)))
 453 #define count_leading_zeros(count, x) \
 454   do {                                                                  \
 455     USItype __cbtmp;                                                    \
 456     __asm__ ("bsrl %1,%0"                                               \
 457              : "=r" (__cbtmp) : "rm" ((USItype) (x)));                  \
 458     (count) = __cbtmp ^ 31;                                             \
 459   } while (0)
 460 #define count_trailing_zeros(count, x) \
 461   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
 462 #define UMUL_TIME 40
 463 #define UDIV_TIME 40
 464 #endif /* 80x86 */
 465
 466 #if defined (__i860__) && W_TYPE_SIZE == 32
 467 #if 0
 468 /* Make sure these patterns really improve the code before
 469    switching them on.  */
 470 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 471   do {                                                                  \
 472     union                                                               \
 473       {                                                                 \
 474         DItype __ll;                                                    \
 475         struct {USItype __l, __h;} __i;                                 \
 476       }  __a, __b, __s;                                                 \
 477     __a.__i.__l = (al);                                                 \
 478     __a.__i.__h = (ah);                                                 \
 479     __b.__i.__l = (bl);                                                 \
 480     __b.__i.__h = (bh);                                                 \
 481     __asm__ ("fiadd.dd %1,%2,%0"                                        \
 482              : "=f" (__s.__ll)                                          \
 483              : "%f" (__a.__ll), "f" (__b.__ll));                        \
 484     (sh) = __s.__i.__h;                                                 \
 485     (sl) = __s.__i.__l;                                                 \
 486     } while (0)
 487 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 488   do {                                                                  \
 489     union                                                               \
 490       {                                                                 \
 491         DItype __ll;                                                    \
 492         struct {USItype __l, __h;} __i;                                 \
 493       }  __a, __b, __s;                                                 \
 494     __a.__i.__l = (al);                                                 \
 495     __a.__i.__h = (ah);                                                 \
 496     __b.__i.__l = (bl);                                                 \
 497     __b.__i.__h = (bh);                                                 \
 498     __asm__ ("fisub.dd %1,%2,%0"                                        \
 499              : "=f" (__s.__ll)                                          \
 500              : "%f" (__a.__ll), "f" (__b.__ll));                        \
 501     (sh) = __s.__i.__h;                                                 \
 502     (sl) = __s.__i.__l;                                                 \
 503     } while (0)
 504 #endif
 505 #endif /* __i860__ */
 506
 507 #if defined (__i960__) && W_TYPE_SIZE == 32
 508 #define umul_ppmm(w1, w0, u, v) \
 509   ({union {UDItype __ll;                                                \
 510            struct {USItype __l, __h;} __i;                              \
 511           } __xx;                                                       \
 512   __asm__ ("emul        %2,%1,%0"                                       \
 513            : "=d" (__xx.__ll)                                           \
 514            : "%dI" ((USItype) (u)),                                     \
 515              "dI" ((USItype) (v)));                                     \
 516   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 517 #define __umulsidi3(u, v) \
 518   ({UDItype __w;                                                        \
 519     __asm__ ("emul      %2,%1,%0"                                       \
 520              : "=d" (__w)                                               \
 521              : "%dI" ((USItype) (u)),                                   \
 522                "dI" ((USItype) (v)));                                   \
 523     __w; })
 524 #endif /* __i960__ */
 525
 526 #if defined (__M32R__) && W_TYPE_SIZE == 32
 527 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 528   /* The cmp clears the condition bit.  */ \
 529   __asm__ ("cmp %0,%0\n"                                                \
 530         "addx %%5,%1\n"                                                 \
 531         "addx %%3,%0"                                                   \
 532            : "=r" ((USItype) (sh)),                                     \
 533              "=&r" ((USItype) (sl))                                     \
 534            : "%0" ((USItype) (ah)),                                     \
 535              "r" ((USItype) (bh)),                                      \
 536              "%1" ((USItype) (al)),                                     \
 537              "r" ((USItype) (bl))                                       \
 538            : "cbit")
 539 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 540   /* The cmp clears the condition bit.  */ \
 541   __asm__ ("cmp %0,%0\n"                                                \
 542         "subx %5,%1\n"                                                  \
 543         "subx %3,%0"                                                    \
 544            : "=r" ((USItype) (sh)),                                     \
 545              "=&r" ((USItype) (sl))                                     \
 546            : "0" ((USItype) (ah)),                                      \
 547              "r" ((USItype) (bh)),                                      \
 548              "1" ((USItype) (al)),                                      \
 549              "r" ((USItype) (bl))                                       \
 550            : "cbit")
 551 #endif /* __M32R__ */
 552
 553 #if defined (__mc68000__) && W_TYPE_SIZE == 32
 554 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 555   __asm__ ("add%.l %5,%1\n"                                             \
 556         "addx%.l %3,%0"                                                 \
 557            : "=d" ((USItype) (sh)),                                     \
 558              "=&d" ((USItype) (sl))                                     \
 559            : "%0" ((USItype) (ah)),                                     \
 560              "d" ((USItype) (bh)),                                      \
 561              "%1" ((USItype) (al)),                                     \
 562              "g" ((USItype) (bl)))
 563 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 564   __asm__ ("sub%.l %5,%1\n"                                             \
 565         "subx%.l %3,%0"                                                 \
 566            : "=d" ((USItype) (sh)),                                     \
 567              "=&d" ((USItype) (sl))                                     \
 568            : "0" ((USItype) (ah)),                                      \
 569              "d" ((USItype) (bh)),                                      \
 570              "1" ((USItype) (al)),                                      \
 571              "g" ((USItype) (bl)))
 572
 573 /* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r. */
 574 #if defined (__mc68020__) || defined(mc68020) \
 575         || defined(__mc68030__) || defined(mc68030) \
 576         || defined(__mc68040__) || defined(mc68040) \
 577         || defined(__mcpu32__) || defined(mcpu32) \
 578         || defined(__NeXT__)
 579 #define umul_ppmm(w1, w0, u, v) \
 580   __asm__ ("mulu%.l %3,%1:%0"                                           \
 581            : "=d" ((USItype) (w0)),                                     \
 582              "=d" ((USItype) (w1))                                      \
 583            : "%0" ((USItype) (u)),                                      \
 584              "dmi" ((USItype) (v)))
 585 #define UMUL_TIME 45
 586 #define udiv_qrnnd(q, r, n1, n0, d) \
 587   __asm__ ("divu%.l %4,%1:%0"                                           \
 588            : "=d" ((USItype) (q)),                                      \
 589              "=d" ((USItype) (r))                                       \
 590            : "0" ((USItype) (n0)),                                      \
 591              "1" ((USItype) (n1)),                                      \
 592              "dmi" ((USItype) (d)))
 593 #define UDIV_TIME 90
 594 #define sdiv_qrnnd(q, r, n1, n0, d) \
 595   __asm__ ("divs%.l %4,%1:%0"                                           \
 596            : "=d" ((USItype) (q)),                                      \
 597              "=d" ((USItype) (r))                                       \
 598            : "0" ((USItype) (n0)),                                      \
 599              "1" ((USItype) (n1)),                                      \
 600              "dmi" ((USItype) (d)))
 601
 602 #else /* not mc68020 */
 603 #if !defined(__mcf5200__)
 604 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
 605 #define umul_ppmm(xh, xl, a, b) \
 606   __asm__ ("| Inlined umul_ppmm\n"                                      \
 607 "       move%.l %2,%/d0\n"                                              \
 608 "       move%.l %3,%/d1\n"                                              \
 609 "       move%.l %/d0,%/d2\n"                                            \
 610 "       swap    %/d0\n"                                                 \
 611 "       move%.l %/d1,%/d3\n"                                            \
 612 "       swap    %/d1\n"                                                 \
 613 "       move%.w %/d2,%/d4\n"                                            \
 614 "       mulu    %/d3,%/d4\n"                                            \
 615 "       mulu    %/d1,%/d2\n"                                            \
 616 "       mulu    %/d0,%/d3\n"                                            \
 617 "       mulu    %/d0,%/d1\n"                                            \
 618 "       move%.l %/d4,%/d0\n"                                            \
 619 "       eor%.w  %/d0,%/d0\n"                                            \
 620 "       swap    %/d0\n"                                                 \
 621 "       add%.l  %/d0,%/d2\n"                                            \
 622 "       add%.l  %/d3,%/d2\n"                                            \
 623 "       jcc     1f\n"                                                   \
 624 "       add%.l  %#65536,%/d1\n"                                         \
 625 "1:     swap    %/d2\n"                                                 \
 626 "       moveq   %#0,%/d0\n"                                             \
 627 "       move%.w %/d2,%/d0\n"                                            \
 628 "       move%.w %/d4,%/d2\n"                                            \
 629 "       move%.l %/d2,%1\n"                                              \
 630 "       add%.l  %/d1,%/d0\n"                                            \
 631 "       move%.l %/d0,%0"                                                \
 632            : "=g" ((USItype) (xh)),                                     \
 633              "=g" ((USItype) (xl))                                      \
 634            : "g" ((USItype) (a)),                                       \
 635              "g" ((USItype) (b))                                        \
 636            : "d0", "d1", "d2", "d3", "d4")
 637 #define UMUL_TIME 100
 638 #define UDIV_TIME 400
 639 #endif /* not mcf5200 */
 640 #endif /* not mc68020 */
 641
 642 /* The '020, '030, '040 and '060 have bitfield insns. */
 643 #if defined (__mc68020__) || defined(mc68020) \
 644         || defined(__mc68030__) || defined(mc68030) \
 645         || defined(__mc68040__) || defined(mc68040) \
 646         || defined(__mc68060__) || defined(mc68060) \
 647         || defined(__NeXT__)
 648 #define count_leading_zeros(count, x) \
 649   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
 650            : "=d" ((USItype) (count))                                   \
 651            : "od" ((USItype) (x)), "n" (0))
 652 #endif
 653 #endif /* mc68000 */
 654
 655 #if defined (__m88000__) && W_TYPE_SIZE == 32
 656 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 657   __asm__ ("addu.co %1,%r4,%r5\n"                                       \
 658         "addu.ci %0,%r2,%r3"                                            \
 659            : "=r" ((USItype) (sh)),                                     \
 660              "=&r" ((USItype) (sl))                                     \
 661            : "%rJ" ((USItype) (ah)),                                    \
 662              "rJ" ((USItype) (bh)),                                     \
 663              "%rJ" ((USItype) (al)),                                    \
 664              "rJ" ((USItype) (bl)))
 665 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 666   __asm__ ("subu.co %1,%r4,%r5\n"                                       \
 667         "subu.ci %0,%r2,%r3"                                            \
 668            : "=r" ((USItype) (sh)),                                     \
 669              "=&r" ((USItype) (sl))                                     \
 670            : "rJ" ((USItype) (ah)),                                     \
 671              "rJ" ((USItype) (bh)),                                     \
 672              "rJ" ((USItype) (al)),                                     \
 673              "rJ" ((USItype) (bl)))
 674 #define count_leading_zeros(count, x) \
 675   do {                                                                  \
 676     USItype __cbtmp;                                                    \
 677     __asm__ ("ff1 %0,%1"                                                \
 678              : "=r" (__cbtmp)                                           \
 679              : "r" ((USItype) (x)));                                    \
 680     (count) = __cbtmp ^ 31;                                             \
 681   } while (0)
 682 #define COUNT_LEADING_ZEROS_0 63 /* sic */
 683 #if defined (__mc88110__)
 684 #define umul_ppmm(wh, wl, u, v) \
 685   do {                                                                  \
 686     union {UDItype __ll;                                                \
 687            struct {USItype __h, __l;} __i;                              \
 688           } __xx;                                                       \
 689     __asm__ ("mulu.d    %0,%1,%2"                                       \
 690              : "=r" (__xx.__ll)                                         \
 691              : "r" ((USItype) (u)),                                     \
 692                "r" ((USItype) (v)));                                    \
 693     (wh) = __xx.__i.__h;                                                \
 694     (wl) = __xx.__i.__l;                                                \
 695   } while (0)
 696 #define udiv_qrnnd(q, r, n1, n0, d) \
 697   ({union {UDItype __ll;                                                \
 698            struct {USItype __h, __l;} __i;                              \
 699           } __xx;                                                       \
 700   USItype __q;                                                          \
 701   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 702   __asm__ ("divu.d %0,%1,%2"                                            \
 703            : "=r" (__q)                                                 \
 704            : "r" (__xx.__ll),                                           \
 705              "r" ((USItype) (d)));                                      \
 706   (r) = (n0) - __q * (d); (q) = __q; })
 707 #define UMUL_TIME 5
 708 #define UDIV_TIME 25
 709 #else
 710 #define UMUL_TIME 17
 711 #define UDIV_TIME 150
 712 #endif /* __mc88110__ */
 713 #endif /* __m88000__ */
 714
 715 #if defined (__mips__) && W_TYPE_SIZE == 32
 716 #define umul_ppmm(w1, w0, u, v) \
 717   __asm__ ("multu %2,%3"                                                \
 718            : "=l" ((USItype) (w0)),                                     \
 719              "=h" ((USItype) (w1))                                      \
 720            : "d" ((USItype) (u)),                                       \
 721              "d" ((USItype) (v)))
 722 #define UMUL_TIME 10
 723 #define UDIV_TIME 100
 724 #endif /* __mips__ */
 725
 726 #if defined (__ns32000__) && W_TYPE_SIZE == 32
 727 #define umul_ppmm(w1, w0, u, v) \
 728   ({union {UDItype __ll;                                                \
 729            struct {USItype __l, __h;} __i;                              \
 730           } __xx;                                                       \
 731   __asm__ ("meid %2,%0"                                                 \
 732            : "=g" (__xx.__ll)                                           \
 733            : "%0" ((USItype) (u)),                                      \
 734              "g" ((USItype) (v)));                                      \
 735   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 736 #define __umulsidi3(u, v) \
 737   ({UDItype __w;                                                        \
 738     __asm__ ("meid %2,%0"                                               \
 739              : "=g" (__w)                                               \
 740              : "%0" ((USItype) (u)),                                    \
 741                "g" ((USItype) (v)));                                    \
 742     __w; })
 743 #define udiv_qrnnd(q, r, n1, n0, d) \
 744   ({union {UDItype __ll;                                                \
 745            struct {USItype __l, __h;} __i;                              \
 746           } __xx;                                                       \
 747   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 748   __asm__ ("deid %2,%0"                                                 \
 749            : "=g" (__xx.__ll)                                           \
 750            : "0" (__xx.__ll),                                           \
 751              "g" ((USItype) (d)));                                      \
 752   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
 753 #define count_trailing_zeros(count,x) \
 754   do {
 755     __asm__ ("ffsd     %2,%0"                                          \
 756             : "=r" ((USItype) (count))                                 \
 757             : "0" ((USItype) 0),                                       \
 758               "r" ((USItype) (x)));                                    \
 759   } while (0)
 760 #endif /* __ns32000__ */
 761
 762 #if (defined (_ARCH_PPC) || defined (_IBMR2))
 763 #if W_TYPE_SIZE == 32
 764 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 765   do {                                                                  \
 766     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 767       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 768              : "=r" ((USItype) (sh)),                                   \
 769                "=&r" ((USItype) (sl))                                   \
 770              : "%r" ((USItype) (ah)),                                   \
 771                "%r" ((USItype) (al)),                                   \
 772                "rI" ((USItype) (bl)));                                  \
 773     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 774       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 775              : "=r" ((USItype) (sh)),                                   \
 776                "=&r" ((USItype) (sl))                                   \
 777              : "%r" ((USItype) (ah)),                                   \
 778                "%r" ((USItype) (al)),                                   \
 779                "rI" ((USItype) (bl)));                                  \
 780     else                                                                \
 781       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 782              : "=r" ((USItype) (sh)),                                   \
 783                "=&r" ((USItype) (sl))                                   \
 784              : "%r" ((USItype) (ah)),                                   \
 785                "r" ((USItype) (bh)),                                    \
 786                "%r" ((USItype) (al)),                                   \
 787                "rI" ((USItype) (bl)));                                  \
 788   } while (0)
 789 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 790   do {                                                                  \
 791     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 792       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 793                : "=r" ((USItype) (sh)),                                 \
 794                  "=&r" ((USItype) (sl))                                 \
 795                : "r" ((USItype) (bh)),                                  \
 796                  "rI" ((USItype) (al)),                                 \
 797                  "r" ((USItype) (bl)));                                 \
 798     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
 799       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 800                : "=r" ((USItype) (sh)),                                 \
 801                  "=&r" ((USItype) (sl))                                 \
 802                : "r" ((USItype) (bh)),                                  \
 803                  "rI" ((USItype) (al)),                                 \
 804                  "r" ((USItype) (bl)));                                 \
 805     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 806       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 807                : "=r" ((USItype) (sh)),                                 \
 808                  "=&r" ((USItype) (sl))                                 \
 809                : "r" ((USItype) (ah)),                                  \
 810                  "rI" ((USItype) (al)),                                 \
 811                  "r" ((USItype) (bl)));                                 \
 812     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 813       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 814                : "=r" ((USItype) (sh)),                                 \
 815                  "=&r" ((USItype) (sl))                                 \
 816                : "r" ((USItype) (ah)),                                  \
 817                  "rI" ((USItype) (al)),                                 \
 818                  "r" ((USItype) (bl)));                                 \
 819     else                                                                \
 820       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 821                : "=r" ((USItype) (sh)),                                 \
 822                  "=&r" ((USItype) (sl))                                 \
 823                : "r" ((USItype) (ah)),                                  \
 824                  "r" ((USItype) (bh)),                                  \
 825                  "rI" ((USItype) (al)),                                 \
 826                  "r" ((USItype) (bl)));                                 \
 827   } while (0)
 828 #define count_leading_zeros(count, x) \
 829   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
 830            : "=r" ((USItype) (count))                                   \
 831            : "r" ((USItype) (x)))
 832 #define COUNT_LEADING_ZEROS_0 32
 833 #if defined (_ARCH_PPC)
 834 #define umul_ppmm(ph, pl, m0, m1) \
 835   do {                                                                  \
 836     USItype __m0 = (m0), __m1 = (m1);                                   \
 837     __asm__ ("mulhwu %0,%1,%2"                                          \
 838              : "=r" ((USItype) ph)                                      \
 839              : "%r" (__m0),                                             \
 840                "r" (__m1));                                             \
 841     (pl) = __m0 * __m1;                                                 \
 842   } while (0)
 843 #define UMUL_TIME 15
 844 #define smul_ppmm(ph, pl, m0, m1) \
 845   do {                                                                  \
 846     SItype __m0 = (m0), __m1 = (m1);                                    \
 847     __asm__ ("mulhw %0,%1,%2"                                           \
 848              : "=r" ((SItype) ph)                                       \
 849              : "%r" (__m0),                                             \
 850                "r" (__m1));                                             \
 851     (pl) = __m0 * __m1;                                                 \
 852   } while (0)
 853 #define SMUL_TIME 14
 854 #define UDIV_TIME 120
 855 #else
 856 #define umul_ppmm(xh, xl, m0, m1) \
 857   do {                                                                  \
 858     USItype __m0 = (m0), __m1 = (m1);                                   \
 859     __asm__ ("mul %0,%2,%3"                                             \
 860              : "=r" ((USItype) (xh)),                                   \
 861                "=q" ((USItype) (xl))                                    \
 862              : "r" (__m0),                                              \
 863                "r" (__m1));                                             \
 864     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 865              + (((SItype) __m1 >> 31) & __m0));                         \
 866   } while (0)
 867 #define UMUL_TIME 8
 868 #define smul_ppmm(xh, xl, m0, m1) \
 869   __asm__ ("mul %0,%2,%3"                                               \
 870            : "=r" ((SItype) (xh)),                                      \
 871              "=q" ((SItype) (xl))                                       \
 872            : "r" (m0),                                                  \
 873              "r" (m1))
 874 #define SMUL_TIME 4
 875 #define sdiv_qrnnd(q, r, nh, nl, d) \
 876   __asm__ ("div %0,%2,%4"                                               \
 877            : "=r" ((SItype) (q)), "=q" ((SItype) (r))                   \
 878            : "r" ((SItype) (nh)), "1" ((SItype) (nl)), "r" ((SItype) (d)))
 879 #define UDIV_TIME 100
 880 #endif
 881 #else /* W_TYPE_SIZE != 32.  */
 882 /* Must be powerpc64.  */
 883 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 884   do {                                                                  \
 885     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 886       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 887              : "=r" ((UDItype) (sh)),                                   \
 888                "=&r" ((UDItype) (sl))                                   \
 889              : "%r" ((UDItype) (ah)),                                   \
 890                "%r" ((UDItype) (al)),                                   \
 891                "rI" ((UDItype) (bl)));                                  \
 892     else if (__builtin_constant_p (bh) && (bh) ==~(UDItype) 0)          \
 893       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 894              : "=r" ((UDItype) (sh)),                                   \
 895                "=&r" ((UDItype) (sl))                                   \
 896              : "%r" ((UDItype) (ah)),                                   \
 897                "%r" ((UDItype) (al)),                                   \
 898                "rI" ((UDItype) (bl)));                                  \
 899     else                                                                \
 900       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 901              : "=r" ((UDItype) (sh)),                                   \
 902                "=&r" ((UDItype) (sl))                                   \
 903              : "%r" ((UDItype) (ah)),                                   \
 904                "r" ((UDItype) (bh)),                                    \
 905                "%r" ((UDItype) (al)),                                   \
 906                "rI" ((UDItype) (bl)));                                  \
 907   } while (0)
 908 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 909   do {                                                                  \
 910     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 911       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 912                : "=r" ((UDItype) (sh)),                                 \
 913                  "=&r" ((UDItype) (sl))                                 \
 914                : "r" ((UDItype) (bh)),                                  \
 915                  "rI" ((UDItype) (al)),                                 \
 916                  "r" ((UDItype) (bl)));                                 \
 917     else if (__builtin_constant_p (ah) && (ah) ==~(UDItype) 0)          \
 918       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 919                : "=r" ((UDItype) (sh)),                                 \
 920                  "=&r" ((UDItype) (sl))                                 \
 921                : "r" ((UDItype) (bh)),                                  \
 922                  "rI" ((UDItype) (al)),                                 \
 923                  "r" ((UDItype) (bl)));                                 \
 924     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 925       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 926                : "=r" ((UDItype) (sh)),                                 \
 927                  "=&r" ((UDItype) (sl))                                 \
 928                : "r" ((UDItype) (ah)),                                  \
 929                  "rI" ((UDItype) (al)),                                 \
 930                  "r" ((UDItype) (bl)));                                 \
 931     else if (__builtin_constant_p (bh) && (bh) ==~(UDItype) 0)          \
 932       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 933                : "=r" ((UDItype) (sh)),                                 \
 934                  "=&r" ((UDItype) (sl))                                 \
 935                : "r" ((UDItype) (ah)),                                  \
 936                  "rI" ((UDItype) (al)),                                 \
 937                  "r" ((UDItype) (bl)));                                 \
 938     else                                                                \
 939       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 940                : "=r" ((UDItype) (sh)),                                 \
 941                  "=&r" ((UDItype) (sl))                                 \
 942                : "r" ((UDItype) (ah)),                                  \
 943                  "r" ((UDItype) (bh)),                                  \
 944                  "rI" ((UDItype) (al)),                                 \
 945                  "r" ((UDItype) (bl)));                                 \
 946   } while (0)
 947
 948 #define count_leading_zeros(count, x) \
 949   __asm__ ("{cntlz|cntlzd} %0,%1"                                       \
 950            : "=r" (count)                                       \
 951            : "r" ((UDItype) (x)))
 952 #define COUNT_LEADING_ZEROS_0 64
 953
 954 #define umul_ppmm(ph, pl, m0, m1) \
 955   do {                                                                  \
 956     UDItype __m0 = (m0), __m1 = (m1);                                   \
 957     __asm__ ("mulhdu %0,%1,%2"                                          \
 958              : "=r" ((UDItype) ph)                                      \
 959              : "%r" (__m0),                                             \
 960                "r" (__m1));                                             \
 961     (pl) = __m0 * __m1;                                                 \
 962   } while (0)
 963 #define UMUL_TIME 16
 964
 965 #define smul_ppmm(ph, pl, m0, m1) \
 966   do {                                                                  \
 967     DItype __m0 = (m0), __m1 = (m1);                                    \
 968     __asm__ ("mulhd %0,%1,%2"                                           \
 969              : "=r" ((DItype) ph)                                       \
 970              : "%r" (__m0),                                             \
 971                "r" (__m1));                                             \
 972     (pl) = __m0 * __m1;                                                 \
 973   } while (0)
 974 #define SMUL_TIME 16
 975 #define UDIV_TIME 72
 976 #endif /* W_TYPE_SIZE == 32 */
 977 #endif /* Power architecture variants.  */
 978
 979 #if defined (__pyr__) && W_TYPE_SIZE == 32
 980 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 981   __asm__ ("addw        %5,%1\n"                                        \
 982         "addwc  %3,%0"                                                  \
 983            : "=r" ((USItype) (sh)),                                     \
 984              "=&r" ((USItype) (sl))                                     \
 985            : "%0" ((USItype) (ah)),                                     \
 986              "g" ((USItype) (bh)),                                      \
 987              "%1" ((USItype) (al)),                                     \
 988              "g" ((USItype) (bl)))
 989 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 990   __asm__ ("subw        %5,%1\n"                                        \
 991         "subwb  %3,%0"                                                  \
 992            : "=r" ((USItype) (sh)),                                     \
 993              "=&r" ((USItype) (sl))                                     \
 994            : "0" ((USItype) (ah)),                                      \
 995              "g" ((USItype) (bh)),                                      \
 996              "1" ((USItype) (al)),                                      \
 997              "g" ((USItype) (bl)))
 998 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
 999 #define umul_ppmm(w1, w0, u, v) \
1000   ({union {UDItype __ll;                                                \
1001            struct {USItype __h, __l;} __i;                              \
1002           } __xx;                                                       \
1003   __asm__ ("movw %1,%R0\n"                                              \
1004         "uemul %2,%0"                                                   \
1005            : "=&r" (__xx.__ll)                                          \
1006            : "g" ((USItype) (u)),                                       \
1007              "g" ((USItype) (v)));                                      \
1008   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
1009 #endif /* __pyr__ */
1010
1011 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
1012 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1013   __asm__ ("a %1,%5\n"                                                  \
1014         "ae %0,%3"                                                      \
1015            : "=r" ((USItype) (sh)),                                     \
1016              "=&r" ((USItype) (sl))                                     \
1017            : "%0" ((USItype) (ah)),                                     \
1018              "r" ((USItype) (bh)),                                      \
1019              "%1" ((USItype) (al)),                                     \
1020              "r" ((USItype) (bl)))
1021 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1022   __asm__ ("s %1,%5\n"                                                  \
1023         "se %0,%3"                                                      \
1024            : "=r" ((USItype) (sh)),                                     \
1025              "=&r" ((USItype) (sl))                                     \
1026            : "0" ((USItype) (ah)),                                      \
1027              "r" ((USItype) (bh)),                                      \
1028              "1" ((USItype) (al)),                                      \
1029              "r" ((USItype) (bl)))
1030 #define umul_ppmm(ph, pl, m0, m1) \
1031   do {                                                                  \
1032     USItype __m0 = (m0), __m1 = (m1);                                   \
1033     __asm__ (                                                           \
1034         "s      r2,r2\n"                                                \
1035         "mts    r10,%2\n"                                               \
1036         "m      r2,%3\n"                                                \
1037         "m      r2,%3\n"                                                \
1038         "m      r2,%3\n"                                                \
1039         "m      r2,%3\n"                                                \
1040         "m      r2,%3\n"                                                \
1041         "m      r2,%3\n"                                                \
1042         "m      r2,%3\n"                                                \
1043         "m      r2,%3\n"                                                \
1044         "m      r2,%3\n"                                                \
1045         "m      r2,%3\n"                                                \
1046         "m      r2,%3\n"                                                \
1047         "m      r2,%3\n"                                                \
1048         "m      r2,%3\n"                                                \
1049         "m      r2,%3\n"                                                \
1050         "m      r2,%3\n"                                                \
1051         "m      r2,%3\n"                                                \
1052         "cas    %0,r2,r0\n"                                             \
1053         "mfs    r10,%1"                                                 \
1054              : "=r" ((USItype) (ph)),                                   \
1055                "=r" ((USItype) (pl))                                    \
1056              : "%r" (__m0),                                             \
1057                 "r" (__m1)                                              \
1058              : "r2");                                                   \
1059     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
1060              + (((SItype) __m1 >> 31) & __m0));                         \
1061   } while (0)
1062 #define UMUL_TIME 20
1063 #define UDIV_TIME 200
1064 #define count_leading_zeros(count, x) \
1065   do {                                                                  \
1066     if ((x) >= 0x10000)                                                 \
1067       __asm__ ("clz     %0,%1"                                          \
1068                : "=r" ((USItype) (count))                               \
1069                : "r" ((USItype) (x) >> 16));                            \
1070     else                                                                \
1071       {                                                                 \
1072         __asm__ ("clz   %0,%1"                                          \
1073                  : "=r" ((USItype) (count))                             \
1074                  : "r" ((USItype) (x)));                                        \
1075         (count) += 16;                                                  \
1076       }                                                                 \
1077   } while (0)
1078 #endif
1079
1080 #if defined (__sh2__) && W_TYPE_SIZE == 32
1081 #define umul_ppmm(w1, w0, u, v) \
1082   __asm__ (                                                             \
1083         "dmulu.l        %2,%3\n"                                        \
1084         "sts    macl,%1\n"                                              \
1085         "sts    mach,%0"                                                \
1086            : "=r" ((USItype)(w1)),                                      \
1087              "=r" ((USItype)(w0))                                       \
1088            : "r" ((USItype)(u)),                                        \
1089              "r" ((USItype)(v))                                         \
1090            : "macl", "mach")
1091 #define UMUL_TIME 5
1092 #endif
1093
1094 #if defined (__sparc__) && !defined(__arch64__) \
1095     && !defined(__sparcv9) && W_TYPE_SIZE == 32
1096 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1097   __asm__ ("addcc %r4,%5,%1\n"                                          \
1098         "addx %r2,%3,%0"                                                \
1099            : "=r" ((USItype) (sh)),                                     \
1100              "=&r" ((USItype) (sl))                                     \
1101            : "%rJ" ((USItype) (ah)),                                    \
1102              "rI" ((USItype) (bh)),                                     \
1103              "%rJ" ((USItype) (al)),                                    \
1104              "rI" ((USItype) (bl))                                      \
1105            __CLOBBER_CC)
1106 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1107   __asm__ ("subcc %r4,%5,%1\n"                                          \
1108         "subx %r2,%3,%0"                                                \
1109            : "=r" ((USItype) (sh)),                                     \
1110              "=&r" ((USItype) (sl))                                     \
1111            : "rJ" ((USItype) (ah)),                                     \
1112              "rI" ((USItype) (bh)),                                     \
1113              "rJ" ((USItype) (al)),                                     \
1114              "rI" ((USItype) (bl))                                      \
1115            __CLOBBER_CC)
1116 #if defined (__sparc_v8__)
1117 #define umul_ppmm(w1, w0, u, v) \
1118   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1119            : "=r" ((USItype) (w1)),                                     \
1120              "=r" ((USItype) (w0))                                      \
1121            : "r" ((USItype) (u)),                                       \
1122              "r" ((USItype) (v)))
1123 #define udiv_qrnnd(q, r, n1, n0, d) \
1124   __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
1125            : "=&r" ((USItype) (q)),                                     \
1126              "=&r" ((USItype) (r))                                      \
1127            : "r" ((USItype) (n1)),                                      \
1128              "r" ((USItype) (n0)),                                      \
1129              "r" ((USItype) (d)))
1130 #else
1131 #if defined (__sparclite__)
1132 /* This has hardware multiply but not divide.  It also has two additional
1133    instructions scan (ffs from high bit) and divscc.  */
1134 #define umul_ppmm(w1, w0, u, v) \
1135   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1136            : "=r" ((USItype) (w1)),                                     \
1137              "=r" ((USItype) (w0))                                      \
1138            : "r" ((USItype) (u)),                                       \
1139              "r" ((USItype) (v)))
1140 #define udiv_qrnnd(q, r, n1, n0, d) \
1141   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1142 "        wr     %%g0,%2,%%y     ! Not a delayed write for sparclite\n"  \
1143 "        tst    %%g0\n"                                                 \
1144 "        divscc %3,%4,%%g1\n"                                           \
1145 "        divscc %%g1,%4,%%g1\n"                                         \
1146 "        divscc %%g1,%4,%%g1\n"                                         \
1147 "        divscc %%g1,%4,%%g1\n"                                         \
1148 "        divscc %%g1,%4,%%g1\n"                                         \
1149 "        divscc %%g1,%4,%%g1\n"                                         \
1150 "        divscc %%g1,%4,%%g1\n"                                         \
1151 "        divscc %%g1,%4,%%g1\n"                                         \
1152 "        divscc %%g1,%4,%%g1\n"                                         \
1153 "        divscc %%g1,%4,%%g1\n"                                         \
1154 "        divscc %%g1,%4,%%g1\n"                                         \
1155 "        divscc %%g1,%4,%%g1\n"                                         \
1156 "        divscc %%g1,%4,%%g1\n"                                         \
1157 "        divscc %%g1,%4,%%g1\n"                                         \
1158 "        divscc %%g1,%4,%%g1\n"                                         \
1159 "        divscc %%g1,%4,%%g1\n"                                         \
1160 "        divscc %%g1,%4,%%g1\n"                                         \
1161 "        divscc %%g1,%4,%%g1\n"                                         \
1162 "        divscc %%g1,%4,%%g1\n"                                         \
1163 "        divscc %%g1,%4,%%g1\n"                                         \
1164 "        divscc %%g1,%4,%%g1\n"                                         \
1165 "        divscc %%g1,%4,%%g1\n"                                         \
1166 "        divscc %%g1,%4,%%g1\n"                                         \
1167 "        divscc %%g1,%4,%%g1\n"                                         \
1168 "        divscc %%g1,%4,%%g1\n"                                         \
1169 "        divscc %%g1,%4,%%g1\n"                                         \
1170 "        divscc %%g1,%4,%%g1\n"                                         \
1171 "        divscc %%g1,%4,%%g1\n"                                         \
1172 "        divscc %%g1,%4,%%g1\n"                                         \
1173 "        divscc %%g1,%4,%%g1\n"                                         \
1174 "        divscc %%g1,%4,%%g1\n"                                         \
1175 "        divscc %%g1,%4,%0\n"                                           \
1176 "        rd     %%y,%1\n"                                               \
1177 "        bl,a 1f\n"                                                     \
1178 "        add    %1,%4,%1\n"                                             \
1179 "1:     ! End of inline udiv_qrnnd"                                     \
1180            : "=r" ((USItype) (q)),                                      \
1181              "=r" ((USItype) (r))                                       \
1182            : "r" ((USItype) (n1)),                                      \
1183              "r" ((USItype) (n0)),                                      \
1184              "rI" ((USItype) (d))                                       \
1185            : "g1" __AND_CLOBBER_CC)
1186 #define UDIV_TIME 37
1187 #define count_leading_zeros(count, x) \
1188   do {                                                                  \
1189   __asm__ ("scan %1,1,%0"                                               \
1190            : "=r" ((USItype) (count))                                   \
1191            : "r" ((USItype) (x)));                                      \
1192   } while (0)
1193 /* Early sparclites return 63 for an argument of 0, but they warn that future
1194    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1195    undefined.  */
1196 #else
1197 /* SPARC without integer multiplication and divide instructions.
1198    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
1199 #define umul_ppmm(w1, w0, u, v) \
1200   __asm__ ("! Inlined umul_ppmm\n"                                      \
1201 "        wr     %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr\n"\
1202 "        sra    %3,31,%%o5      ! Don't move this insn\n"               \
1203 "        and    %2,%%o5,%%o5    ! Don't move this insn\n"               \
1204 "        andcc  %%g0,0,%%g1     ! Don't move this insn\n"               \
1205 "        mulscc %%g1,%3,%%g1\n"                                         \
1206 "        mulscc %%g1,%3,%%g1\n"                                         \
1207 "        mulscc %%g1,%3,%%g1\n"                                         \
1208 "        mulscc %%g1,%3,%%g1\n"                                         \
1209 "        mulscc %%g1,%3,%%g1\n"                                         \
1210 "        mulscc %%g1,%3,%%g1\n"                                         \
1211 "        mulscc %%g1,%3,%%g1\n"                                         \
1212 "        mulscc %%g1,%3,%%g1\n"                                         \
1213 "        mulscc %%g1,%3,%%g1\n"                                         \
1214 "        mulscc %%g1,%3,%%g1\n"                                         \
1215 "        mulscc %%g1,%3,%%g1\n"                                         \
1216 "        mulscc %%g1,%3,%%g1\n"                                         \
1217 "        mulscc %%g1,%3,%%g1\n"                                         \
1218 "        mulscc %%g1,%3,%%g1\n"                                         \
1219 "        mulscc %%g1,%3,%%g1\n"                                         \
1220 "        mulscc %%g1,%3,%%g1\n"                                         \
1221 "        mulscc %%g1,%3,%%g1\n"                                         \
1222 "        mulscc %%g1,%3,%%g1\n"                                         \
1223 "        mulscc %%g1,%3,%%g1\n"                                         \
1224 "        mulscc %%g1,%3,%%g1\n"                                         \
1225 "        mulscc %%g1,%3,%%g1\n"                                         \
1226 "        mulscc %%g1,%3,%%g1\n"                                         \
1227 "        mulscc %%g1,%3,%%g1\n"                                         \
1228 "        mulscc %%g1,%3,%%g1\n"                                         \
1229 "        mulscc %%g1,%3,%%g1\n"                                         \
1230 "        mulscc %%g1,%3,%%g1\n"                                         \
1231 "        mulscc %%g1,%3,%%g1\n"                                         \
1232 "        mulscc %%g1,%3,%%g1\n"                                         \
1233 "        mulscc %%g1,%3,%%g1\n"                                         \
1234 "        mulscc %%g1,%3,%%g1\n"                                         \
1235 "        mulscc %%g1,%3,%%g1\n"                                         \
1236 "        mulscc %%g1,%3,%%g1\n"                                         \
1237 "        mulscc %%g1,0,%%g1\n"                                          \
1238 "        add    %%g1,%%o5,%0\n"                                         \
1239 "        rd     %%y,%1"                                                 \
1240            : "=r" ((USItype) (w1)),                                     \
1241              "=r" ((USItype) (w0))                                      \
1242            : "%rI" ((USItype) (u)),                                     \
1243              "r" ((USItype) (v))                                                \
1244            : "g1", "o5" __AND_CLOBBER_CC)
1245 #define UMUL_TIME 39            /* 39 instructions */
1246 /* It's quite necessary to add this much assembler for the sparc.
1247    The default udiv_qrnnd (in C) is more than 10 times slower!  */
1248 #define udiv_qrnnd(q, r, n1, n0, d) \
1249   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1250 "       mov     32,%%g1\n"                                              \
1251 "       subcc   %1,%2,%%g0\n"                                           \
1252 "1:     bcs     5f\n"                                                   \
1253 "       addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n"              \
1254 "       sub     %1,%2,%1        ! this kills msb of n\n"                \
1255 "       addx    %1,%1,%1        ! so this can't give carry\n"           \
1256 "       subcc   %%g1,1,%%g1\n"                                          \
1257 "2:     bne     1b\n"                                                   \
1258 "       subcc   %1,%2,%%g0\n"                                           \
1259 "       bcs     3f\n"                                                   \
1260 "       addxcc %0,%0,%0         ! shift n1n0 and a q-bit in lsb\n"      \
1261 "       b       3f\n"                                                   \
1262 "       sub     %1,%2,%1        ! this kills msb of n\n"                \
1263 "4:     sub     %1,%2,%1\n"                                             \
1264 "5:     addxcc  %1,%1,%1\n"                                             \
1265 "       bcc     2b\n"                                                   \
1266 "       subcc   %%g1,1,%%g1\n"                                          \
1267 "! Got carry from n.  Subtract next step to cancel this carry.\n"       \
1268 "       bne     4b\n"                                                   \
1269 "       addcc   %0,%0,%0        ! shift n1n0 and a 0-bit in lsb\n"      \
1270 "       sub     %1,%2,%1\n"                                             \
1271 "3:     xnor    %0,0,%0\n"                                              \
1272 "        ! End of inline udiv_qrnnd"                                    \
1273            : "=&r" ((USItype) (q)),                                     \
1274              "=&r" ((USItype) (r))                                      \
1275            : "r" ((USItype) (d)),                                       \
1276              "1" ((USItype) (n1)),                                      \
1277              "0" ((USItype) (n0)) : "g1" __AND_CLOBBER_CC)
1278 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations. */
1279 #endif /* __sparclite__ */
1280 #endif /* __sparc_v8__ */
1281 #endif /* __sparc__ */
1282
1283 #if ((defined (__sparc__) && defined (__arch64__)) \
1284      || defined (__sparcv9)) && W_TYPE_SIZE == 64
1285 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1286   __asm__ ("addcc %r4,%5,%1\n"                                          \
1287            "add %r2,%3,%0\n"                                            \
1288            "bcs,a,pn %%xcc, 1f\n"                                       \
1289            "add %0, 1, %0\n"                                            \
1290            "1:"                                                         \
1291            : "=r" ((UDItype)(sh)),                                      \
1292              "=&r" ((UDItype)(sl))                                      \
1293            : "%rJ" ((UDItype)(ah)),                                     \
1294              "rI" ((UDItype)(bh)),                                      \
1295              "%rJ" ((UDItype)(al)),                                     \
1296              "rI" ((UDItype)(bl))                                       \
1297            __CLOBBER_CC)
1298
1299 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1300   __asm__ ("subcc %r4,%5,%1\n"                                          \
1301            "sub %r2,%3,%0\n"                                            \
1302            "bcs,a,pn %%xcc, 1f\n"                                       \
1303            "sub %0, 1, %0\n"                                            \
1304            "1:"                                                         \
1305            : "=r" ((UDItype)(sh)),                                      \
1306              "=&r" ((UDItype)(sl))                                      \
1307            : "rJ" ((UDItype)(ah)),                                      \
1308              "rI" ((UDItype)(bh)),                                      \
1309              "rJ" ((UDItype)(al)),                                      \
1310              "rI" ((UDItype)(bl))                                       \
1311            __CLOBBER_CC)
1312
1313 #define umul_ppmm(wh, wl, u, v)                                         \
1314   do {                                                                  \
1315           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1316           __asm__ __volatile__ (                                        \
1317                    "srl %7,0,%3\n"                                      \
1318                    "mulx %3,%6,%1\n"                                    \
1319                    "srlx %6,32,%2\n"                                    \
1320                    "mulx %2,%3,%4\n"                                    \
1321                    "sllx %4,32,%5\n"                                    \
1322                    "srl %6,0,%3\n"                                      \
1323                    "sub %1,%5,%5\n"                                     \
1324                    "srlx %5,32,%5\n"                                    \
1325                    "addcc %4,%5,%4\n"                                   \
1326                    "srlx %7,32,%5\n"                                    \
1327                    "mulx %3,%5,%3\n"                                    \
1328                    "mulx %2,%5,%5\n"                                    \
1329                    "sethi %%hi(0x80000000),%2\n"                        \
1330                    "addcc %4,%3,%4\n"                                   \
1331                    "srlx %4,32,%4\n"                                    \
1332                    "add %2,%2,%2\n"                                     \
1333                    "movcc %%xcc,%%g0,%2\n"                              \
1334                    "addcc %5,%4,%5\n"                                   \
1335                    "sllx %3,32,%3\n"                                    \
1336                    "add %1,%3,%1\n"                                     \
1337                    "add %5,%2,%0"                                       \
1338            : "=r" ((UDItype)(wh)),                                      \
1339              "=&r" ((UDItype)(wl)),                                     \
1340              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1341            : "r" ((UDItype)(u)),                                        \
1342              "r" ((UDItype)(v))                                         \
1343            __CLOBBER_CC);                                               \
1344   } while (0)
1345 #define UMUL_TIME 96
1346 #define UDIV_TIME 230
1347 #endif /* sparc64 */
1348
1349 #if defined (__vax__) && W_TYPE_SIZE == 32
1350 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1351   __asm__ ("addl2 %5,%1\n"                                              \
1352         "adwc %3,%0"                                                    \
1353            : "=g" ((USItype) (sh)),                                     \
1354              "=&g" ((USItype) (sl))                                     \
1355            : "%0" ((USItype) (ah)),                                     \
1356              "g" ((USItype) (bh)),                                      \
1357              "%1" ((USItype) (al)),                                     \
1358              "g" ((USItype) (bl)))
1359 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1360   __asm__ ("subl2 %5,%1\n"                                              \
1361         "sbwc %3,%0"                                                    \
1362            : "=g" ((USItype) (sh)),                                     \
1363              "=&g" ((USItype) (sl))                                     \
1364            : "0" ((USItype) (ah)),                                      \
1365              "g" ((USItype) (bh)),                                      \
1366              "1" ((USItype) (al)),                                      \
1367              "g" ((USItype) (bl)))
1368 #define umul_ppmm(xh, xl, m0, m1) \
1369   do {                                                                  \
1370     union {                                                             \
1371         UDItype __ll;                                                   \
1372         struct {USItype __l, __h;} __i;                                 \
1373       } __xx;                                                           \
1374     USItype __m0 = (m0), __m1 = (m1);                                   \
1375     __asm__ ("emul %1,%2,$0,%0"                                         \
1376              : "=r" (__xx.__ll)                                         \
1377              : "g" (__m0),                                              \
1378                "g" (__m1));                                             \
1379     (xh) = __xx.__i.__h;                                                \
1380     (xl) = __xx.__i.__l;                                                \
1381     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1382              + (((SItype) __m1 >> 31) & __m0));                         \
1383   } while (0)
1384 #define sdiv_qrnnd(q, r, n1, n0, d) \
1385   do {                                                                  \
1386     union {DItype __ll;                                                 \
1387            struct {SItype __l, __h;} __i;                               \
1388           } __xx;                                                       \
1389     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1390     __asm__ ("ediv %3,%2,%0,%1"                                         \
1391              : "=g" (q), "=g" (r)                                       \
1392              : "g" (__xx.__ll), "g" (d));                               \
1393   } while (0)
1394 #endif /* __vax__ */
1395
1396 #if defined (__z8000__) && W_TYPE_SIZE == 16
1397 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1398   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1399            : "=r" ((unsigned int)(sh)),                                 \
1400              "=&r" ((unsigned int)(sl))                                 \
1401            : "%0" ((unsigned int)(ah)),                                 \
1402              "r" ((unsigned int)(bh)),                                  \
1403              "%1" ((unsigned int)(al)),                                 \
1404              "rQR" ((unsigned int)(bl)))
1405 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1406   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1407            : "=r" ((unsigned int)(sh)),                                 \
1408              "=&r" ((unsigned int)(sl))                                 \
1409            : "0" ((unsigned int)(ah)),                                  \
1410              "r" ((unsigned int)(bh)),                                  \
1411              "1" ((unsigned int)(al)),                                  \
1412              "rQR" ((unsigned int)(bl)))
1413 #define umul_ppmm(xh, xl, m0, m1) \
1414   do {                                                                  \
1415     union {long int __ll;                                               \
1416            struct {unsigned int __h, __l;} __i;                         \
1417           } __xx;                                                       \
1418     unsigned int __m0 = (m0), __m1 = (m1);                              \
1419     __asm__ ("mult      %S0,%H3"                                        \
1420              : "=r" (__xx.__i.__h),                                     \
1421                "=r" (__xx.__i.__l)                                      \
1422              : "%1" (__m0),                                             \
1423                "rQR" (__m1));                                           \
1424     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1425     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1426              + (((signed int) __m1 >> 15) & __m0));                     \
1427   } while (0)
1428 #endif /* __z8000__ */
1429
1430 #endif /* __GNUC__ */
1431
1432 /* If this machine has no inline assembler, use C macros.  */
1433
1434 #if !defined (add_ssaaaa)
1435 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1436   do {                                                                  \
1437     UWtype __x;                                                         \
1438     __x = (al) + (bl);                                                  \
1439     (sh) = (ah) + (bh) + (__x < (al));                                  \
1440     (sl) = __x;                                                         \
1441   } while (0)
1442 #endif
1443
1444 #if !defined (sub_ddmmss)
1445 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1446   do {                                                                  \
1447     UWtype __x;                                                         \
1448     __x = (al) - (bl);                                                  \
1449     (sh) = (ah) - (bh) - (__x > (al));                                  \
1450     (sl) = __x;                                                         \
1451   } while (0)
1452 #endif
1453
1454 #if !defined (umul_ppmm)
1455 #define umul_ppmm(w1, w0, u, v)                                         \
1456   do {                                                                  \
1457     UWtype __x0, __x1, __x2, __x3;                                      \
1458     UHWtype __ul, __vl, __uh, __vh;                                     \
1459                                                                         \
1460     __ul = __ll_lowpart (u);                                            \
1461     __uh = __ll_highpart (u);                                           \
1462     __vl = __ll_lowpart (v);                                            \
1463     __vh = __ll_highpart (v);                                           \
1464                                                                         \
1465     __x0 = (UWtype) __ul * __vl;                                        \
1466     __x1 = (UWtype) __ul * __vh;                                        \
1467     __x2 = (UWtype) __uh * __vl;                                        \
1468     __x3 = (UWtype) __uh * __vh;                                        \
1469                                                                         \
1470     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1471     __x1 += __x2;               /* but this indeed can */               \
1472     if (__x1 < __x2)            /* did we get it? */                    \
1473       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1474                                                                         \
1475     (w1) = __x3 + __ll_highpart (__x1);                                 \
1476     (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
1477   } while (0)
1478 #endif
1479
1480 #if !defined (__umulsidi3)
1481 #define __umulsidi3(u, v) \
1482   ({DIunion __w;                                                        \
1483     umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
1484     __w.ll; })
1485 #endif
1486
1487 /* Define this unconditionally, so it can be used for debugging.  */
1488 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1489   do {                                                                  \
1490     UWtype __d1, __d0, __q1, __q0;                                      \
1491     UWtype __r1, __r0, __m;                                             \
1492     __d1 = __ll_highpart (d);                                           \
1493     __d0 = __ll_lowpart (d);                                            \
1494                                                                         \
1495     __r1 = (n1) % __d1;                                                 \
1496     __q1 = (n1) / __d1;                                                 \
1497     __m = (UWtype) __q1 * __d0;                                         \
1498     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1499     if (__r1 < __m)                                                     \
1500       {                                                                 \
1501         __q1--, __r1 += (d);                                            \
1502         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1503           if (__r1 < __m)                                               \
1504             __q1--, __r1 += (d);                                        \
1505       }                                                                 \
1506     __r1 -= __m;                                                        \
1507                                                                         \
1508     __r0 = __r1 % __d1;                                                 \
1509     __q0 = __r1 / __d1;                                                 \
1510     __m = (UWtype) __q0 * __d0;                                         \
1511     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1512     if (__r0 < __m)                                                     \
1513       {                                                                 \
1514         __q0--, __r0 += (d);                                            \
1515         if (__r0 >= (d))                                                \
1516           if (__r0 < __m)                                               \
1517             __q0--, __r0 += (d);                                        \
1518       }                                                                 \
1519     __r0 -= __m;                                                        \
1520                                                                         \
1521     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1522     (r) = __r0;                                                         \
1523   } while (0)
1524
1525 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1526    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1527 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1528 #define udiv_qrnnd(q, r, nh, nl, d) \
1529   do {                                                                  \
1530     USItype __r;                                                        \
1531     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1532     (r) = __r;                                                          \
1533   } while (0)
1534 #endif
1535
1536 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1537 #if !defined (udiv_qrnnd)
1538 #define UDIV_NEEDS_NORMALIZATION 1
1539 #define udiv_qrnnd __udiv_qrnnd_c
1540 #endif
1541
1542 #if !defined (count_leading_zeros)
1543 extern const UQItype __clz_tab[];
1544 #define count_leading_zeros(count, x) \
1545   do {                                                                  \
1546     UWtype __xr = (x);                                                  \
1547     UWtype __a;                                                         \
1548                                                                         \
1549     if (W_TYPE_SIZE <= 32)                                              \
1550       {                                                                 \
1551         __a = __xr < ((UWtype)1<<2*__BITS4)                             \
1552           ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4)                 \
1553           : (__xr < ((UWtype)1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);   \
1554       }                                                                 \
1555     else                                                                \
1556       {                                                                 \
1557         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1558           if (((__xr >> __a) & 0xff) != 0)                              \
1559             break;                                                      \
1560       }                                                                 \
1561                                                                         \
1562     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1563   } while (0)
1564 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1565 #endif
1566
1567 #if !defined (count_trailing_zeros)
1568 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1569    defined in asm, but if it is not, the C version above is good enough.  */
1570 #define count_trailing_zeros(count, x) \
1571   do {                                                                  \
1572     UWtype __ctz_x = (x);                                               \
1573     UWtype __ctz_c;                                                     \
1574     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1575     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1576   } while (0)
1577 #endif
1578
1579 #ifndef UDIV_NEEDS_NORMALIZATION
1580 #define UDIV_NEEDS_NORMALIZATION 0
1581 #endif