2 * Author: Henry Bruce <henry.bruce@intel.com>
3 * Copyright (c) 2014 Intel Corporation.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include <sys/utsname.h>
31 #include "x86/intel_minnow_max.h"
33 #define PLATFORM_NAME "MinnowBoard MAX"
34 #define I2C_BUS_COUNT 10
35 #define I2C_BUS_DEFAULT 7
37 int arch_nr_gpios_adjust = 0x100;
40 mraa_set_pininfo(mraa_board_t* board, int mraa_index, char *name, mraa_pincapabilities_t caps, int sysfs_pin)
42 if (mraa_index < board->phy_pin_count) {
43 // adjust mraa_index for ARCH_NR_GPIOS value
44 mraa_pininfo_t* pin_info = &board->pins[mraa_index];
45 strncpy(pin_info->name, name, 7);
46 pin_info->capabilites = caps;
48 pin_info->gpio.pinmap = sysfs_pin | arch_nr_gpios_adjust;
50 pin_info->i2c.pinmap = 1;
51 pin_info->i2c.mux_total = 0;
55 if (strncmp(name, "PWM", 3) == 0 && strlen(name) > 3 && isdigit(name[3]))
56 controller = name[3] - '0';
57 pin_info->pwm.parent_id = controller;
58 pin_info->pwm.pinmap = 0;
59 pin_info->pwm.mux_total = 0;
63 return MRAA_ERROR_INVALID_RESOURCE;
67 mraa_get_pin_index(mraa_board_t* board, char *name, int* pin_index) {
69 for (i = 0; i < board->phy_pin_count; ++i) {
70 if (strcmp(name, board->pins[i].name) == 0) {
75 return MRAA_ERROR_INVALID_RESOURCE;
79 mraa_intel_minnow_max()
81 mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
83 struct utsname running_uname;
84 int uname_major, uname_minor, max_pins[27];
90 b->platform_name = PLATFORM_NAME;
91 b->phy_pin_count = MRAA_INTEL_MINNOW_MAX_PINCOUNT;
92 b->gpio_count = MRAA_INTEL_MINNOW_MAX_PINCOUNT;
97 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_MINNOW_MAX_PINCOUNT);
98 if (b->pins == NULL) {
102 if (uname(&running_uname) != 0) {
106 sscanf(running_uname.release, "%d.%d", &uname_major, &uname_minor);
108 /* if we are on Linux 3.17 or lower they use a 256 max and number the GPIOs down
109 * if we are on 3.18 or higher (ea584595fc85e65796335033dfca25ed655cd0ed) (for now)
110 * they start at 512 and number down, at some point this is going to change again when
111 * GPIO moves to a radix.
113 if (uname_major <= 3 && uname_minor <= 17 ) {
114 arch_nr_gpios_adjust = 0;
117 mraa_set_pininfo(b, 0, "INVALID", (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, -1 );
118 mraa_set_pininfo(b, 1, "GND", (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, -1 );
119 mraa_set_pininfo(b, 2, "GND", (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, -1 );
120 mraa_set_pininfo(b, 3, "5v", (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, -1 );
121 mraa_set_pininfo(b, 4, "3.3v", (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, -1 );
122 mraa_set_pininfo(b, 5, "SPI_CS", (mraa_pincapabilities_t){1,0,0,0,1,0,0,0}, 220);
123 mraa_set_pininfo(b, 6, "UART1TX", (mraa_pincapabilities_t){1,0,0,0,0,0,0,1}, 225);
124 mraa_set_pininfo(b, 7, "SPIMISO", (mraa_pincapabilities_t){1,0,0,0,1,0,0,0}, 221);
125 mraa_set_pininfo(b, 8, "UART1RX", (mraa_pincapabilities_t){1,0,0,0,0,0,0,1}, 224);
126 mraa_set_pininfo(b, 9, "SPIMOSI", (mraa_pincapabilities_t){1,0,0,0,1,0,0,0}, 222);
127 mraa_set_pininfo(b, 10, "UART1CT", (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 227);
128 mraa_set_pininfo(b, 11, "SPI_CLK", (mraa_pincapabilities_t){1,0,0,0,0,0,0,1}, 223);
129 mraa_set_pininfo(b, 12, "UART1RT", (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 226);
130 mraa_set_pininfo(b, 13, "I2C_SCL", (mraa_pincapabilities_t){1,0,0,0,0,1,0,0}, 243);
131 mraa_set_pininfo(b, 14, "I2S_CLK", (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 216);
132 mraa_set_pininfo(b, 15, "I2C_SDA", (mraa_pincapabilities_t){1,0,0,0,0,1,0,0}, 242);
133 mraa_set_pininfo(b, 16, "I2S_FRM", (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 217);
134 mraa_set_pininfo(b, 17, "UART2TX", (mraa_pincapabilities_t){1,0,0,0,0,0,0,1}, 229);
135 mraa_set_pininfo(b, 18, "I2S_DO", (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 219);
136 mraa_set_pininfo(b, 19, "UART2RX", (mraa_pincapabilities_t){1,0,0,0,0,0,0,1}, 228);
137 mraa_set_pininfo(b, 20, "I2S_DI", (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 218);
138 mraa_set_pininfo(b, 21, "S5_0", (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 82 );
139 mraa_set_pininfo(b, 22, "PWM0", (mraa_pincapabilities_t){1,0,1,0,0,0,0,0}, 248); // Assume BIOS configured for PWM
140 mraa_set_pininfo(b, 23, "S5_1", (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 83 );
141 mraa_set_pininfo(b, 24, "PWM1", (mraa_pincapabilities_t){1,0,1,0,0,0,0,0}, 249); // Assume BIOS configured for PWM
142 mraa_set_pininfo(b, 25, "S5_4", (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 84 );
143 mraa_set_pininfo(b, 26, "IBL8254", (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, 208);
145 // Set number of i2c adaptors
146 // Got this from running 'i2cdetect -l'
147 b->i2c_bus_count = I2C_BUS_COUNT;
149 // Disable all i2c adaptors
151 for (ici = 0; ici < b->i2c_bus_count; ici++) {
152 b->i2c_bus[ici].bus_id = -1;
155 // Configure i2c adaptor #7 and make it the default
156 int pin_index_sda, pin_index_scl;
157 if (mraa_get_pin_index(b, "I2C_SDA", &pin_index_sda) == MRAA_SUCCESS &&
158 mraa_get_pin_index(b, "I2C_SCL", &pin_index_scl) == MRAA_SUCCESS) {
159 b->def_i2c_bus = I2C_BUS_DEFAULT;
160 b->i2c_bus[b->def_i2c_bus].bus_id = b->def_i2c_bus;
161 b->i2c_bus[b->def_i2c_bus].sda = pin_index_sda;
162 b->i2c_bus[b->def_i2c_bus].scl = pin_index_scl;
166 b->pwm_default_period = 500;
167 b->pwm_max_period = 1000000000;
168 b->pwm_min_period = 1;
170 b->spi_bus_count = 1;
172 b->spi_bus[0].bus_id = 0;
173 b->spi_bus[0].slave_s = 0;
174 b->spi_bus[0].cs = 5;
175 b->spi_bus[0].mosi = 9;
176 b->spi_bus[0].miso = 7;
177 b->spi_bus[0].sclk = 11;
179 b->uart_dev_count = 0;
183 syslog(LOG_CRIT, "minnowmax: Platform failed to initialise");