2 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
3 * Copyright (c) 2014 Intel Corporation.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
31 #include "x86/intel_edison_fab_c.h"
33 #define PLATFORM_NAME "Intel Edison"
34 #define SYSFS_CLASS_GPIO "/sys/class/gpio"
35 #define SYSFS_PINMODE_PATH "/sys/kernel/debug/gpio_debug/gpio"
37 #define MAX_MODE_SIZE 8
39 // This is an absolute path to a resource file found within sysfs.
40 // Might not always be correct. First thing to check if mmap stops
41 // working. Check the device for 0x1199 and Intel Vendor (0x8086)
42 #define MMAP_PATH "/sys/devices/pci0000:00/0000:00:0c.0/resource0"
43 #define UART_DEV_PATH "/dev/ttyMFD1"
48 } mraa_intel_edision_pindef_t;
51 mraa_intel_edision_pindef_t gpio;
52 mraa_intel_edision_pindef_t pwm;
53 mraa_intel_edision_pindef_t i2c;
54 mraa_intel_edision_pindef_t spi;
55 mraa_intel_edision_pindef_t uart;
56 } mraa_intel_edison_pinmodes_t;
58 static mraa_gpio_context tristate;
60 static mraa_intel_edison_pinmodes_t pinmodes[MRAA_INTEL_EDISON_PINCOUNT];
61 static unsigned int outputen[] = {248,249,250,251,252,253,254,255,256,257,258,259,260,261,232,233,234,235,236,237};
62 static mraa_gpio_context agpioOutputen[sizeof(outputen)/sizeof(outputen[0])];
64 static unsigned int pullup_map[] = {216,217,218,219,220,221,222,223,224,225,226,227,228,229,208,209,210,211,212,213};
65 static int miniboard = 0;
68 static uint8_t *mmap_reg = NULL;
69 static int mmap_fd = 0;
71 static unsigned int mmap_count = 0;
74 mraa_intel_edison_pinmode_change(int sysfs, int mode)
80 char buffer[MAX_SIZE];
81 snprintf(buffer, MAX_SIZE, SYSFS_PINMODE_PATH "%i/current_pinmux",sysfs);
82 int modef = open(buffer, O_WRONLY);
84 syslog(LOG_ERR, "edison: Failed to open SoC pinmode for opening");
85 return MRAA_ERROR_INVALID_RESOURCE;
88 mraa_result_t ret = MRAA_SUCCESS;
89 char mode_buf[MAX_MODE_SIZE];
90 int length = sprintf(mode_buf, "mode%u",mode);
91 if (write(modef, mode_buf, length*sizeof(char)) == -1) {
92 ret = MRAA_ERROR_INVALID_RESOURCE;
100 mraa_intel_edison_gpio_dir_pre(mraa_gpio_context dev, gpio_dir_t dir)
103 if (dev->phy_pin >= 0) {
104 if (mraa_gpio_write(tristate, 0) != MRAA_SUCCESS) {
105 // call can sometimes fail, this does not actually mean much except
106 // that the kernel drivers don't always behave very well
107 syslog(LOG_NOTICE, "edison: Failed to write to tristate");
109 int pin = dev->phy_pin;
111 if (!agpioOutputen[pin]) {
112 agpioOutputen[pin] = mraa_gpio_init_raw(outputen[pin]);
113 if (agpioOutputen[pin] == NULL) {
114 return MRAA_ERROR_INVALID_RESOURCE;
116 if (mraa_gpio_dir(agpioOutputen[pin], MRAA_GPIO_OUT) != MRAA_SUCCESS) {
117 return MRAA_ERROR_INVALID_RESOURCE;
121 if (dir == MRAA_GPIO_OUT) {
124 if (mraa_gpio_write(agpioOutputen[pin], output_val) != MRAA_SUCCESS) {
125 return MRAA_ERROR_INVALID_RESOURCE;
133 mraa_intel_edison_gpio_dir_post(mraa_gpio_context dev, gpio_dir_t dir)
135 if (dev->phy_pin >= 0) {
136 return mraa_gpio_write(tristate, 1);
142 mraa_intel_edison_gpio_init_post(mraa_gpio_context dev)
145 return MRAA_ERROR_INVALID_RESOURCE;
149 if (miniboard == 1) {
153 sysfs = pinmodes[dev->phy_pin].gpio.sysfs;
154 mode = pinmodes[dev->phy_pin].gpio.mode;
157 return mraa_intel_edison_pinmode_change(sysfs, mode);
161 mraa_intel_edison_gpio_close_pre(mraa_gpio_context dev)
163 if (dev->phy_pin >= 0) {
164 int pin = dev->phy_pin;
165 if (agpioOutputen[pin]) {
166 mraa_gpio_close(agpioOutputen[pin]);
167 agpioOutputen[pin] = NULL;
174 mraa_intel_edison_i2c_init_pre(unsigned int bus)
176 if (miniboard == 0) {
178 syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
181 mraa_gpio_write(tristate, 0);
182 mraa_gpio_context io18_gpio = mraa_gpio_init_raw(14);
183 mraa_gpio_context io19_gpio = mraa_gpio_init_raw(165);
184 mraa_gpio_dir(io18_gpio, MRAA_GPIO_IN);
185 mraa_gpio_dir(io19_gpio, MRAA_GPIO_IN);
186 mraa_gpio_close(io18_gpio);
187 mraa_gpio_close(io19_gpio);
189 mraa_gpio_context io18_enable = mraa_gpio_init_raw(236);
190 mraa_gpio_context io19_enable = mraa_gpio_init_raw(237);
191 mraa_gpio_dir(io18_enable, MRAA_GPIO_OUT);
192 mraa_gpio_dir(io19_enable, MRAA_GPIO_OUT);
193 mraa_gpio_write(io18_enable, 0);
194 mraa_gpio_write(io19_enable, 0);
195 mraa_gpio_close(io18_enable);
196 mraa_gpio_close(io19_enable);
198 mraa_gpio_context io18_pullup = mraa_gpio_init_raw(212);
199 mraa_gpio_context io19_pullup = mraa_gpio_init_raw(213);
200 mraa_gpio_dir(io18_pullup, MRAA_GPIO_IN);
201 mraa_gpio_dir(io19_pullup, MRAA_GPIO_IN);
202 mraa_gpio_close(io18_pullup);
203 mraa_gpio_close(io19_pullup);
205 mraa_intel_edison_pinmode_change(28, 1);
206 mraa_intel_edison_pinmode_change(27, 1);
208 mraa_gpio_write(tristate, 1);
210 if(bus != 6 && bus != 1) {
211 syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
214 int scl = plat->pins[plat->i2c_bus[bus].scl].gpio.pinmap;
215 int sda = plat->pins[plat->i2c_bus[bus].sda].gpio.pinmap;
216 mraa_intel_edison_pinmode_change(sda, 1);
217 mraa_intel_edison_pinmode_change(scl, 1);
224 mraa_intel_edison_misc_spi()
226 mraa_gpio_write(tristate, 0);
228 mraa_gpio_context io10_p1 = mraa_gpio_init_raw(263);
229 mraa_gpio_context io10_p2 = mraa_gpio_init_raw(240);
230 mraa_gpio_context io11_p1 = mraa_gpio_init_raw(262);
231 mraa_gpio_context io11_p2 = mraa_gpio_init_raw(241);
232 mraa_gpio_context io12_p1 = mraa_gpio_init_raw(242);
233 mraa_gpio_context io13_p1 = mraa_gpio_init_raw(243);
234 mraa_gpio_dir(io10_p1, MRAA_GPIO_OUT);
235 mraa_gpio_dir(io10_p2, MRAA_GPIO_OUT);
236 mraa_gpio_dir(io11_p1, MRAA_GPIO_OUT);
237 mraa_gpio_dir(io11_p2, MRAA_GPIO_OUT);
238 mraa_gpio_dir(io12_p1, MRAA_GPIO_OUT);
239 mraa_gpio_dir(io13_p1, MRAA_GPIO_OUT);
241 mraa_gpio_write(io10_p1, 1);
242 mraa_gpio_write(io10_p2, 0);
243 mraa_gpio_write(io11_p1, 1);
244 mraa_gpio_write(io11_p2, 0);
245 mraa_gpio_write(io12_p1, 0);
246 mraa_gpio_write(io13_p1, 0);
248 mraa_gpio_close(io10_p1);
249 mraa_gpio_close(io10_p2);
250 mraa_gpio_close(io11_p1);
251 mraa_gpio_close(io11_p2);
252 mraa_gpio_close(io12_p1);
253 mraa_gpio_close(io13_p1);
255 mraa_intel_edison_pinmode_change(111, 1);
256 mraa_intel_edison_pinmode_change(115, 1);
257 mraa_intel_edison_pinmode_change(114, 1);
258 mraa_intel_edison_pinmode_change(109, 1);
259 mraa_gpio_write(tristate, 1);
265 mraa_intel_edison_aio_get_fp(mraa_aio_context dev)
267 char file_path[64]= "";
269 snprintf(file_path, 64, "/sys/bus/iio/devices/iio:device1/in_voltage%d_raw",
272 dev->adc_in_fp = open(file_path, O_RDONLY);
273 if (dev->adc_in_fp == -1) {
274 syslog(LOG_ERR, "edison: Failed to open Analog input raw file %s for "
275 "reading!", file_path);
276 return MRAA_ERROR_INVALID_RESOURCE;
283 mraa_intel_edison_aio_init_pre(unsigned int aio)
285 if (aio > plat->aio_count) {
286 syslog(LOG_ERR, "edison: Invalid analog input channel");
287 return MRAA_ERROR_INVALID_RESOURCE;
291 mraa_gpio_context output_e;
292 output_e = mraa_gpio_init_raw(outputen[pin]);
293 if (output_e == NULL) {
294 return MRAA_ERROR_INVALID_RESOURCE;
296 if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
297 mraa_gpio_close(output_e);
298 return MRAA_ERROR_INVALID_RESOURCE;
300 if (mraa_gpio_write(output_e, 0) != MRAA_SUCCESS) {
301 mraa_gpio_close(output_e);
302 return MRAA_ERROR_INVALID_RESOURCE;
304 mraa_gpio_close(output_e);
306 mraa_gpio_context pullup_pin;
307 pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
308 if (pullup_pin == NULL) {
309 return MRAA_ERROR_INVALID_RESOURCE;
311 if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS) {
312 mraa_gpio_close(pullup_pin);
313 return MRAA_ERROR_INVALID_RESOURCE;
315 mraa_gpio_close(pullup_pin);
321 mraa_intel_edison_aio_init_post(mraa_aio_context dev)
323 return mraa_gpio_write(tristate, 1);
327 mraa_intel_edison_pwm_init_pre(int pin)
329 if (miniboard == 1) {
330 return mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
332 if (pin < 0 || pin > 19) {
333 return MRAA_ERROR_INVALID_RESOURCE;
336 if (!plat->pins[pin].capabilites.pwm) {
337 return MRAA_ERROR_INVALID_RESOURCE;
340 mraa_gpio_context output_e;
341 output_e = mraa_gpio_init_raw(outputen[pin]);
342 if (output_e == NULL) {
343 return MRAA_ERROR_INVALID_RESOURCE;
345 if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
346 mraa_gpio_close(output_e);
347 return MRAA_ERROR_INVALID_RESOURCE;
349 if (mraa_gpio_write(output_e, 1) != MRAA_SUCCESS) {
350 mraa_gpio_close(output_e);
351 return MRAA_ERROR_INVALID_RESOURCE;
353 mraa_gpio_close(output_e);
355 mraa_gpio_context pullup_pin;
356 pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
357 if (pullup_pin == NULL) {
358 return MRAA_ERROR_INVALID_RESOURCE;
360 if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS) {
361 mraa_gpio_close(pullup_pin);
362 return MRAA_ERROR_INVALID_RESOURCE;
364 mraa_gpio_close(pullup_pin);
365 mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
371 mraa_intel_edison_pwm_init_post(mraa_pwm_context pwm)
373 return mraa_gpio_write(tristate, 1);
377 mraa_intel_edison_spi_init_pre(int bus)
379 if (miniboard == 1) {
380 mraa_intel_edison_pinmode_change(111, 1);
381 mraa_intel_edison_pinmode_change(115, 1);
382 mraa_intel_edison_pinmode_change(114, 1);
383 mraa_intel_edison_pinmode_change(109, 1);
386 mraa_gpio_write(tristate, 0);
388 mraa_gpio_context io10_out = mraa_gpio_init_raw(258);
389 mraa_gpio_context io11_out = mraa_gpio_init_raw(259);
390 mraa_gpio_context io12_out = mraa_gpio_init_raw(260);
391 mraa_gpio_context io13_out = mraa_gpio_init_raw(261);
392 mraa_gpio_dir(io10_out, MRAA_GPIO_OUT);
393 mraa_gpio_dir(io11_out, MRAA_GPIO_OUT);
394 mraa_gpio_dir(io12_out, MRAA_GPIO_OUT);
395 mraa_gpio_dir(io13_out, MRAA_GPIO_OUT);
397 mraa_gpio_write(io10_out, 1);
398 mraa_gpio_write(io11_out, 1);
399 mraa_gpio_write(io12_out, 0);
400 mraa_gpio_write(io13_out, 1);
402 mraa_gpio_close(io10_out);
403 mraa_gpio_close(io11_out);
404 mraa_gpio_close(io12_out);
405 mraa_gpio_close(io13_out);
407 mraa_gpio_context io10_pull = mraa_gpio_init_raw(226);
408 mraa_gpio_context io11_pull = mraa_gpio_init_raw(227);
409 mraa_gpio_context io12_pull = mraa_gpio_init_raw(228);
410 mraa_gpio_context io13_pull = mraa_gpio_init_raw(229);
412 mraa_gpio_dir(io10_pull, MRAA_GPIO_IN);
413 mraa_gpio_dir(io11_pull, MRAA_GPIO_IN);
414 mraa_gpio_dir(io12_pull, MRAA_GPIO_IN);
415 mraa_gpio_dir(io13_pull, MRAA_GPIO_IN);
417 mraa_gpio_close(io10_pull);
418 mraa_gpio_close(io11_pull);
419 mraa_gpio_close(io12_pull);
420 mraa_gpio_close(io13_pull);
426 mraa_intel_edison_spi_init_post(mraa_spi_context spi)
428 return mraa_gpio_write(tristate, 1);
432 mraa_intel_edison_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mode)
434 if (dev->value_fp != -1) {
435 if (close(dev->value_fp) != 0) {
436 return MRAA_ERROR_INVALID_RESOURCE;
441 mraa_gpio_context pullup_e;
442 pullup_e = mraa_gpio_init_raw(pullup_map[dev->phy_pin]);
443 if (pullup_e == NULL) {
444 return MRAA_ERROR_INVALID_RESOURCE;
446 if (mraa_gpio_dir(pullup_e, MRAA_GPIO_IN) != MRAA_SUCCESS) {
447 syslog(LOG_ERR, "edison: Failed to set gpio mode-pullup");
448 mraa_gpio_close(pullup_e);
449 return MRAA_ERROR_INVALID_RESOURCE;
454 case MRAA_GPIO_STRONG:
456 case MRAA_GPIO_PULLUP:
459 case MRAA_GPIO_PULLDOWN:
466 return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
469 if (mraa_gpio_dir(pullup_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
470 syslog(LOG_ERR, "edison: Error setting pullup");
471 mraa_gpio_close(pullup_e);
472 return MRAA_ERROR_INVALID_RESOURCE;
474 if (mraa_gpio_write(pullup_e, value)!= MRAA_SUCCESS) {
475 syslog(LOG_ERR, "edison: Error setting pullup");
476 mraa_gpio_close(pullup_e);
477 return MRAA_ERROR_INVALID_RESOURCE;
481 return mraa_gpio_close(pullup_e);
485 mraa_intel_edsion_mb_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode)
487 if (dev->value_fp != -1) {
488 if (close(dev->value_fp) != 0) {
489 return MRAA_ERROR_INVALID_RESOURCE;
494 char filepath[MAX_SIZE];
495 snprintf(filepath, MAX_SIZE,
496 SYSFS_PINMODE_PATH "%d/current_pullmode", dev->pin);
498 int drive = open(filepath, O_WRONLY);
500 syslog(LOG_ERR, "edison: Failed to open drive for writing");
501 return MRAA_ERROR_INVALID_RESOURCE;
507 case MRAA_GPIO_STRONG:
510 case MRAA_GPIO_PULLUP:
511 length = snprintf(bu, sizeof(bu), "pullup");
513 case MRAA_GPIO_PULLDOWN:
514 length = snprintf(bu, sizeof(bu), "pulldown");
517 length = snprintf(bu, sizeof(bu), "nopull");
521 return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
523 if (write(drive, bu, length*sizeof(char)) == -1) {
524 syslog(LOG_ERR, "edison: Failed to write to drive mode");
526 return MRAA_ERROR_INVALID_RESOURCE;
529 if (close(drive) != 0) {
530 return MRAA_ERROR_INVALID_RESOURCE;
536 mraa_intel_edison_uart_init_pre(int index)
538 if (miniboard == 0) {
539 mraa_gpio_write(tristate, 0);
540 mraa_gpio_context io0_output = mraa_gpio_init_raw(248);
541 mraa_gpio_context io0_pullup = mraa_gpio_init_raw(216);
542 mraa_gpio_context io1_output = mraa_gpio_init_raw(249);
543 mraa_gpio_context io1_pullup = mraa_gpio_init_raw(217);
544 mraa_gpio_dir(io0_output, MRAA_GPIO_OUT);
545 mraa_gpio_dir(io0_pullup, MRAA_GPIO_OUT);
546 mraa_gpio_dir(io1_output, MRAA_GPIO_OUT);
547 mraa_gpio_dir(io1_pullup, MRAA_GPIO_IN);
549 mraa_gpio_write(io0_output, 0);
550 mraa_gpio_write(io0_pullup, 0);
551 mraa_gpio_write(io1_output, 1);
553 mraa_gpio_close(io0_output);
554 mraa_gpio_close(io0_pullup);
555 mraa_gpio_close(io1_output);
556 mraa_gpio_close(io1_pullup);
559 ret = mraa_intel_edison_pinmode_change(130,1); //IO0 RX
560 ret = mraa_intel_edison_pinmode_change(131,1); //IO1 TX
565 mraa_intel_edison_uart_init_post(mraa_uart_context uart)
567 return mraa_gpio_write(tristate, 1);
571 mraa_intel_edsion_mmap_unsetup()
573 if (mmap_reg == NULL) {
574 syslog(LOG_ERR, "edison mmap: null register cant unsetup");
575 return MRAA_ERROR_INVALID_RESOURCE;
577 munmap(mmap_reg, mmap_size);
579 if (close(mmap_fd) != 0) {
580 return MRAA_ERROR_INVALID_RESOURCE;
586 mraa_intel_edison_mmap_write(mraa_gpio_context dev, int value)
588 uint8_t offset = ((dev->pin / 32) * sizeof(uint32_t));
597 *(volatile uint32_t*) (mmap_reg + offset + valoff) =
598 (uint32_t)(1 << (dev->pin % 32));
604 mraa_intel_edison_mmap_read(mraa_gpio_context dev)
606 uint8_t offset = ((dev->pin / 32) * sizeof(uint32_t));
609 value = *(volatile uint32_t*) (mmap_reg +0x04+ offset);
610 if (value&(uint32_t)(1 << (dev->pin % 32))) {
617 mraa_intel_edison_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
620 syslog(LOG_ERR, "edison mmap: context not valid");
621 return MRAA_ERROR_INVALID_HANDLE;
625 if (dev->mmap_write == NULL && dev->mmap_read == NULL) {
626 syslog(LOG_ERR, "edison mmap: can't disable disabled mmap gpio");
627 return MRAA_ERROR_INVALID_PARAMETER;
629 dev->mmap_write = NULL;
630 dev->mmap_read = NULL;
632 if (mmap_count == 0) {
633 return mraa_intel_edsion_mmap_unsetup();
638 if (dev->mmap_write != NULL && dev->mmap_read != NULL) {
639 syslog(LOG_ERR, "edison mmap: can't enable enabled mmap gpio");
640 return MRAA_ERROR_INVALID_PARAMETER;
643 //Might need to make some elements of this thread safe.
644 //For example only allow one thread to enter the following block
645 //to prevent mmap'ing twice.
646 if (mmap_reg == NULL) {
647 if ((mmap_fd = open(MMAP_PATH, O_RDWR)) < 0) {
648 syslog(LOG_ERR, "edison map: unable to open resource0 file");
649 return MRAA_ERROR_INVALID_HANDLE;
653 fstat(mmap_fd, &fd_stat);
654 mmap_size = fd_stat.st_size;
656 mmap_reg = (uint8_t*) mmap(NULL, fd_stat.st_size,
657 PROT_READ | PROT_WRITE,
658 MAP_FILE | MAP_SHARED,
660 if (mmap_reg == MAP_FAILED) {
661 syslog(LOG_ERR, "edison mmap: failed to mmap");
664 return MRAA_ERROR_NO_RESOURCES;
667 dev->mmap_write = &mraa_intel_edison_mmap_write;
668 dev->mmap_read = &mraa_intel_edison_mmap_read;
675 mraa_intel_edison_i2c_freq(mraa_i2c_context dev, mraa_i2c_mode_t mode)
679 switch (dev->busnum) {
681 sysnode = open("/sys/devices/pci0000:00/0000:00:08.0/i2c_dw_sysnode/mode", O_RDWR);
684 sysnode = open("/sys/devices/pci0000:00/0000:00:09.1/i2c_dw_sysnode/mode", O_RDWR);
687 syslog(LOG_NOTICE, "i2c bus selected does not support frequency changes");
688 return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
691 return MRAA_ERROR_INVALID_RESOURCE;
698 length = snprintf(bu, sizeof(bu), "std");
701 length = snprintf(bu, sizeof(bu), "fast");
704 length = snprintf(bu, sizeof(bu), "high");
707 syslog(LOG_ERR, "Invalid i2c mode selected");
709 return MRAA_ERROR_INVALID_PARAMETER;
711 if (write(sysnode, bu, length*sizeof(char)) == -1) {
713 return MRAA_ERROR_INVALID_RESOURCE;
720 mraa_intel_edison_miniboard(mraa_board_t* b)
723 b->phy_pin_count = 56;
724 b->gpio_count = 56; // A bit of a hack I suppose
726 b->pwm_default_period = 5000;
727 b->pwm_max_period = 218453;
728 b->pwm_min_period = 1;
730 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*56);
731 if (b->pins == NULL) {
732 return MRAA_ERROR_UNSPECIFIED;
735 advance_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
737 advance_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
738 advance_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
739 advance_func->i2c_set_frequency_replace = &mraa_intel_edison_i2c_freq;
740 advance_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
741 advance_func->gpio_mode_replace = &mraa_intel_edsion_mb_gpio_mode;
742 advance_func->uart_init_pre = &mraa_intel_edison_uart_init_pre;
743 advance_func->gpio_mmap_setup = &mraa_intel_edison_mmap_setup;
746 strncpy(b->pins[pos].name, "J17-1", 8);
747 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
748 b->pins[pos].gpio.pinmap = 182;
749 b->pins[pos].gpio.mux_total = 0;
750 b->pins[pos].pwm.pinmap = 2;
751 b->pins[pos].pwm.parent_id = 0;
752 b->pins[pos].pwm.mux_total = 0;
755 strncpy(b->pins[pos].name, "J17-2", 8);
756 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
758 strncpy(b->pins[pos].name, "J17-3", 8);
759 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
761 strncpy(b->pins[pos].name, "J17-4", 8);
762 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
765 strncpy(b->pins[pos].name, "J17-5", 8);
766 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
767 b->pins[pos].gpio.pinmap = 135;
768 b->pins[pos].gpio.mux_total = 0;
771 strncpy(b->pins[pos].name, "J17-6", 8);
772 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
775 strncpy(b->pins[pos].name, "J17-7", 8);
776 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
777 b->pins[pos].gpio.pinmap = 27;
778 b->pins[pos].gpio.mux_total = 0;
779 b->pins[pos].i2c.pinmap = 1;
780 b->pins[pos].i2c.mux_total = 0;
783 strncpy(b->pins[pos].name, "J17-8", 8);
784 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
785 b->pins[pos].gpio.pinmap = 20;
786 b->pins[pos].gpio.mux_total = 0;
787 b->pins[pos].i2c.pinmap = 1;
788 b->pins[pos].i2c.mux_total = 0;
791 strncpy(b->pins[pos].name, "J17-9", 8);
792 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
793 b->pins[pos].gpio.pinmap = 28;
794 b->pins[pos].gpio.mux_total = 0;
795 b->pins[pos].i2c.pinmap = 1;
796 b->pins[pos].i2c.mux_total = 0;
799 strncpy(b->pins[pos].name, "J17-10", 8);
800 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
801 b->pins[pos].gpio.pinmap = 111;
802 b->pins[pos].gpio.mux_total = 0;
803 b->pins[pos].spi.pinmap = 5;
804 b->pins[pos].spi.mux_total = 0;
807 strncpy(b->pins[pos].name, "J17-11", 8);
808 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
809 b->pins[pos].gpio.pinmap = 109;
810 b->pins[pos].gpio.mux_total = 0;
811 b->pins[pos].spi.pinmap = 5;
812 b->pins[pos].spi.mux_total = 0;
815 strncpy(b->pins[pos].name, "J17-12", 8);
816 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
817 b->pins[pos].gpio.pinmap = 115;
818 b->pins[pos].gpio.mux_total = 0;
819 b->pins[pos].spi.pinmap = 5;
820 b->pins[pos].spi.mux_total = 0;
822 strncpy(b->pins[pos].name, "J17-13", 8);
823 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
826 strncpy(b->pins[pos].name, "J17-14", 8);
827 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
828 b->pins[pos].gpio.pinmap = 128;
829 b->pins[pos].gpio.parent_id = 0;
830 b->pins[pos].gpio.mux_total = 0;
833 strncpy(b->pins[pos].name, "J18-1", 8);
834 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
835 b->pins[pos].gpio.pinmap = 13;
836 b->pins[pos].gpio.mux_total = 0;
837 b->pins[pos].pwm.pinmap = 1;
838 b->pins[pos].pwm.parent_id = 0;
839 b->pins[pos].pwm.mux_total = 0;
842 strncpy(b->pins[pos].name, "J18-2", 8);
843 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
844 b->pins[pos].gpio.pinmap = 165;
845 b->pins[pos].gpio.mux_total = 0;
847 strncpy(b->pins[pos].name, "J18-3", 8);
848 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
850 strncpy(b->pins[pos].name, "J18-4", 8);
851 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
853 strncpy(b->pins[pos].name, "J18-5", 8);
854 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
857 strncpy(b->pins[pos].name, "J18-6", 8);
858 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
859 b->pins[pos].gpio.pinmap = 19;
860 b->pins[pos].gpio.mux_total = 0;
861 b->pins[pos].i2c.pinmap = 1;
862 b->pins[pos].i2c.mux_total = 0;
865 strncpy(b->pins[pos].name, "J18-7", 8);
866 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
867 b->pins[pos].gpio.pinmap = 12;
868 b->pins[pos].gpio.mux_total = 0;
869 b->pins[pos].pwm.pinmap = 0;
870 b->pins[pos].pwm.parent_id = 0;
871 b->pins[pos].pwm.mux_total = 0;
874 strncpy(b->pins[pos].name, "J18-8", 8);
875 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
876 b->pins[pos].gpio.pinmap = 183;
877 b->pins[pos].gpio.mux_total = 0;
878 b->pins[pos].pwm.pinmap = 3;
879 b->pins[pos].pwm.parent_id = 0;
880 b->pins[pos].pwm.mux_total = 0;
882 strncpy(b->pins[pos].name, "J18-9", 8);
883 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
886 strncpy(b->pins[pos].name, "J18-10", 8);
887 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
888 b->pins[pos].gpio.pinmap = 110;
889 b->pins[pos].gpio.mux_total = 0;
890 b->pins[pos].spi.pinmap = 5;
891 b->pins[pos].spi.mux_total = 0;
893 strncpy(b->pins[pos].name, "J18-11", 8);
894 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
895 b->pins[pos].gpio.pinmap = 114;
896 b->pins[pos].gpio.mux_total = 0;
897 b->pins[pos].spi.pinmap = 5;
898 b->pins[pos].spi.mux_total = 0;
901 strncpy(b->pins[pos].name, "J18-12", 8);
902 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
903 b->pins[pos].gpio.pinmap = 129;
904 b->pins[pos].gpio.mux_total = 0;
906 strncpy(b->pins[pos].name, "J18-13", 8);
907 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
908 b->pins[pos].gpio.pinmap = 130;
909 b->pins[pos].gpio.mux_total = 0;
910 b->pins[pos].uart.pinmap = 0;
911 b->pins[pos].uart.parent_id = 0;
912 b->pins[pos].uart.mux_total = 0;
915 strncpy(b->pins[pos].name, "J18-14", 8);
916 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
919 strncpy(b->pins[pos].name, "J19-1", 8);
920 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
922 strncpy(b->pins[pos].name, "J19-2", 8);
923 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
925 strncpy(b->pins[pos].name, "J19-3", 8);
926 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
929 strncpy(b->pins[pos].name, "J19-4", 8);
930 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
931 b->pins[pos].gpio.pinmap = 44;
932 b->pins[pos].gpio.mux_total = 0;
934 strncpy(b->pins[pos].name, "J19-5", 8);
935 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
936 b->pins[pos].gpio.pinmap = 46;
937 b->pins[pos].gpio.mux_total = 0;
939 strncpy(b->pins[pos].name, "J19-6", 8);
940 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
941 b->pins[pos].gpio.pinmap = 48;
942 b->pins[pos].gpio.mux_total = 0;
945 strncpy(b->pins[pos].name, "J19-7", 8);
946 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
949 strncpy(b->pins[pos].name, "J19-8", 8);
950 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
951 b->pins[pos].gpio.pinmap = 131;
952 b->pins[pos].gpio.mux_total = 0;
953 b->pins[pos].uart.pinmap = 0;
954 b->pins[pos].uart.parent_id = 0;
955 b->pins[pos].uart.mux_total = 0;
958 strncpy(b->pins[pos].name, "J19-9", 8);
959 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
960 b->pins[pos].gpio.pinmap = 14;
961 b->pins[pos].gpio.mux_total = 0;
964 strncpy(b->pins[pos].name, "J19-10", 8);
965 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
966 b->pins[pos].gpio.pinmap = 40;
967 b->pins[pos].gpio.mux_total = 0;
969 strncpy(b->pins[pos].name, "J19-11", 8);
970 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
971 b->pins[pos].gpio.pinmap = 43;
972 b->pins[pos].gpio.mux_total = 0;
974 strncpy(b->pins[pos].name, "J19-12", 8);
975 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
976 b->pins[pos].gpio.pinmap = 77;
977 b->pins[pos].gpio.mux_total = 0;
979 strncpy(b->pins[pos].name, "J19-13", 8);
980 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
981 b->pins[pos].gpio.pinmap = 82;
982 b->pins[pos].gpio.mux_total = 0;
984 strncpy(b->pins[pos].name, "J19-14", 8);
985 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
986 b->pins[pos].gpio.pinmap = 83;
987 b->pins[pos].gpio.mux_total = 0;
990 strncpy(b->pins[pos].name, "J20-1", 8);
991 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
993 strncpy(b->pins[pos].name, "J20-2", 8);
994 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
996 strncpy(b->pins[pos].name, "J20-3", 8);
997 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
999 strncpy(b->pins[pos].name, "J20-4", 8);
1000 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1001 b->pins[pos].gpio.pinmap = 45;
1002 b->pins[pos].gpio.mux_total = 0;
1004 strncpy(b->pins[pos].name, "J20-5", 8);
1005 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1006 b->pins[pos].gpio.pinmap = 47;
1007 b->pins[pos].gpio.mux_total = 0;
1009 strncpy(b->pins[pos].name, "J20-6", 8);
1010 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1011 b->pins[pos].gpio.pinmap = 49;
1012 b->pins[pos].gpio.mux_total = 0;
1014 strncpy(b->pins[pos].name, "J20-7", 8);
1015 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1016 b->pins[pos].gpio.pinmap = 15;
1017 b->pins[pos].gpio.mux_total = 0;
1019 strncpy(b->pins[pos].name, "J20-8", 8);
1020 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1021 b->pins[pos].gpio.pinmap = 84;
1022 b->pins[pos].gpio.mux_total = 0;
1024 strncpy(b->pins[pos].name, "J20-9", 8);
1025 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1026 b->pins[pos].gpio.pinmap = 42;
1027 b->pins[pos].gpio.mux_total = 0;
1029 strncpy(b->pins[pos].name, "J20-10", 8);
1030 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1031 b->pins[pos].gpio.pinmap = 41;
1032 b->pins[pos].gpio.mux_total = 0;
1034 strncpy(b->pins[pos].name, "J20-11", 8);
1035 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1036 b->pins[pos].gpio.pinmap = 78;
1037 b->pins[pos].gpio.mux_total = 0;
1039 strncpy(b->pins[pos].name, "J20-12", 8);
1040 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1041 b->pins[pos].gpio.pinmap = 79;
1042 b->pins[pos].gpio.mux_total = 0;
1044 strncpy(b->pins[pos].name, "J20-13", 8);
1045 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1046 b->pins[pos].gpio.pinmap = 80;
1047 b->pins[pos].gpio.mux_total = 0;
1049 strncpy(b->pins[pos].name, "J20-14", 8);
1050 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1051 b->pins[pos].gpio.pinmap = 81;
1052 b->pins[pos].gpio.mux_total = 0;
1056 b->i2c_bus_count = 9;
1059 for (ici = 0; ici < 9; ici++) {
1060 b->i2c_bus[ici].bus_id = -1;
1062 b->i2c_bus[1].bus_id = 1;
1063 b->i2c_bus[1].sda = 7;
1064 b->i2c_bus[1].scl = 19;
1066 b->i2c_bus[6].bus_id = 6;
1067 b->i2c_bus[6].sda = 8;
1068 b->i2c_bus[6].scl = 6;
1070 b->spi_bus_count = 1;
1072 b->spi_bus[0].bus_id = 5;
1073 b->spi_bus[0].slave_s = 1;
1074 b->spi_bus[0].cs = 23;
1075 b->spi_bus[0].mosi = 11;
1076 b->spi_bus[0].miso = 24;
1077 b->spi_bus[0].sclk = 10;
1079 b->uart_dev_count = 1;
1080 b->def_uart_dev = 0;
1081 b->uart_dev[0].rx = 26;
1082 b->uart_dev[0].tx = 35;
1083 b->uart_dev[0].device_path = UART_DEV_PATH;
1085 return MRAA_SUCCESS;
1089 mraa_intel_edison_fab_c()
1091 mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
1096 b->platform_name = PLATFORM_NAME;
1097 // This seciton will also check if the arduino board is there
1098 tristate = mraa_gpio_init_raw(214);
1099 if (tristate == NULL) {
1100 syslog(LOG_INFO, "edison: Failed to initialise Arduino board TriState,\
1101 assuming Intel Edison Miniboard\n");
1102 if (mraa_intel_edison_miniboard(b) != MRAA_SUCCESS) {
1107 // Now Assuming the edison is attached to the Arduino board.
1108 b->phy_pin_count = 20;
1112 advance_func->gpio_dir_pre = &mraa_intel_edison_gpio_dir_pre;
1113 advance_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
1114 advance_func->gpio_close_pre = &mraa_intel_edison_gpio_close_pre;
1115 advance_func->gpio_dir_post = &mraa_intel_edison_gpio_dir_post;
1116 advance_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
1117 advance_func->i2c_set_frequency_replace = &mraa_intel_edison_i2c_freq;
1118 advance_func->aio_get_valid_fp = &mraa_intel_edison_aio_get_fp;
1119 advance_func->aio_init_pre = &mraa_intel_edison_aio_init_pre;
1120 advance_func->aio_init_post = &mraa_intel_edison_aio_init_post;
1121 advance_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
1122 advance_func->pwm_init_post = &mraa_intel_edison_pwm_init_post;
1123 advance_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
1124 advance_func->spi_init_post = &mraa_intel_edison_spi_init_post;
1125 advance_func->gpio_mode_replace = &mraa_intel_edison_gpio_mode_replace;
1126 advance_func->uart_init_pre = &mraa_intel_edison_uart_init_pre;
1127 advance_func->uart_init_post = &mraa_intel_edison_uart_init_post;
1128 advance_func->gpio_mmap_setup = &mraa_intel_edison_mmap_setup;
1130 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_EDISON_PINCOUNT);
1131 if (b->pins == NULL) {
1135 mraa_gpio_dir(tristate, MRAA_GPIO_OUT);
1136 mraa_intel_edison_misc_spi();
1139 b->adc_supported = 10;
1140 b->pwm_default_period = 5000;
1141 b->pwm_max_period = 218453;
1142 b->pwm_min_period = 1;
1144 strncpy(b->pins[0].name, "IO0", 8);
1145 b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
1146 b->pins[0].gpio.pinmap = 130;
1147 b->pins[0].gpio.parent_id = 0;
1148 b->pins[0].gpio.mux_total = 0;
1149 b->pins[0].uart.pinmap = 0;
1150 b->pins[0].uart.parent_id = 0;
1151 b->pins[0].uart.mux_total = 0;
1153 strncpy(b->pins[1].name, "IO1", 8);
1154 b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
1155 b->pins[1].gpio.pinmap = 131;
1156 b->pins[1].gpio.parent_id = 0;
1157 b->pins[1].gpio.mux_total = 0;
1158 b->pins[1].uart.pinmap = 0;
1159 b->pins[1].uart.parent_id = 0;
1160 b->pins[1].uart.mux_total = 0;
1162 strncpy(b->pins[2].name, "IO2", 8);
1163 b->pins[2].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
1164 b->pins[2].gpio.pinmap = 128;
1165 b->pins[2].gpio.parent_id = 0;
1166 b->pins[2].gpio.mux_total = 0;
1168 strncpy(b->pins[3].name, "IO3", 8);
1169 b->pins[3].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
1170 b->pins[3].gpio.pinmap = 12;
1171 b->pins[3].gpio.parent_id = 0;
1172 b->pins[3].gpio.mux_total = 0;
1173 b->pins[3].pwm.pinmap = 0;
1174 b->pins[3].pwm.parent_id = 0;
1175 b->pins[3].pwm.mux_total = 0;
1177 strncpy(b->pins[4].name, "IO4", 8);
1178 b->pins[4].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
1179 b->pins[4].gpio.pinmap = 129;
1180 b->pins[4].gpio.parent_id = 0;
1181 b->pins[4].gpio.mux_total = 0;
1183 strncpy(b->pins[5].name, "IO5", 8);
1184 b->pins[5].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0};
1185 b->pins[5].gpio.pinmap = 13;
1186 b->pins[5].gpio.parent_id = 0;
1187 b->pins[5].gpio.mux_total = 0;
1188 b->pins[5].pwm.pinmap = 1;
1189 b->pins[5].pwm.parent_id = 0;
1190 b->pins[5].pwm.mux_total = 0;
1192 strncpy(b->pins[6].name, "IO6", 8);
1193 b->pins[6].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0};
1194 b->pins[6].gpio.pinmap = 182;
1195 b->pins[6].gpio.parent_id = 0;
1196 b->pins[6].gpio.mux_total = 0;
1197 b->pins[6].pwm.pinmap = 2;
1198 b->pins[6].pwm.parent_id = 0;
1199 b->pins[6].pwm.mux_total = 0;
1201 strncpy(b->pins[7].name, "IO7", 8);
1202 b->pins[7].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
1203 b->pins[7].gpio.pinmap = 48;
1204 b->pins[7].gpio.parent_id = 0;
1205 b->pins[7].gpio.mux_total = 0;
1207 strncpy(b->pins[8].name, "IO8", 8);
1208 b->pins[8].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
1209 b->pins[8].gpio.pinmap = 49;
1210 b->pins[8].gpio.parent_id = 0;
1211 b->pins[8].gpio.mux_total = 0;
1213 strncpy(b->pins[9].name, "IO9", 8);
1214 b->pins[9].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0};
1215 b->pins[9].gpio.pinmap = 183;
1216 b->pins[9].gpio.parent_id = 0;
1217 b->pins[9].gpio.mux_total = 0;
1218 b->pins[9].pwm.pinmap = 3;
1219 b->pins[9].pwm.parent_id = 0;
1220 b->pins[9].pwm.mux_total = 0;
1222 strncpy(b->pins[10].name, "IO10", 8);
1223 b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
1224 b->pins[10].gpio.pinmap = 41;
1225 b->pins[10].gpio.parent_id = 0;
1226 b->pins[10].gpio.mux_total = 2;
1227 b->pins[10].gpio.mux[0].pin = 263;
1228 b->pins[10].gpio.mux[0].value = 1;
1229 b->pins[10].gpio.mux[1].pin = 240;
1230 b->pins[10].gpio.mux[1].value = 0;
1231 b->pins[10].spi.pinmap = 5;
1232 b->pins[10].spi.mux_total = 2;
1233 b->pins[10].spi.mux[0].pin = 263;
1234 b->pins[10].spi.mux[0].value = 1;
1235 b->pins[10].spi.mux[1].pin = 240;
1236 b->pins[10].spi.mux[1].value = 1;
1238 strncpy(b->pins[11].name, "IO11", 8);
1239 b->pins[11].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
1240 b->pins[11].gpio.pinmap = 43;
1241 b->pins[11].gpio.parent_id = 0;
1242 b->pins[11].gpio.mux_total = 2;
1243 b->pins[11].gpio.mux[0].pin = 262;
1244 b->pins[11].gpio.mux[0].value = 1;
1245 b->pins[11].gpio.mux[1].pin = 241;
1246 b->pins[11].gpio.mux[1].value = 0;
1247 b->pins[11].spi.pinmap = 5;
1248 b->pins[11].spi.mux_total = 2;
1249 b->pins[11].spi.mux[0].pin = 262;
1250 b->pins[11].spi.mux[0].value = 1;
1251 b->pins[11].spi.mux[1].pin = 241;
1252 b->pins[11].spi.mux[1].value = 1;
1254 strncpy(b->pins[12].name, "IO12", 8);
1255 b->pins[12].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
1256 b->pins[12].gpio.pinmap = 42;
1257 b->pins[12].gpio.parent_id = 0;
1258 b->pins[12].gpio.mux_total = 1;
1259 b->pins[12].gpio.mux[0].pin = 242;
1260 b->pins[12].gpio.mux[0].value = 0;
1261 b->pins[12].spi.pinmap = 5;
1262 b->pins[12].spi.mux_total = 1;
1263 b->pins[12].spi.mux[0].pin = 242;
1264 b->pins[12].spi.mux[0].value = 1;
1266 strncpy(b->pins[13].name, "IO13", 8);
1267 b->pins[13].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
1268 b->pins[13].gpio.pinmap = 40;
1269 b->pins[13].gpio.parent_id = 0;
1270 b->pins[13].gpio.mux_total = 1;
1271 b->pins[13].gpio.mux[0].pin = 243;
1272 b->pins[13].gpio.mux[0].value = 0;
1273 b->pins[13].spi.pinmap = 5;
1274 b->pins[13].spi.mux_total = 1;
1275 b->pins[13].spi.mux[0].pin = 243;
1276 b->pins[13].spi.mux[0].value = 1;
1278 strncpy(b->pins[14].name, "A0", 8);
1279 b->pins[14].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
1280 b->pins[14].aio.pinmap = 0;
1281 b->pins[14].aio.mux_total = 1;
1282 b->pins[14].aio.mux[0].pin = 200;
1283 b->pins[14].aio.mux[0].value = 1;
1284 b->pins[14].gpio.pinmap = 44;
1285 b->pins[14].gpio.mux_total = 1;
1286 b->pins[14].gpio.mux[0].pin = 200;
1287 b->pins[14].gpio.mux[0].value = 0;
1289 strncpy(b->pins[15].name, "A1", 8);
1290 b->pins[15].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
1291 b->pins[15].aio.pinmap = 1;
1292 b->pins[15].aio.mux_total = 1;
1293 b->pins[15].aio.mux[0].pin = 201;
1294 b->pins[15].aio.mux[0].value = 1;
1295 b->pins[15].gpio.pinmap = 45;
1296 b->pins[15].gpio.mux_total = 1;
1297 b->pins[15].gpio.mux[0].pin = 201;
1298 b->pins[15].gpio.mux[0].value = 0;
1300 strncpy(b->pins[16].name, "A2", 8);
1301 b->pins[16].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
1302 b->pins[16].aio.pinmap = 2;
1303 b->pins[16].aio.mux_total = 1;
1304 b->pins[16].aio.mux[0].pin = 202;
1305 b->pins[16].aio.mux[0].value = 1;
1306 b->pins[16].gpio.pinmap = 46;
1307 b->pins[16].gpio.mux_total = 1;
1308 b->pins[16].gpio.mux[0].pin = 202;
1309 b->pins[16].gpio.mux[0].value = 0;
1311 strncpy(b->pins[17].name, "A3", 8);
1312 b->pins[17].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
1313 b->pins[17].aio.pinmap = 3;
1314 b->pins[17].aio.mux_total = 1;
1315 b->pins[17].aio.mux[0].pin = 203;
1316 b->pins[17].aio.mux[0].value = 1;
1317 b->pins[17].gpio.pinmap = 47;
1318 b->pins[17].gpio.mux_total = 1;
1319 b->pins[17].gpio.mux[0].pin = 203;
1320 b->pins[17].gpio.mux[0].value = 0;
1322 strncpy(b->pins[18].name, "A4", 8);
1323 b->pins[18].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1,0};
1324 b->pins[18].i2c.pinmap = 1;
1325 b->pins[18].i2c.mux_total = 1;
1326 b->pins[18].i2c.mux[0].pin = 204;
1327 b->pins[18].i2c.mux[0].value = 0;
1328 b->pins[18].aio.pinmap = 4;
1329 b->pins[18].aio.mux_total = 1;
1330 b->pins[18].aio.mux[0].pin = 204;
1331 b->pins[18].aio.mux[0].value = 1;
1332 b->pins[18].gpio.pinmap = 14;
1333 b->pins[18].gpio.mux_total = 1;
1334 b->pins[18].gpio.mux[0].pin = 204;
1335 b->pins[18].gpio.mux[0].value = 0;
1337 strncpy(b->pins[19].name, "A5", 8);
1338 b->pins[19].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1,0};
1339 b->pins[19].i2c.pinmap = 1;
1340 b->pins[19].i2c.mux_total = 1;
1341 b->pins[19].i2c.mux[0].pin = 205;
1342 b->pins[19].i2c.mux[0].value = 0;
1343 b->pins[19].aio.pinmap = 5;
1344 b->pins[19].aio.mux_total = 1;
1345 b->pins[19].aio.mux[0].pin = 205;
1346 b->pins[19].aio.mux[0].value = 1;
1347 b->pins[19].gpio.pinmap = 165;
1348 b->pins[19].gpio.mux_total = 1;
1349 b->pins[19].gpio.mux[0].pin = 205;
1350 b->pins[19].gpio.mux[0].value = 0;
1353 b->i2c_bus_count = 9;
1356 for (ici = 0; ici < 9; ici++) {
1357 b->i2c_bus[ici].bus_id = -1;
1359 b->i2c_bus[6].bus_id = 6;
1360 b->i2c_bus[6].sda = 18;
1361 b->i2c_bus[6].scl = 19;
1363 b->spi_bus_count = 1;
1365 b->spi_bus[0].bus_id = 5;
1366 b->spi_bus[0].slave_s = 1;
1367 b->spi_bus[0].cs = 10;
1368 b->spi_bus[0].mosi = 11;
1369 b->spi_bus[0].miso = 12;
1370 b->spi_bus[0].sclk = 13;
1372 b->uart_dev_count = 1;
1373 b->def_uart_dev = 0;
1374 b->uart_dev[0].rx = 0;
1375 b->uart_dev[0].tx = 1;
1376 b->uart_dev[0].device_path = UART_DEV_PATH;
1379 for (il =0; il < MRAA_INTEL_EDISON_PINCOUNT; il++) {
1380 pinmodes[il].gpio.sysfs = -1;
1381 pinmodes[il].gpio.mode = -1;
1382 pinmodes[il].pwm.sysfs = -1;
1383 pinmodes[il].pwm.mode = -1;
1384 pinmodes[il].i2c.sysfs = -1;
1385 pinmodes[il].i2c.mode = -1;
1386 pinmodes[il].spi.sysfs = -1;
1387 pinmodes[il].spi.mode = -1;
1388 pinmodes[il].uart.sysfs = -1;
1389 pinmodes[il].uart.mode = -1;
1391 pinmodes[0].gpio.sysfs = 130;
1392 pinmodes[0].gpio.mode = 0;
1393 pinmodes[0].uart.sysfs = 130;
1394 pinmodes[0].uart.mode = 1;
1395 pinmodes[1].gpio.sysfs = 131;
1396 pinmodes[1].gpio.mode = 0;
1397 pinmodes[1].uart.sysfs = 131;
1398 pinmodes[1].uart.mode = 1;
1399 pinmodes[2].gpio.sysfs = 128;
1400 pinmodes[2].gpio.mode = 0;
1401 pinmodes[2].uart.sysfs = 128;
1402 pinmodes[2].uart.mode = 1;
1403 pinmodes[3].gpio.sysfs = 12;
1404 pinmodes[3].gpio.mode = 0;
1405 pinmodes[3].pwm.sysfs = 12;
1406 pinmodes[3].pwm.mode = 1;
1408 pinmodes[4].gpio.sysfs = 129;
1409 pinmodes[4].gpio.mode = 0;
1410 pinmodes[4].uart.sysfs = 129;
1411 pinmodes[4].uart.mode = 1;
1412 pinmodes[5].gpio.sysfs = 13;
1413 pinmodes[5].gpio.mode = 0;
1414 pinmodes[5].pwm.sysfs = 13;
1415 pinmodes[5].pwm.mode = 1;
1416 pinmodes[6].gpio.sysfs = 182;
1417 pinmodes[6].gpio.mode = 0;
1418 pinmodes[6].pwm.sysfs = 182;
1419 pinmodes[6].pwm.mode = 1;
1421 //7 and 8 are provided by something on i2c, very simplepinmodes[3].gpio.sysfs = 12;
1422 pinmodes[9].gpio.sysfs = 183;
1423 pinmodes[9].gpio.mode = 0;
1424 pinmodes[9].pwm.sysfs = 183;
1425 pinmodes[9].pwm.mode = 1;
1427 pinmodes[10].gpio.sysfs = 41;
1428 pinmodes[10].gpio.mode = 0;
1429 pinmodes[10].spi.sysfs = 111; // Different pin provides, switched at mux level.
1430 pinmodes[10].spi.mode = 1;
1432 pinmodes[11].gpio.sysfs = 43;
1433 pinmodes[11].gpio.mode = 0;
1434 pinmodes[11].spi.sysfs = 115; // Different pin provides, switched at mux level.
1435 pinmodes[11].spi.mode = 1;
1437 pinmodes[12].gpio.sysfs = 42;
1438 pinmodes[12].gpio.mode = 0;
1439 pinmodes[12].spi.sysfs = 114; // Different pin provides, switched at mux level.
1440 pinmodes[12].spi.mode = 1;
1442 pinmodes[13].gpio.sysfs = 40;
1443 pinmodes[13].gpio.mode = 0;
1444 pinmodes[13].spi.sysfs = 109; // Different pin provides, switched at mux level.
1445 pinmodes[13].spi.mode = 1;
1446 //Everything else but A4 A5 LEAVE
1447 pinmodes[18].gpio.sysfs = 14;
1448 pinmodes[18].gpio.mode = 0;
1449 pinmodes[18].i2c.sysfs = 28;
1450 pinmodes[18].i2c.mode = 1;
1452 pinmodes[19].gpio.sysfs = 165;
1453 pinmodes[19].gpio.mode = 0;
1454 pinmodes[19].i2c.sysfs = 27;
1455 pinmodes[19].i2c.mode = 1;
1459 syslog(LOG_CRIT, "edison: Arduino board failed to initialise");