2 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
3 * Copyright (c) 2014 Intel Corporation.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
31 #include "x86/intel_edison_fab_c.h"
33 #define PLATFORM_NAME "Intel Edison"
34 #define SYSFS_CLASS_GPIO "/sys/class/gpio"
35 #define SYSFS_PINMODE_PATH "/sys/kernel/debug/gpio_debug/gpio"
37 #define MAX_MODE_SIZE 8
39 // This is an absolute path to a resource file found within sysfs.
40 // Might not always be correct. First thing to check if mmap stops
41 // working. Check the device for 0x1199 and Intel Vendor (0x8086)
42 #define MMAP_PATH "/sys/devices/pci0000:00/0000:00:0c.0/resource0"
47 } mraa_intel_edision_pindef_t;
50 mraa_intel_edision_pindef_t gpio;
51 mraa_intel_edision_pindef_t pwm;
52 mraa_intel_edision_pindef_t i2c;
53 mraa_intel_edision_pindef_t spi;
54 mraa_intel_edision_pindef_t uart;
55 } mraa_intel_edison_pinmodes_t;
57 static mraa_gpio_context tristate;
59 static mraa_intel_edison_pinmodes_t pinmodes[MRAA_INTEL_EDISON_PINCOUNT];
60 static unsigned int outputen[] = {248,249,250,251,252,253,254,255,256,257,258,259,260,261,232,233,234,235,236,237};
61 static mraa_gpio_context agpioOutputen[sizeof(outputen)/sizeof(outputen[0])];
63 static unsigned int pullup_map[] = {216,217,218,219,220,221,222,223,224,225,226,227,228,229,208,209,210,211,212,213};
64 static int miniboard = 0;
67 static uint8_t *mmap_reg = NULL;
68 static int mmap_fd = 0;
70 static unsigned int mmap_count = 0;
73 mraa_intel_edison_pinmode_change(int sysfs, int mode)
79 char buffer[MAX_SIZE];
80 snprintf(buffer, MAX_SIZE, SYSFS_PINMODE_PATH "%i/current_pinmux",sysfs);
81 int modef = open(buffer, O_WRONLY);
83 syslog(LOG_ERR, "edison: Failed to open SoC pinmode for opening");
84 return MRAA_ERROR_INVALID_RESOURCE;
87 mraa_result_t ret = MRAA_SUCCESS;
88 char mode_buf[MAX_MODE_SIZE];
89 int length = sprintf(mode_buf, "mode%u",mode);
90 if (write(modef, mode_buf, length*sizeof(char)) == -1) {
91 ret = MRAA_ERROR_INVALID_RESOURCE;
99 mraa_intel_edison_gpio_dir_pre(mraa_gpio_context dev, gpio_dir_t dir)
102 if (dev->phy_pin >= 0) {
103 if (mraa_gpio_write(tristate, 0) != MRAA_SUCCESS) {
104 // call can sometimes fail, this does not actually mean much except
105 // that the kernel drivers don't always behave very well
106 syslog(LOG_NOTICE, "edison: Failed to write to tristate");
108 int pin = dev->phy_pin;
110 if (!agpioOutputen[pin]) {
111 agpioOutputen[pin] = mraa_gpio_init_raw(outputen[pin]);
112 if (agpioOutputen[pin] == NULL) {
113 return MRAA_ERROR_INVALID_RESOURCE;
115 if (mraa_gpio_dir(agpioOutputen[pin], MRAA_GPIO_OUT) != MRAA_SUCCESS) {
116 return MRAA_ERROR_INVALID_RESOURCE;
120 if (dir == MRAA_GPIO_OUT) {
123 if (mraa_gpio_write(agpioOutputen[pin], output_val) != MRAA_SUCCESS) {
124 return MRAA_ERROR_INVALID_RESOURCE;
132 mraa_intel_edison_gpio_dir_post(mraa_gpio_context dev, gpio_dir_t dir)
134 if (dev->phy_pin >= 0) {
135 return mraa_gpio_write(tristate, 1);
141 mraa_intel_edison_gpio_init_post(mraa_gpio_context dev)
144 return MRAA_ERROR_INVALID_RESOURCE;
148 if (miniboard == 1) {
152 sysfs = pinmodes[dev->phy_pin].gpio.sysfs;
153 mode = pinmodes[dev->phy_pin].gpio.mode;
156 return mraa_intel_edison_pinmode_change(sysfs, mode);
160 mraa_intel_edison_gpio_close_pre(mraa_gpio_context dev)
162 if (dev->phy_pin >= 0) {
163 int pin = dev->phy_pin;
164 if (agpioOutputen[pin]) {
165 mraa_gpio_close(agpioOutputen[pin]);
166 agpioOutputen[pin] = NULL;
173 mraa_intel_edison_i2c_init_pre(unsigned int bus)
175 if (miniboard == 0) {
177 syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
180 mraa_gpio_write(tristate, 0);
181 mraa_gpio_context io18_gpio = mraa_gpio_init_raw(14);
182 mraa_gpio_context io19_gpio = mraa_gpio_init_raw(165);
183 mraa_gpio_dir(io18_gpio, MRAA_GPIO_IN);
184 mraa_gpio_dir(io19_gpio, MRAA_GPIO_IN);
185 mraa_gpio_close(io18_gpio);
186 mraa_gpio_close(io19_gpio);
188 mraa_gpio_context io18_enable = mraa_gpio_init_raw(236);
189 mraa_gpio_context io19_enable = mraa_gpio_init_raw(237);
190 mraa_gpio_dir(io18_enable, MRAA_GPIO_OUT);
191 mraa_gpio_dir(io19_enable, MRAA_GPIO_OUT);
192 mraa_gpio_write(io18_enable, 0);
193 mraa_gpio_write(io19_enable, 0);
194 mraa_gpio_close(io18_enable);
195 mraa_gpio_close(io19_enable);
197 mraa_gpio_context io18_pullup = mraa_gpio_init_raw(212);
198 mraa_gpio_context io19_pullup = mraa_gpio_init_raw(213);
199 mraa_gpio_dir(io18_pullup, MRAA_GPIO_IN);
200 mraa_gpio_dir(io19_pullup, MRAA_GPIO_IN);
201 mraa_gpio_close(io18_pullup);
202 mraa_gpio_close(io19_pullup);
204 mraa_intel_edison_pinmode_change(28, 1);
205 mraa_intel_edison_pinmode_change(27, 1);
207 mraa_gpio_write(tristate, 1);
209 if(bus != 6 && bus != 1) {
210 syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
213 int scl = plat->pins[plat->i2c_bus[bus].scl].gpio.pinmap;
214 int sda = plat->pins[plat->i2c_bus[bus].sda].gpio.pinmap;
215 mraa_intel_edison_pinmode_change(sda, 1);
216 mraa_intel_edison_pinmode_change(scl, 1);
223 mraa_intel_edison_misc_spi()
225 mraa_gpio_write(tristate, 0);
227 mraa_gpio_context io10_p1 = mraa_gpio_init_raw(263);
228 mraa_gpio_context io10_p2 = mraa_gpio_init_raw(240);
229 mraa_gpio_context io11_p1 = mraa_gpio_init_raw(262);
230 mraa_gpio_context io11_p2 = mraa_gpio_init_raw(241);
231 mraa_gpio_context io12_p1 = mraa_gpio_init_raw(242);
232 mraa_gpio_context io13_p1 = mraa_gpio_init_raw(243);
233 mraa_gpio_dir(io10_p1, MRAA_GPIO_OUT);
234 mraa_gpio_dir(io10_p2, MRAA_GPIO_OUT);
235 mraa_gpio_dir(io11_p1, MRAA_GPIO_OUT);
236 mraa_gpio_dir(io11_p2, MRAA_GPIO_OUT);
237 mraa_gpio_dir(io12_p1, MRAA_GPIO_OUT);
238 mraa_gpio_dir(io13_p1, MRAA_GPIO_OUT);
240 mraa_gpio_write(io10_p1, 1);
241 mraa_gpio_write(io10_p2, 0);
242 mraa_gpio_write(io11_p1, 1);
243 mraa_gpio_write(io11_p2, 0);
244 mraa_gpio_write(io12_p1, 0);
245 mraa_gpio_write(io13_p1, 0);
247 mraa_gpio_close(io10_p1);
248 mraa_gpio_close(io10_p2);
249 mraa_gpio_close(io11_p1);
250 mraa_gpio_close(io11_p2);
251 mraa_gpio_close(io12_p1);
252 mraa_gpio_close(io13_p1);
254 mraa_intel_edison_pinmode_change(111, 1);
255 mraa_intel_edison_pinmode_change(115, 1);
256 mraa_intel_edison_pinmode_change(114, 1);
257 mraa_intel_edison_pinmode_change(109, 1);
258 mraa_gpio_write(tristate, 1);
264 mraa_intel_edison_aio_get_fp(mraa_aio_context dev)
266 char file_path[64]= "";
268 snprintf(file_path, 64, "/sys/bus/iio/devices/iio:device1/in_voltage%d_raw",
271 dev->adc_in_fp = open(file_path, O_RDONLY);
272 if (dev->adc_in_fp == -1) {
273 syslog(LOG_ERR, "edison: Failed to open Analog input raw file %s for "
274 "reading!", file_path);
275 return MRAA_ERROR_INVALID_RESOURCE;
282 mraa_intel_edison_aio_init_pre(unsigned int aio)
284 if (aio > plat->aio_count) {
285 syslog(LOG_ERR, "edison: Invalid analog input channel");
286 return MRAA_ERROR_INVALID_RESOURCE;
290 mraa_gpio_context output_e;
291 output_e = mraa_gpio_init_raw(outputen[pin]);
292 if (output_e == NULL) {
293 return MRAA_ERROR_INVALID_RESOURCE;
295 if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
296 mraa_gpio_close(output_e);
297 return MRAA_ERROR_INVALID_RESOURCE;
299 if (mraa_gpio_write(output_e, 0) != MRAA_SUCCESS) {
300 mraa_gpio_close(output_e);
301 return MRAA_ERROR_INVALID_RESOURCE;
303 mraa_gpio_close(output_e);
305 mraa_gpio_context pullup_pin;
306 pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
307 if (pullup_pin == NULL) {
308 return MRAA_ERROR_INVALID_RESOURCE;
310 if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS) {
311 mraa_gpio_close(pullup_pin);
312 return MRAA_ERROR_INVALID_RESOURCE;
314 mraa_gpio_close(pullup_pin);
320 mraa_intel_edison_aio_init_post(mraa_aio_context dev)
322 return mraa_gpio_write(tristate, 1);
326 mraa_intel_edison_pwm_init_pre(int pin)
328 if (miniboard == 1) {
329 return mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
331 if (pin < 0 || pin > 19) {
332 return MRAA_ERROR_INVALID_RESOURCE;
335 if (!plat->pins[pin].capabilites.pwm) {
336 return MRAA_ERROR_INVALID_RESOURCE;
339 mraa_gpio_context output_e;
340 output_e = mraa_gpio_init_raw(outputen[pin]);
341 if (output_e == NULL) {
342 return MRAA_ERROR_INVALID_RESOURCE;
344 if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
345 mraa_gpio_close(output_e);
346 return MRAA_ERROR_INVALID_RESOURCE;
348 if (mraa_gpio_write(output_e, 1) != MRAA_SUCCESS) {
349 mraa_gpio_close(output_e);
350 return MRAA_ERROR_INVALID_RESOURCE;
352 mraa_gpio_close(output_e);
354 mraa_gpio_context pullup_pin;
355 pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
356 if (pullup_pin == NULL) {
357 return MRAA_ERROR_INVALID_RESOURCE;
359 if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS) {
360 mraa_gpio_close(pullup_pin);
361 return MRAA_ERROR_INVALID_RESOURCE;
363 mraa_gpio_close(pullup_pin);
364 mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
370 mraa_intel_edison_pwm_init_post(mraa_pwm_context pwm)
372 return mraa_gpio_write(tristate, 1);
376 mraa_intel_edison_spi_init_pre(int bus)
378 if (miniboard == 1) {
379 mraa_intel_edison_pinmode_change(111, 1);
380 mraa_intel_edison_pinmode_change(115, 1);
381 mraa_intel_edison_pinmode_change(114, 1);
382 mraa_intel_edison_pinmode_change(109, 1);
385 mraa_gpio_write(tristate, 0);
387 mraa_gpio_context io10_out = mraa_gpio_init_raw(258);
388 mraa_gpio_context io11_out = mraa_gpio_init_raw(259);
389 mraa_gpio_context io12_out = mraa_gpio_init_raw(260);
390 mraa_gpio_context io13_out = mraa_gpio_init_raw(261);
391 mraa_gpio_dir(io10_out, MRAA_GPIO_OUT);
392 mraa_gpio_dir(io11_out, MRAA_GPIO_OUT);
393 mraa_gpio_dir(io12_out, MRAA_GPIO_OUT);
394 mraa_gpio_dir(io13_out, MRAA_GPIO_OUT);
396 mraa_gpio_write(io10_out, 1);
397 mraa_gpio_write(io11_out, 1);
398 mraa_gpio_write(io12_out, 0);
399 mraa_gpio_write(io13_out, 1);
401 mraa_gpio_close(io10_out);
402 mraa_gpio_close(io11_out);
403 mraa_gpio_close(io12_out);
404 mraa_gpio_close(io13_out);
406 mraa_gpio_context io10_pull = mraa_gpio_init_raw(226);
407 mraa_gpio_context io11_pull = mraa_gpio_init_raw(227);
408 mraa_gpio_context io12_pull = mraa_gpio_init_raw(228);
409 mraa_gpio_context io13_pull = mraa_gpio_init_raw(229);
411 mraa_gpio_dir(io10_pull, MRAA_GPIO_IN);
412 mraa_gpio_dir(io11_pull, MRAA_GPIO_IN);
413 mraa_gpio_dir(io12_pull, MRAA_GPIO_IN);
414 mraa_gpio_dir(io13_pull, MRAA_GPIO_IN);
416 mraa_gpio_close(io10_pull);
417 mraa_gpio_close(io11_pull);
418 mraa_gpio_close(io12_pull);
419 mraa_gpio_close(io13_pull);
425 mraa_intel_edison_spi_init_post(mraa_spi_context spi)
427 return mraa_gpio_write(tristate, 1);
431 mraa_intel_edison_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mode)
433 if (dev->value_fp != -1) {
434 if (close(dev->value_fp) != 0) {
435 return MRAA_ERROR_INVALID_RESOURCE;
440 mraa_gpio_context pullup_e;
441 pullup_e = mraa_gpio_init_raw(pullup_map[dev->phy_pin]);
442 if (pullup_e == NULL) {
443 return MRAA_ERROR_INVALID_RESOURCE;
445 if (mraa_gpio_dir(pullup_e, MRAA_GPIO_IN) != MRAA_SUCCESS) {
446 syslog(LOG_ERR, "edison: Failed to set gpio mode-pullup");
447 mraa_gpio_close(pullup_e);
448 return MRAA_ERROR_INVALID_RESOURCE;
453 case MRAA_GPIO_STRONG:
455 case MRAA_GPIO_PULLUP:
458 case MRAA_GPIO_PULLDOWN:
465 return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
468 if (mraa_gpio_dir(pullup_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
469 syslog(LOG_ERR, "edison: Error setting pullup");
470 mraa_gpio_close(pullup_e);
471 return MRAA_ERROR_INVALID_RESOURCE;
473 if (mraa_gpio_write(pullup_e, value)!= MRAA_SUCCESS) {
474 syslog(LOG_ERR, "edison: Error setting pullup");
475 mraa_gpio_close(pullup_e);
476 return MRAA_ERROR_INVALID_RESOURCE;
480 return mraa_gpio_close(pullup_e);
484 mraa_intel_edsion_mb_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode)
486 if (dev->value_fp != -1) {
487 if (close(dev->value_fp) != 0) {
488 return MRAA_ERROR_INVALID_RESOURCE;
493 char filepath[MAX_SIZE];
494 snprintf(filepath, MAX_SIZE,
495 SYSFS_PINMODE_PATH "%d/current_pullmode", dev->pin);
497 int drive = open(filepath, O_WRONLY);
499 syslog(LOG_ERR, "edison: Failed to open drive for writing");
500 return MRAA_ERROR_INVALID_RESOURCE;
506 case MRAA_GPIO_STRONG:
509 case MRAA_GPIO_PULLUP:
510 length = snprintf(bu, sizeof(bu), "pullup");
512 case MRAA_GPIO_PULLDOWN:
513 length = snprintf(bu, sizeof(bu), "pulldown");
516 length = snprintf(bu, sizeof(bu), "nopull");
520 return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
522 if (write(drive, bu, length*sizeof(char)) == -1) {
523 syslog(LOG_ERR, "edison: Failed to write to drive mode");
525 return MRAA_ERROR_INVALID_RESOURCE;
528 if (close(drive) != 0) {
529 return MRAA_ERROR_INVALID_RESOURCE;
535 mraa_intel_edison_uart_init_pre(int index)
537 if (miniboard == 0) {
538 mraa_gpio_write(tristate, 0);
539 mraa_gpio_context io0_output = mraa_gpio_init_raw(248);
540 mraa_gpio_context io0_pullup = mraa_gpio_init_raw(216);
541 mraa_gpio_context io1_output = mraa_gpio_init_raw(249);
542 mraa_gpio_context io1_pullup = mraa_gpio_init_raw(217);
543 mraa_gpio_dir(io0_output, MRAA_GPIO_OUT);
544 mraa_gpio_dir(io0_pullup, MRAA_GPIO_OUT);
545 mraa_gpio_dir(io1_output, MRAA_GPIO_OUT);
546 mraa_gpio_dir(io1_pullup, MRAA_GPIO_IN);
548 mraa_gpio_write(io0_output, 0);
549 mraa_gpio_write(io0_pullup, 0);
550 mraa_gpio_write(io1_output, 1);
552 mraa_gpio_close(io0_output);
553 mraa_gpio_close(io0_pullup);
554 mraa_gpio_close(io1_output);
555 mraa_gpio_close(io1_pullup);
558 ret = mraa_intel_edison_pinmode_change(130,1); //IO0 RX
559 ret = mraa_intel_edison_pinmode_change(131,1); //IO1 TX
564 mraa_intel_edison_uart_init_post(mraa_uart_context uart)
566 return mraa_gpio_write(tristate, 1);
570 mraa_intel_edsion_mmap_unsetup()
572 if (mmap_reg == NULL) {
573 syslog(LOG_ERR, "edison mmap: null register cant unsetup");
574 return MRAA_ERROR_INVALID_RESOURCE;
576 munmap(mmap_reg, mmap_size);
578 if (close(mmap_fd) != 0) {
579 return MRAA_ERROR_INVALID_RESOURCE;
585 mraa_intel_edison_mmap_write(mraa_gpio_context dev, int value)
587 uint8_t offset = ((dev->pin / 32) * sizeof(uint32_t));
596 *(volatile uint32_t*) (mmap_reg + offset + valoff) =
597 (uint32_t)(1 << (dev->pin % 32));
603 mraa_intel_edison_mmap_read(mraa_gpio_context dev)
605 uint8_t offset = ((dev->pin / 32) * sizeof(uint32_t));
608 value = *(volatile uint32_t*) (mmap_reg +0x04+ offset);
609 if (value&(uint32_t)(1 << (dev->pin % 32))) {
616 mraa_intel_edison_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
619 syslog(LOG_ERR, "edison mmap: context not valid");
620 return MRAA_ERROR_INVALID_HANDLE;
624 if (dev->mmap_write == NULL && dev->mmap_read == NULL) {
625 syslog(LOG_ERR, "edison mmap: can't disable disabled mmap gpio");
626 return MRAA_ERROR_INVALID_PARAMETER;
628 dev->mmap_write = NULL;
629 dev->mmap_read = NULL;
631 if (mmap_count == 0) {
632 return mraa_intel_edsion_mmap_unsetup();
637 if (dev->mmap_write != NULL && dev->mmap_read != NULL) {
638 syslog(LOG_ERR, "edison mmap: can't enable enabled mmap gpio");
639 return MRAA_ERROR_INVALID_PARAMETER;
642 //Might need to make some elements of this thread safe.
643 //For example only allow one thread to enter the following block
644 //to prevent mmap'ing twice.
645 if (mmap_reg == NULL) {
646 if ((mmap_fd = open(MMAP_PATH, O_RDWR)) < 0) {
647 syslog(LOG_ERR, "edison map: unable to open resource0 file");
648 return MRAA_ERROR_INVALID_HANDLE;
652 fstat(mmap_fd, &fd_stat);
653 mmap_size = fd_stat.st_size;
655 mmap_reg = (uint8_t*) mmap(NULL, fd_stat.st_size,
656 PROT_READ | PROT_WRITE,
657 MAP_FILE | MAP_SHARED,
659 if (mmap_reg == MAP_FAILED) {
660 syslog(LOG_ERR, "edison mmap: failed to mmap");
663 return MRAA_ERROR_NO_RESOURCES;
666 dev->mmap_write = &mraa_intel_edison_mmap_write;
667 dev->mmap_read = &mraa_intel_edison_mmap_read;
674 mraa_intel_edison_i2c_freq(mraa_i2c_context dev, mraa_i2c_mode_t mode)
676 if (dev->busnum == 6) {
677 int sysnode = open("/sys/devices/pci0000:00/0000:00:09.1/i2c_dw_sysnode", O_RDWR);
679 return MRAA_ERROR_INVALID_RESOURCE;
686 length = snprintf(bu, sizeof(bu), "std");
689 length = snprintf(bu, sizeof(bu), "fast");
692 length = snprintf(bu, sizeof(bu), "high");
695 if (write(sysnode, bu, length*sizeof(char)) == -1) {
697 return MRAA_ERROR_INVALID_RESOURCE;
702 return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
706 mraa_intel_edison_miniboard(mraa_board_t* b)
709 b->phy_pin_count = 56;
710 b->gpio_count = 56; // A bit of a hack I suppose
712 b->pwm_default_period = 5000;
713 b->pwm_max_period = 218453;
714 b->pwm_min_period = 1;
716 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*56);
717 if (b->pins == NULL) {
718 return MRAA_ERROR_UNSPECIFIED;
721 advance_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
723 advance_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
724 advance_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
725 advance_func->i2c_set_frequency_replace = &mraa_intel_edison_i2c_freq;
726 advance_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
727 advance_func->gpio_mode_replace = &mraa_intel_edsion_mb_gpio_mode;
728 advance_func->uart_init_pre = &mraa_intel_edison_uart_init_pre;
729 advance_func->gpio_mmap_setup = &mraa_intel_edison_mmap_setup;
732 strncpy(b->pins[pos].name, "J17-1", 8);
733 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
734 b->pins[pos].gpio.pinmap = 182;
735 b->pins[pos].gpio.mux_total = 0;
736 b->pins[pos].pwm.pinmap = 2;
737 b->pins[pos].pwm.parent_id = 0;
738 b->pins[pos].pwm.mux_total = 0;
741 strncpy(b->pins[pos].name, "J17-2", 8);
742 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
744 strncpy(b->pins[pos].name, "J17-3", 8);
745 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
747 strncpy(b->pins[pos].name, "J17-4", 8);
748 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
751 strncpy(b->pins[pos].name, "J17-5", 8);
752 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
753 b->pins[pos].gpio.pinmap = 135;
754 b->pins[pos].gpio.mux_total = 0;
757 strncpy(b->pins[pos].name, "J17-6", 8);
758 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
761 strncpy(b->pins[pos].name, "J17-7", 8);
762 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
763 b->pins[pos].gpio.pinmap = 27;
764 b->pins[pos].gpio.mux_total = 0;
765 b->pins[pos].i2c.pinmap = 1;
766 b->pins[pos].i2c.mux_total = 0;
769 strncpy(b->pins[pos].name, "J17-8", 8);
770 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
771 b->pins[pos].gpio.pinmap = 20;
772 b->pins[pos].gpio.mux_total = 0;
773 b->pins[pos].i2c.pinmap = 1;
774 b->pins[pos].i2c.mux_total = 0;
777 strncpy(b->pins[pos].name, "J17-9", 8);
778 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
779 b->pins[pos].gpio.pinmap = 28;
780 b->pins[pos].gpio.mux_total = 0;
781 b->pins[pos].i2c.pinmap = 1;
782 b->pins[pos].i2c.mux_total = 0;
785 strncpy(b->pins[pos].name, "J17-10", 8);
786 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
787 b->pins[pos].gpio.pinmap = 111;
788 b->pins[pos].gpio.mux_total = 0;
789 b->pins[pos].spi.pinmap = 5;
790 b->pins[pos].spi.mux_total = 0;
793 strncpy(b->pins[pos].name, "J17-11", 8);
794 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
795 b->pins[pos].gpio.pinmap = 109;
796 b->pins[pos].gpio.mux_total = 0;
797 b->pins[pos].spi.pinmap = 5;
798 b->pins[pos].spi.mux_total = 0;
801 strncpy(b->pins[pos].name, "J17-12", 8);
802 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
803 b->pins[pos].gpio.pinmap = 115;
804 b->pins[pos].gpio.mux_total = 0;
805 b->pins[pos].spi.pinmap = 5;
806 b->pins[pos].spi.mux_total = 0;
808 strncpy(b->pins[pos].name, "J17-13", 8);
809 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
812 strncpy(b->pins[pos].name, "J17-14", 8);
813 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
814 b->pins[pos].gpio.pinmap = 128;
815 b->pins[pos].gpio.parent_id = 0;
816 b->pins[pos].gpio.mux_total = 0;
819 strncpy(b->pins[pos].name, "J18-1", 8);
820 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
821 b->pins[pos].gpio.pinmap = 13;
822 b->pins[pos].gpio.mux_total = 0;
823 b->pins[pos].pwm.pinmap = 1;
824 b->pins[pos].pwm.parent_id = 0;
825 b->pins[pos].pwm.mux_total = 0;
828 strncpy(b->pins[pos].name, "J18-2", 8);
829 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
830 b->pins[pos].gpio.pinmap = 165;
831 b->pins[pos].gpio.mux_total = 0;
833 strncpy(b->pins[pos].name, "J18-3", 8);
834 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
836 strncpy(b->pins[pos].name, "J18-4", 8);
837 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
839 strncpy(b->pins[pos].name, "J18-5", 8);
840 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
843 strncpy(b->pins[pos].name, "J18-6", 8);
844 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,0,0};
845 b->pins[pos].gpio.pinmap = 19;
846 b->pins[pos].gpio.mux_total = 0;
847 b->pins[pos].i2c.pinmap = 1;
848 b->pins[pos].i2c.mux_total = 0;
851 strncpy(b->pins[pos].name, "J18-7", 8);
852 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
853 b->pins[pos].gpio.pinmap = 12;
854 b->pins[pos].gpio.mux_total = 0;
855 b->pins[pos].pwm.pinmap = 0;
856 b->pins[pos].pwm.parent_id = 0;
857 b->pins[pos].pwm.mux_total = 0;
860 strncpy(b->pins[pos].name, "J18-8", 8);
861 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
862 b->pins[pos].gpio.pinmap = 183;
863 b->pins[pos].gpio.mux_total = 0;
864 b->pins[pos].pwm.pinmap = 3;
865 b->pins[pos].pwm.parent_id = 0;
866 b->pins[pos].pwm.mux_total = 0;
868 strncpy(b->pins[pos].name, "J18-9", 8);
869 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
872 strncpy(b->pins[pos].name, "J18-10", 8);
873 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
874 b->pins[pos].gpio.pinmap = 110;
875 b->pins[pos].gpio.mux_total = 0;
876 b->pins[pos].spi.pinmap = 5;
877 b->pins[pos].spi.mux_total = 0;
879 strncpy(b->pins[pos].name, "J18-11", 8);
880 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
881 b->pins[pos].gpio.pinmap = 114;
882 b->pins[pos].gpio.mux_total = 0;
883 b->pins[pos].spi.pinmap = 5;
884 b->pins[pos].spi.mux_total = 0;
887 strncpy(b->pins[pos].name, "J18-12", 8);
888 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
889 b->pins[pos].gpio.pinmap = 129;
890 b->pins[pos].gpio.mux_total = 0;
892 strncpy(b->pins[pos].name, "J18-13", 8);
893 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
894 b->pins[pos].gpio.pinmap = 130;
895 b->pins[pos].gpio.mux_total = 0;
896 b->pins[pos].uart.pinmap = 0;
897 b->pins[pos].uart.parent_id = 0;
898 b->pins[pos].uart.mux_total = 0;
901 strncpy(b->pins[pos].name, "J18-14", 8);
902 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
905 strncpy(b->pins[pos].name, "J19-1", 8);
906 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
908 strncpy(b->pins[pos].name, "J19-2", 8);
909 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
911 strncpy(b->pins[pos].name, "J19-3", 8);
912 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
915 strncpy(b->pins[pos].name, "J19-4", 8);
916 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
917 b->pins[pos].gpio.pinmap = 44;
918 b->pins[pos].gpio.mux_total = 0;
920 strncpy(b->pins[pos].name, "J19-5", 8);
921 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
922 b->pins[pos].gpio.pinmap = 46;
923 b->pins[pos].gpio.mux_total = 0;
925 strncpy(b->pins[pos].name, "J19-6", 8);
926 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
927 b->pins[pos].gpio.pinmap = 48;
928 b->pins[pos].gpio.mux_total = 0;
931 strncpy(b->pins[pos].name, "J19-7", 8);
932 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
935 strncpy(b->pins[pos].name, "J19-8", 8);
936 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
937 b->pins[pos].gpio.pinmap = 131;
938 b->pins[pos].gpio.mux_total = 0;
939 b->pins[pos].uart.pinmap = 0;
940 b->pins[pos].uart.parent_id = 0;
941 b->pins[pos].uart.mux_total = 0;
944 strncpy(b->pins[pos].name, "J19-9", 8);
945 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
946 b->pins[pos].gpio.pinmap = 14;
947 b->pins[pos].gpio.mux_total = 0;
950 strncpy(b->pins[pos].name, "J19-10", 8);
951 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
952 b->pins[pos].gpio.pinmap = 40;
953 b->pins[pos].gpio.mux_total = 0;
955 strncpy(b->pins[pos].name, "J19-11", 8);
956 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
957 b->pins[pos].gpio.pinmap = 43;
958 b->pins[pos].gpio.mux_total = 0;
960 strncpy(b->pins[pos].name, "J19-12", 8);
961 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
962 b->pins[pos].gpio.pinmap = 77;
963 b->pins[pos].gpio.mux_total = 0;
965 strncpy(b->pins[pos].name, "J19-13", 8);
966 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
967 b->pins[pos].gpio.pinmap = 82;
968 b->pins[pos].gpio.mux_total = 0;
970 strncpy(b->pins[pos].name, "J19-14", 8);
971 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
972 b->pins[pos].gpio.pinmap = 83;
973 b->pins[pos].gpio.mux_total = 0;
976 strncpy(b->pins[pos].name, "J20-1", 8);
977 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
979 strncpy(b->pins[pos].name, "J20-2", 8);
980 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
982 strncpy(b->pins[pos].name, "J20-3", 8);
983 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,0,0};
985 strncpy(b->pins[pos].name, "J20-4", 8);
986 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
987 b->pins[pos].gpio.pinmap = 45;
988 b->pins[pos].gpio.mux_total = 0;
990 strncpy(b->pins[pos].name, "J20-5", 8);
991 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
992 b->pins[pos].gpio.pinmap = 47;
993 b->pins[pos].gpio.mux_total = 0;
995 strncpy(b->pins[pos].name, "J20-6", 8);
996 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
997 b->pins[pos].gpio.pinmap = 49;
998 b->pins[pos].gpio.mux_total = 0;
1000 strncpy(b->pins[pos].name, "J20-7", 8);
1001 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1002 b->pins[pos].gpio.pinmap = 15;
1003 b->pins[pos].gpio.mux_total = 0;
1005 strncpy(b->pins[pos].name, "J20-8", 8);
1006 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1007 b->pins[pos].gpio.pinmap = 84;
1008 b->pins[pos].gpio.mux_total = 0;
1010 strncpy(b->pins[pos].name, "J20-9", 8);
1011 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1012 b->pins[pos].gpio.pinmap = 42;
1013 b->pins[pos].gpio.mux_total = 0;
1015 strncpy(b->pins[pos].name, "J20-10", 8);
1016 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1017 b->pins[pos].gpio.pinmap = 41;
1018 b->pins[pos].gpio.mux_total = 0;
1020 strncpy(b->pins[pos].name, "J20-11", 8);
1021 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1022 b->pins[pos].gpio.pinmap = 78;
1023 b->pins[pos].gpio.mux_total = 0;
1025 strncpy(b->pins[pos].name, "J20-12", 8);
1026 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1027 b->pins[pos].gpio.pinmap = 79;
1028 b->pins[pos].gpio.mux_total = 0;
1030 strncpy(b->pins[pos].name, "J20-13", 8);
1031 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1032 b->pins[pos].gpio.pinmap = 80;
1033 b->pins[pos].gpio.mux_total = 0;
1035 strncpy(b->pins[pos].name, "J20-14", 8);
1036 b->pins[pos].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0};
1037 b->pins[pos].gpio.pinmap = 81;
1038 b->pins[pos].gpio.mux_total = 0;
1042 b->i2c_bus_count = 9;
1045 for (ici = 0; ici < 9; ici++) {
1046 b->i2c_bus[ici].bus_id = -1;
1048 b->i2c_bus[1].bus_id = 1;
1049 b->i2c_bus[1].sda = 7;
1050 b->i2c_bus[1].scl = 19;
1052 b->i2c_bus[6].bus_id = 6;
1053 b->i2c_bus[6].sda = 8;
1054 b->i2c_bus[6].scl = 6;
1056 b->spi_bus_count = 1;
1058 b->spi_bus[0].bus_id = 5;
1059 b->spi_bus[0].slave_s = 1;
1060 b->spi_bus[0].cs = 23;
1061 b->spi_bus[0].mosi = 11;
1062 b->spi_bus[0].miso = 24;
1063 b->spi_bus[0].sclk = 10;
1065 b->uart_dev_count = 1;
1066 b->def_uart_dev = 0;
1067 b->uart_dev[0].rx = 26;
1068 b->uart_dev[0].tx = 35;
1070 return MRAA_SUCCESS;
1074 mraa_intel_edison_fab_c()
1076 mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
1081 b->platform_name_length = strlen(PLATFORM_NAME) + 1;
1082 b->platform_name = (char*) malloc(sizeof(char) * b->platform_name_length);
1083 if (b->platform_name == NULL) {
1086 strncpy(b->platform_name, PLATFORM_NAME, b->platform_name_length);
1088 // This seciton will also check if the arduino board is there
1089 tristate = mraa_gpio_init_raw(214);
1090 if (tristate == NULL) {
1091 syslog(LOG_INFO, "edison: Failed to initialise Arduino board TriState,\
1092 assuming Intel Edison Miniboard\n");
1093 if (mraa_intel_edison_miniboard(b) != MRAA_SUCCESS) {
1098 // Now Assuming the edison is attached to the Arduino board.
1099 b->phy_pin_count = 20;
1103 advance_func->gpio_dir_pre = &mraa_intel_edison_gpio_dir_pre;
1104 advance_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
1105 advance_func->gpio_close_pre = &mraa_intel_edison_gpio_close_pre;
1106 advance_func->gpio_dir_post = &mraa_intel_edison_gpio_dir_post;
1107 advance_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
1108 advance_func->i2c_set_frequency_replace = &mraa_intel_edison_i2c_freq;
1109 advance_func->aio_get_valid_fp = &mraa_intel_edison_aio_get_fp;
1110 advance_func->aio_init_pre = &mraa_intel_edison_aio_init_pre;
1111 advance_func->aio_init_post = &mraa_intel_edison_aio_init_post;
1112 advance_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
1113 advance_func->pwm_init_post = &mraa_intel_edison_pwm_init_post;
1114 advance_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
1115 advance_func->spi_init_post = &mraa_intel_edison_spi_init_post;
1116 advance_func->gpio_mode_replace = &mraa_intel_edison_gpio_mode_replace;
1117 advance_func->uart_init_pre = &mraa_intel_edison_uart_init_pre;
1118 advance_func->uart_init_post = &mraa_intel_edison_uart_init_post;
1119 advance_func->gpio_mmap_setup = &mraa_intel_edison_mmap_setup;
1121 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_EDISON_PINCOUNT);
1122 if (b->pins == NULL) {
1126 mraa_gpio_dir(tristate, MRAA_GPIO_OUT);
1127 mraa_intel_edison_misc_spi();
1130 b->adc_supported = 10;
1131 b->pwm_default_period = 5000;
1132 b->pwm_max_period = 218453;
1133 b->pwm_min_period = 1;
1135 strncpy(b->pins[0].name, "IO0", 8);
1136 b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
1137 b->pins[0].gpio.pinmap = 130;
1138 b->pins[0].gpio.parent_id = 0;
1139 b->pins[0].gpio.mux_total = 0;
1140 b->pins[0].uart.pinmap = 0;
1141 b->pins[0].uart.parent_id = 0;
1142 b->pins[0].uart.mux_total = 0;
1144 strncpy(b->pins[1].name, "IO1", 8);
1145 b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1};
1146 b->pins[1].gpio.pinmap = 131;
1147 b->pins[1].gpio.parent_id = 0;
1148 b->pins[1].gpio.mux_total = 0;
1149 b->pins[1].uart.pinmap = 0;
1150 b->pins[1].uart.parent_id = 0;
1151 b->pins[1].uart.mux_total = 0;
1153 strncpy(b->pins[2].name, "IO2", 8);
1154 b->pins[2].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
1155 b->pins[2].gpio.pinmap = 128;
1156 b->pins[2].gpio.parent_id = 0;
1157 b->pins[2].gpio.mux_total = 0;
1159 strncpy(b->pins[3].name, "IO3", 8);
1160 b->pins[3].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
1161 b->pins[3].gpio.pinmap = 12;
1162 b->pins[3].gpio.parent_id = 0;
1163 b->pins[3].gpio.mux_total = 0;
1164 b->pins[3].pwm.pinmap = 0;
1165 b->pins[3].pwm.parent_id = 0;
1166 b->pins[3].pwm.mux_total = 0;
1168 strncpy(b->pins[4].name, "IO4", 8);
1169 b->pins[4].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
1170 b->pins[4].gpio.pinmap = 129;
1171 b->pins[4].gpio.parent_id = 0;
1172 b->pins[4].gpio.mux_total = 0;
1174 strncpy(b->pins[5].name, "IO5", 8);
1175 b->pins[5].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0};
1176 b->pins[5].gpio.pinmap = 13;
1177 b->pins[5].gpio.parent_id = 0;
1178 b->pins[5].gpio.mux_total = 0;
1179 b->pins[5].pwm.pinmap = 1;
1180 b->pins[5].pwm.parent_id = 0;
1181 b->pins[5].pwm.mux_total = 0;
1183 strncpy(b->pins[6].name, "IO6", 8);
1184 b->pins[6].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0};
1185 b->pins[6].gpio.pinmap = 182;
1186 b->pins[6].gpio.parent_id = 0;
1187 b->pins[6].gpio.mux_total = 0;
1188 b->pins[6].pwm.pinmap = 2;
1189 b->pins[6].pwm.parent_id = 0;
1190 b->pins[6].pwm.mux_total = 0;
1192 strncpy(b->pins[7].name, "IO7", 8);
1193 b->pins[7].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
1194 b->pins[7].gpio.pinmap = 48;
1195 b->pins[7].gpio.parent_id = 0;
1196 b->pins[7].gpio.mux_total = 0;
1198 strncpy(b->pins[8].name, "IO8", 8);
1199 b->pins[8].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
1200 b->pins[8].gpio.pinmap = 49;
1201 b->pins[8].gpio.parent_id = 0;
1202 b->pins[8].gpio.mux_total = 0;
1204 strncpy(b->pins[9].name, "IO9", 8);
1205 b->pins[9].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0};
1206 b->pins[9].gpio.pinmap = 183;
1207 b->pins[9].gpio.parent_id = 0;
1208 b->pins[9].gpio.mux_total = 0;
1209 b->pins[9].pwm.pinmap = 3;
1210 b->pins[9].pwm.parent_id = 0;
1211 b->pins[9].pwm.mux_total = 0;
1213 strncpy(b->pins[10].name, "IO10", 8);
1214 b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
1215 b->pins[10].gpio.pinmap = 41;
1216 b->pins[10].gpio.parent_id = 0;
1217 b->pins[10].gpio.mux_total = 2;
1218 b->pins[10].gpio.mux[0].pin = 263;
1219 b->pins[10].gpio.mux[0].value = 1;
1220 b->pins[10].gpio.mux[1].pin = 240;
1221 b->pins[10].gpio.mux[1].value = 0;
1222 b->pins[10].spi.pinmap = 5;
1223 b->pins[10].spi.mux_total = 2;
1224 b->pins[10].spi.mux[0].pin = 263;
1225 b->pins[10].spi.mux[0].value = 1;
1226 b->pins[10].spi.mux[1].pin = 240;
1227 b->pins[10].spi.mux[1].value = 1;
1229 strncpy(b->pins[11].name, "IO11", 8);
1230 b->pins[11].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
1231 b->pins[11].gpio.pinmap = 43;
1232 b->pins[11].gpio.parent_id = 0;
1233 b->pins[11].gpio.mux_total = 2;
1234 b->pins[11].gpio.mux[0].pin = 262;
1235 b->pins[11].gpio.mux[0].value = 1;
1236 b->pins[11].gpio.mux[1].pin = 241;
1237 b->pins[11].gpio.mux[1].value = 0;
1238 b->pins[11].spi.pinmap = 5;
1239 b->pins[11].spi.mux_total = 2;
1240 b->pins[11].spi.mux[0].pin = 262;
1241 b->pins[11].spi.mux[0].value = 1;
1242 b->pins[11].spi.mux[1].pin = 241;
1243 b->pins[11].spi.mux[1].value = 1;
1245 strncpy(b->pins[12].name, "IO12", 8);
1246 b->pins[12].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
1247 b->pins[12].gpio.pinmap = 42;
1248 b->pins[12].gpio.parent_id = 0;
1249 b->pins[12].gpio.mux_total = 1;
1250 b->pins[12].gpio.mux[0].pin = 242;
1251 b->pins[12].gpio.mux[0].value = 0;
1252 b->pins[12].spi.pinmap = 5;
1253 b->pins[12].spi.mux_total = 1;
1254 b->pins[12].spi.mux[0].pin = 242;
1255 b->pins[12].spi.mux[0].value = 1;
1257 strncpy(b->pins[13].name, "IO13", 8);
1258 b->pins[13].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0};
1259 b->pins[13].gpio.pinmap = 40;
1260 b->pins[13].gpio.parent_id = 0;
1261 b->pins[13].gpio.mux_total = 1;
1262 b->pins[13].gpio.mux[0].pin = 243;
1263 b->pins[13].gpio.mux[0].value = 0;
1264 b->pins[13].spi.pinmap = 5;
1265 b->pins[13].spi.mux_total = 1;
1266 b->pins[13].spi.mux[0].pin = 243;
1267 b->pins[13].spi.mux[0].value = 1;
1269 strncpy(b->pins[14].name, "A0", 8);
1270 b->pins[14].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
1271 b->pins[14].aio.pinmap = 0;
1272 b->pins[14].aio.mux_total = 1;
1273 b->pins[14].aio.mux[0].pin = 200;
1274 b->pins[14].aio.mux[0].value = 1;
1275 b->pins[14].gpio.pinmap = 44;
1276 b->pins[14].gpio.mux_total = 1;
1277 b->pins[14].gpio.mux[0].pin = 200;
1278 b->pins[14].gpio.mux[0].value = 0;
1280 strncpy(b->pins[15].name, "A1", 8);
1281 b->pins[15].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
1282 b->pins[15].aio.pinmap = 1;
1283 b->pins[15].aio.mux_total = 1;
1284 b->pins[15].aio.mux[0].pin = 201;
1285 b->pins[15].aio.mux[0].value = 1;
1286 b->pins[15].gpio.pinmap = 45;
1287 b->pins[15].gpio.mux_total = 1;
1288 b->pins[15].gpio.mux[0].pin = 201;
1289 b->pins[15].gpio.mux[0].value = 0;
1291 strncpy(b->pins[16].name, "A2", 8);
1292 b->pins[16].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
1293 b->pins[16].aio.pinmap = 2;
1294 b->pins[16].aio.mux_total = 1;
1295 b->pins[16].aio.mux[0].pin = 202;
1296 b->pins[16].aio.mux[0].value = 1;
1297 b->pins[16].gpio.pinmap = 46;
1298 b->pins[16].gpio.mux_total = 1;
1299 b->pins[16].gpio.mux[0].pin = 202;
1300 b->pins[16].gpio.mux[0].value = 0;
1302 strncpy(b->pins[17].name, "A3", 8);
1303 b->pins[17].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0};
1304 b->pins[17].aio.pinmap = 3;
1305 b->pins[17].aio.mux_total = 1;
1306 b->pins[17].aio.mux[0].pin = 203;
1307 b->pins[17].aio.mux[0].value = 1;
1308 b->pins[17].gpio.pinmap = 47;
1309 b->pins[17].gpio.mux_total = 1;
1310 b->pins[17].gpio.mux[0].pin = 203;
1311 b->pins[17].gpio.mux[0].value = 0;
1313 strncpy(b->pins[18].name, "A4", 8);
1314 b->pins[18].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1,0};
1315 b->pins[18].i2c.pinmap = 1;
1316 b->pins[18].i2c.mux_total = 1;
1317 b->pins[18].i2c.mux[0].pin = 204;
1318 b->pins[18].i2c.mux[0].value = 0;
1319 b->pins[18].aio.pinmap = 4;
1320 b->pins[18].aio.mux_total = 1;
1321 b->pins[18].aio.mux[0].pin = 204;
1322 b->pins[18].aio.mux[0].value = 1;
1323 b->pins[18].gpio.pinmap = 14;
1324 b->pins[18].gpio.mux_total = 1;
1325 b->pins[18].gpio.mux[0].pin = 204;
1326 b->pins[18].gpio.mux[0].value = 0;
1328 strncpy(b->pins[19].name, "A5", 8);
1329 b->pins[19].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1,0};
1330 b->pins[19].i2c.pinmap = 1;
1331 b->pins[19].i2c.mux_total = 1;
1332 b->pins[19].i2c.mux[0].pin = 205;
1333 b->pins[19].i2c.mux[0].value = 0;
1334 b->pins[19].aio.pinmap = 5;
1335 b->pins[19].aio.mux_total = 1;
1336 b->pins[19].aio.mux[0].pin = 205;
1337 b->pins[19].aio.mux[0].value = 1;
1338 b->pins[19].gpio.pinmap = 165;
1339 b->pins[19].gpio.mux_total = 1;
1340 b->pins[19].gpio.mux[0].pin = 205;
1341 b->pins[19].gpio.mux[0].value = 0;
1344 b->i2c_bus_count = 9;
1347 for (ici = 0; ici < 9; ici++) {
1348 b->i2c_bus[ici].bus_id = -1;
1350 b->i2c_bus[6].bus_id = 6;
1351 b->i2c_bus[6].sda = 18;
1352 b->i2c_bus[6].scl = 19;
1354 b->spi_bus_count = 1;
1356 b->spi_bus[0].bus_id = 5;
1357 b->spi_bus[0].slave_s = 1;
1358 b->spi_bus[0].cs = 10;
1359 b->spi_bus[0].mosi = 11;
1360 b->spi_bus[0].miso = 12;
1361 b->spi_bus[0].sclk = 13;
1363 b->uart_dev_count = 1;
1364 b->def_uart_dev = 0;
1365 b->uart_dev[0].rx = 0;
1366 b->uart_dev[0].tx = 1;
1369 for (il =0; il < MRAA_INTEL_EDISON_PINCOUNT; il++) {
1370 pinmodes[il].gpio.sysfs = -1;
1371 pinmodes[il].gpio.mode = -1;
1372 pinmodes[il].pwm.sysfs = -1;
1373 pinmodes[il].pwm.mode = -1;
1374 pinmodes[il].i2c.sysfs = -1;
1375 pinmodes[il].i2c.mode = -1;
1376 pinmodes[il].spi.sysfs = -1;
1377 pinmodes[il].spi.mode = -1;
1378 pinmodes[il].uart.sysfs = -1;
1379 pinmodes[il].uart.mode = -1;
1381 pinmodes[0].gpio.sysfs = 130;
1382 pinmodes[0].gpio.mode = 0;
1383 pinmodes[0].uart.sysfs = 130;
1384 pinmodes[0].uart.mode = 1;
1385 pinmodes[1].gpio.sysfs = 131;
1386 pinmodes[1].gpio.mode = 0;
1387 pinmodes[1].uart.sysfs = 131;
1388 pinmodes[1].uart.mode = 1;
1389 pinmodes[2].gpio.sysfs = 128;
1390 pinmodes[2].gpio.mode = 0;
1391 pinmodes[2].uart.sysfs = 128;
1392 pinmodes[2].uart.mode = 1;
1393 pinmodes[3].gpio.sysfs = 12;
1394 pinmodes[3].gpio.mode = 0;
1395 pinmodes[3].pwm.sysfs = 12;
1396 pinmodes[3].pwm.mode = 1;
1398 pinmodes[4].gpio.sysfs = 129;
1399 pinmodes[4].gpio.mode = 0;
1400 pinmodes[4].uart.sysfs = 129;
1401 pinmodes[4].uart.mode = 1;
1402 pinmodes[5].gpio.sysfs = 13;
1403 pinmodes[5].gpio.mode = 0;
1404 pinmodes[5].pwm.sysfs = 13;
1405 pinmodes[5].pwm.mode = 1;
1406 pinmodes[6].gpio.sysfs = 182;
1407 pinmodes[6].gpio.mode = 0;
1408 pinmodes[6].pwm.sysfs = 182;
1409 pinmodes[6].pwm.mode = 1;
1411 //7 and 8 are provided by something on i2c, very simplepinmodes[3].gpio.sysfs = 12;
1412 pinmodes[9].gpio.sysfs = 183;
1413 pinmodes[9].gpio.mode = 0;
1414 pinmodes[9].pwm.sysfs = 183;
1415 pinmodes[9].pwm.mode = 1;
1417 pinmodes[10].gpio.sysfs = 41;
1418 pinmodes[10].gpio.mode = 0;
1419 pinmodes[10].spi.sysfs = 111; // Different pin provides, switched at mux level.
1420 pinmodes[10].spi.mode = 1;
1422 pinmodes[11].gpio.sysfs = 43;
1423 pinmodes[11].gpio.mode = 0;
1424 pinmodes[11].spi.sysfs = 115; // Different pin provides, switched at mux level.
1425 pinmodes[11].spi.mode = 1;
1427 pinmodes[12].gpio.sysfs = 42;
1428 pinmodes[12].gpio.mode = 0;
1429 pinmodes[12].spi.sysfs = 114; // Different pin provides, switched at mux level.
1430 pinmodes[12].spi.mode = 1;
1432 pinmodes[13].gpio.sysfs = 40;
1433 pinmodes[13].gpio.mode = 0;
1434 pinmodes[13].spi.sysfs = 109; // Different pin provides, switched at mux level.
1435 pinmodes[13].spi.mode = 1;
1436 //Everything else but A4 A5 LEAVE
1437 pinmodes[18].gpio.sysfs = 14;
1438 pinmodes[18].gpio.mode = 0;
1439 pinmodes[18].i2c.sysfs = 28;
1440 pinmodes[18].i2c.mode = 1;
1442 pinmodes[19].gpio.sysfs = 165;
1443 pinmodes[19].gpio.mode = 0;
1444 pinmodes[19].i2c.sysfs = 27;
1445 pinmodes[19].i2c.mode = 1;
1449 syslog(LOG_CRIT, "edison: Arduino board failed to initialise");