2 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
3 * Copyright (c) 2014 Intel Corporation.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 #include <sys/ioctl.h>
30 #include <linux/spi/spidev.h>
33 #include "x86/intel_edison_fab_c.h"
35 #define PLATFORM_NAME "Intel Edison"
36 #define SYSFS_CLASS_GPIO "/sys/class/gpio"
37 #define SYSFS_PINMODE_PATH "/sys/kernel/debug/gpio_debug/gpio"
39 #define MAX_MODE_SIZE 8
41 // This is an absolute path to a resource file found within sysfs.
42 // Might not always be correct. First thing to check if mmap stops
43 // working. Check the device for 0x1199 and Intel Vendor (0x8086)
44 #define MMAP_PATH "/sys/devices/pci0000:00/0000:00:0c.0/resource0"
45 #define UART_DEV_PATH "/dev/ttyMFD1"
50 } mraa_intel_edision_pindef_t;
53 mraa_intel_edision_pindef_t gpio;
54 mraa_intel_edision_pindef_t pwm;
55 mraa_intel_edision_pindef_t i2c;
56 mraa_intel_edision_pindef_t spi;
57 mraa_intel_edision_pindef_t uart;
58 } mraa_intel_edison_pinmodes_t;
60 static mraa_gpio_context tristate;
62 static mraa_intel_edison_pinmodes_t pinmodes[MRAA_INTEL_EDISON_PINCOUNT];
63 static unsigned int outputen[] = { 248, 249, 250, 251, 252, 253, 254, 255, 256, 257,
64 258, 259, 260, 261, 232, 233, 234, 235, 236, 237 };
65 static mraa_gpio_context agpioOutputen[sizeof(outputen) / sizeof(outputen[0])];
67 static unsigned int pullup_map[] = { 216, 217, 218, 219, 220, 221, 222, 223, 224, 225,
68 226, 227, 228, 229, 208, 209, 210, 211, 212, 213 };
69 static int miniboard = 0;
72 static uint8_t* mmap_reg = NULL;
73 static int mmap_fd = 0;
75 static unsigned int mmap_count = 0;
78 mraa_intel_edison_spi_lsbmode_replace(mraa_spi_context dev, mraa_boolean_t lsb)
80 uint8_t lsb_mode = (uint8_t) lsb;
82 // Edison doesn't support LSB_FIRST, we need to react appropriately
84 if (ioctl(dev->devfd, SPI_IOC_WR_LSB_FIRST, &lsb_mode) < 0) {
85 syslog(LOG_ERR, "spi: Failed to set bit order");
86 return MRAA_ERROR_INVALID_RESOURCE;
88 if (ioctl(dev->devfd, SPI_IOC_RD_LSB_FIRST, &lsb_mode) < 0) {
89 syslog(LOG_ERR, "spi: Failed to set bit order");
90 return MRAA_ERROR_INVALID_RESOURCE;
93 return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
101 mraa_intel_edison_pinmode_change(int sysfs, int mode)
107 char buffer[MAX_SIZE];
108 snprintf(buffer, MAX_SIZE, SYSFS_PINMODE_PATH "%i/current_pinmux", sysfs);
109 int modef = open(buffer, O_WRONLY);
111 syslog(LOG_ERR, "edison: Failed to open SoC pinmode for opening");
112 return MRAA_ERROR_INVALID_RESOURCE;
115 mraa_result_t ret = MRAA_SUCCESS;
116 char mode_buf[MAX_MODE_SIZE];
117 int length = sprintf(mode_buf, "mode%u", mode);
118 if (write(modef, mode_buf, length * sizeof(char)) == -1) {
119 ret = MRAA_ERROR_INVALID_RESOURCE;
127 mraa_intel_edison_gpio_dir_pre(mraa_gpio_context dev, gpio_dir_t dir)
130 if (dev->phy_pin >= 0) {
131 if (mraa_gpio_write(tristate, 0) != MRAA_SUCCESS) {
132 // call can sometimes fail, this does not actually mean much except
133 // that the kernel drivers don't always behave very well
134 syslog(LOG_NOTICE, "edison: Failed to write to tristate");
136 int pin = dev->phy_pin;
138 if (!agpioOutputen[pin]) {
139 agpioOutputen[pin] = mraa_gpio_init_raw(outputen[pin]);
140 if (agpioOutputen[pin] == NULL) {
141 return MRAA_ERROR_INVALID_RESOURCE;
143 if (mraa_gpio_dir(agpioOutputen[pin], MRAA_GPIO_OUT) != MRAA_SUCCESS) {
144 return MRAA_ERROR_INVALID_RESOURCE;
148 if (dir == MRAA_GPIO_OUT) {
151 if (mraa_gpio_write(agpioOutputen[pin], output_val) != MRAA_SUCCESS) {
152 return MRAA_ERROR_INVALID_RESOURCE;
160 mraa_intel_edison_gpio_dir_post(mraa_gpio_context dev, gpio_dir_t dir)
162 if (dev->phy_pin >= 0) {
163 return mraa_gpio_write(tristate, 1);
169 mraa_intel_edison_gpio_init_post(mraa_gpio_context dev)
172 return MRAA_ERROR_INVALID_RESOURCE;
176 if (miniboard == 1) {
180 sysfs = pinmodes[dev->phy_pin].gpio.sysfs;
181 mode = pinmodes[dev->phy_pin].gpio.mode;
184 return mraa_intel_edison_pinmode_change(sysfs, mode);
188 mraa_intel_edison_gpio_close_pre(mraa_gpio_context dev)
190 if (dev->phy_pin >= 0) {
191 int pin = dev->phy_pin;
192 if (agpioOutputen[pin]) {
193 mraa_gpio_close(agpioOutputen[pin]);
194 agpioOutputen[pin] = NULL;
201 mraa_intel_edison_i2c_init_pre(unsigned int bus)
203 if (miniboard == 0) {
205 syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
208 mraa_gpio_write(tristate, 0);
209 mraa_gpio_context io18_gpio = mraa_gpio_init_raw(14);
210 mraa_gpio_context io19_gpio = mraa_gpio_init_raw(165);
211 mraa_gpio_dir(io18_gpio, MRAA_GPIO_IN);
212 mraa_gpio_dir(io19_gpio, MRAA_GPIO_IN);
213 mraa_gpio_close(io18_gpio);
214 mraa_gpio_close(io19_gpio);
216 mraa_gpio_context io18_enable = mraa_gpio_init_raw(236);
217 mraa_gpio_context io19_enable = mraa_gpio_init_raw(237);
218 mraa_gpio_dir(io18_enable, MRAA_GPIO_OUT);
219 mraa_gpio_dir(io19_enable, MRAA_GPIO_OUT);
220 mraa_gpio_write(io18_enable, 0);
221 mraa_gpio_write(io19_enable, 0);
222 mraa_gpio_close(io18_enable);
223 mraa_gpio_close(io19_enable);
225 mraa_gpio_context io18_pullup = mraa_gpio_init_raw(212);
226 mraa_gpio_context io19_pullup = mraa_gpio_init_raw(213);
227 mraa_gpio_dir(io18_pullup, MRAA_GPIO_IN);
228 mraa_gpio_dir(io19_pullup, MRAA_GPIO_IN);
229 mraa_gpio_close(io18_pullup);
230 mraa_gpio_close(io19_pullup);
232 mraa_intel_edison_pinmode_change(28, 1);
233 mraa_intel_edison_pinmode_change(27, 1);
235 mraa_gpio_write(tristate, 1);
237 if (bus != 6 && bus != 1) {
238 syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
241 int scl = plat->pins[plat->i2c_bus[bus].scl].gpio.pinmap;
242 int sda = plat->pins[plat->i2c_bus[bus].sda].gpio.pinmap;
243 mraa_intel_edison_pinmode_change(sda, 1);
244 mraa_intel_edison_pinmode_change(scl, 1);
251 mraa_intel_edison_misc_spi()
253 mraa_gpio_write(tristate, 0);
255 mraa_gpio_context io10_p1 = mraa_gpio_init_raw(263);
256 mraa_gpio_context io10_p2 = mraa_gpio_init_raw(240);
257 mraa_gpio_context io11_p1 = mraa_gpio_init_raw(262);
258 mraa_gpio_context io11_p2 = mraa_gpio_init_raw(241);
259 mraa_gpio_context io12_p1 = mraa_gpio_init_raw(242);
260 mraa_gpio_context io13_p1 = mraa_gpio_init_raw(243);
261 mraa_gpio_dir(io10_p1, MRAA_GPIO_OUT);
262 mraa_gpio_dir(io10_p2, MRAA_GPIO_OUT);
263 mraa_gpio_dir(io11_p1, MRAA_GPIO_OUT);
264 mraa_gpio_dir(io11_p2, MRAA_GPIO_OUT);
265 mraa_gpio_dir(io12_p1, MRAA_GPIO_OUT);
266 mraa_gpio_dir(io13_p1, MRAA_GPIO_OUT);
268 mraa_gpio_write(io10_p1, 1);
269 mraa_gpio_write(io10_p2, 0);
270 mraa_gpio_write(io11_p1, 1);
271 mraa_gpio_write(io11_p2, 0);
272 mraa_gpio_write(io12_p1, 0);
273 mraa_gpio_write(io13_p1, 0);
275 mraa_gpio_close(io10_p1);
276 mraa_gpio_close(io10_p2);
277 mraa_gpio_close(io11_p1);
278 mraa_gpio_close(io11_p2);
279 mraa_gpio_close(io12_p1);
280 mraa_gpio_close(io13_p1);
282 mraa_intel_edison_pinmode_change(115, 1);
283 mraa_intel_edison_pinmode_change(114, 1);
284 mraa_intel_edison_pinmode_change(109, 1);
285 mraa_gpio_write(tristate, 1);
291 mraa_intel_edison_aio_get_fp(mraa_aio_context dev)
293 char file_path[64] = "";
295 snprintf(file_path, 64, "/sys/bus/iio/devices/iio:device1/in_voltage%d_raw", dev->channel);
297 dev->adc_in_fp = open(file_path, O_RDONLY);
298 if (dev->adc_in_fp == -1) {
299 syslog(LOG_ERR, "edison: Failed to open Analog input raw file %s for "
302 return MRAA_ERROR_INVALID_RESOURCE;
309 mraa_intel_edison_aio_init_pre(unsigned int aio)
311 if (aio > plat->aio_count) {
312 syslog(LOG_ERR, "edison: Invalid analog input channel");
313 return MRAA_ERROR_INVALID_RESOURCE;
317 mraa_gpio_context output_e;
318 output_e = mraa_gpio_init_raw(outputen[pin]);
319 if (output_e == NULL) {
320 return MRAA_ERROR_INVALID_RESOURCE;
322 if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
323 mraa_gpio_close(output_e);
324 return MRAA_ERROR_INVALID_RESOURCE;
326 if (mraa_gpio_write(output_e, 0) != MRAA_SUCCESS) {
327 mraa_gpio_close(output_e);
328 return MRAA_ERROR_INVALID_RESOURCE;
330 mraa_gpio_close(output_e);
332 mraa_gpio_context pullup_pin;
333 pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
334 if (pullup_pin == NULL) {
335 return MRAA_ERROR_INVALID_RESOURCE;
337 if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS) {
338 mraa_gpio_close(pullup_pin);
339 return MRAA_ERROR_INVALID_RESOURCE;
341 mraa_gpio_close(pullup_pin);
347 mraa_intel_edison_aio_init_post(mraa_aio_context dev)
349 return mraa_gpio_write(tristate, 1);
353 mraa_intel_edison_pwm_init_pre(int pin)
355 if (miniboard == 1) {
356 return mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
358 if (pin < 0 || pin > 19) {
359 return MRAA_ERROR_INVALID_RESOURCE;
362 if (!plat->pins[pin].capabilites.pwm) {
363 return MRAA_ERROR_INVALID_RESOURCE;
366 mraa_gpio_context output_e;
367 output_e = mraa_gpio_init_raw(outputen[pin]);
368 if (output_e == NULL) {
369 return MRAA_ERROR_INVALID_RESOURCE;
371 if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
372 mraa_gpio_close(output_e);
373 return MRAA_ERROR_INVALID_RESOURCE;
375 if (mraa_gpio_write(output_e, 1) != MRAA_SUCCESS) {
376 mraa_gpio_close(output_e);
377 return MRAA_ERROR_INVALID_RESOURCE;
379 mraa_gpio_close(output_e);
381 mraa_gpio_context pullup_pin;
382 pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
383 if (pullup_pin == NULL) {
384 return MRAA_ERROR_INVALID_RESOURCE;
386 if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS) {
387 mraa_gpio_close(pullup_pin);
388 return MRAA_ERROR_INVALID_RESOURCE;
390 mraa_gpio_close(pullup_pin);
391 mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
397 mraa_intel_edison_pwm_init_post(mraa_pwm_context pwm)
399 return mraa_gpio_write(tristate, 1);
403 mraa_intel_edison_spi_init_pre(int bus)
405 if (miniboard == 1) {
406 mraa_intel_edison_pinmode_change(115, 1);
407 mraa_intel_edison_pinmode_change(114, 1);
408 mraa_intel_edison_pinmode_change(109, 1);
411 mraa_gpio_write(tristate, 0);
413 mraa_gpio_context io10_out = mraa_gpio_init_raw(258);
414 mraa_gpio_context io11_out = mraa_gpio_init_raw(259);
415 mraa_gpio_context io12_out = mraa_gpio_init_raw(260);
416 mraa_gpio_context io13_out = mraa_gpio_init_raw(261);
417 mraa_gpio_dir(io10_out, MRAA_GPIO_OUT);
418 mraa_gpio_dir(io11_out, MRAA_GPIO_OUT);
419 mraa_gpio_dir(io12_out, MRAA_GPIO_OUT);
420 mraa_gpio_dir(io13_out, MRAA_GPIO_OUT);
422 mraa_gpio_write(io10_out, 1);
423 mraa_gpio_write(io11_out, 1);
424 mraa_gpio_write(io12_out, 0);
425 mraa_gpio_write(io13_out, 1);
427 mraa_gpio_close(io10_out);
428 mraa_gpio_close(io11_out);
429 mraa_gpio_close(io12_out);
430 mraa_gpio_close(io13_out);
432 mraa_gpio_context io10_pull = mraa_gpio_init_raw(226);
433 mraa_gpio_context io11_pull = mraa_gpio_init_raw(227);
434 mraa_gpio_context io12_pull = mraa_gpio_init_raw(228);
435 mraa_gpio_context io13_pull = mraa_gpio_init_raw(229);
437 mraa_gpio_dir(io10_pull, MRAA_GPIO_IN);
438 mraa_gpio_dir(io11_pull, MRAA_GPIO_IN);
439 mraa_gpio_dir(io12_pull, MRAA_GPIO_IN);
440 mraa_gpio_dir(io13_pull, MRAA_GPIO_IN);
442 mraa_gpio_close(io10_pull);
443 mraa_gpio_close(io11_pull);
444 mraa_gpio_close(io12_pull);
445 mraa_gpio_close(io13_pull);
451 mraa_intel_edison_spi_init_post(mraa_spi_context spi)
453 return mraa_gpio_write(tristate, 1);
457 mraa_intel_edison_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mode)
459 if (dev->value_fp != -1) {
460 if (close(dev->value_fp) != 0) {
461 return MRAA_ERROR_INVALID_RESOURCE;
466 mraa_gpio_context pullup_e;
467 pullup_e = mraa_gpio_init_raw(pullup_map[dev->phy_pin]);
468 if (pullup_e == NULL) {
469 return MRAA_ERROR_INVALID_RESOURCE;
471 if (mraa_gpio_dir(pullup_e, MRAA_GPIO_IN) != MRAA_SUCCESS) {
472 syslog(LOG_ERR, "edison: Failed to set gpio mode-pullup");
473 mraa_gpio_close(pullup_e);
474 return MRAA_ERROR_INVALID_RESOURCE;
479 case MRAA_GPIO_STRONG:
481 case MRAA_GPIO_PULLUP:
484 case MRAA_GPIO_PULLDOWN:
491 return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
494 if (mraa_gpio_dir(pullup_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
495 syslog(LOG_ERR, "edison: Error setting pullup");
496 mraa_gpio_close(pullup_e);
497 return MRAA_ERROR_INVALID_RESOURCE;
499 if (mraa_gpio_write(pullup_e, value) != MRAA_SUCCESS) {
500 syslog(LOG_ERR, "edison: Error setting pullup");
501 mraa_gpio_close(pullup_e);
502 return MRAA_ERROR_INVALID_RESOURCE;
506 return mraa_gpio_close(pullup_e);
510 mraa_intel_edsion_mb_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode)
512 if (dev->value_fp != -1) {
513 if (close(dev->value_fp) != 0) {
514 return MRAA_ERROR_INVALID_RESOURCE;
519 char filepath[MAX_SIZE];
520 snprintf(filepath, MAX_SIZE, SYSFS_PINMODE_PATH "%d/current_pullmode", dev->pin);
522 int drive = open(filepath, O_WRONLY);
524 syslog(LOG_ERR, "edison: Failed to open drive for writing");
525 return MRAA_ERROR_INVALID_RESOURCE;
531 case MRAA_GPIO_STRONG:
534 case MRAA_GPIO_PULLUP:
535 length = snprintf(bu, sizeof(bu), "pullup");
537 case MRAA_GPIO_PULLDOWN:
538 length = snprintf(bu, sizeof(bu), "pulldown");
541 length = snprintf(bu, sizeof(bu), "nopull");
545 return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
547 if (write(drive, bu, length * sizeof(char)) == -1) {
548 syslog(LOG_ERR, "edison: Failed to write to drive mode");
550 return MRAA_ERROR_INVALID_RESOURCE;
553 if (close(drive) != 0) {
554 return MRAA_ERROR_INVALID_RESOURCE;
560 mraa_intel_edison_uart_init_pre(int index)
563 syslog(LOG_ERR, "edison: Failed to write to drive mode");
564 return MRAA_ERROR_INVALID_RESOURCE;
566 if (miniboard == 0) {
567 mraa_gpio_write(tristate, 0);
568 mraa_gpio_context io0_output = mraa_gpio_init_raw(248);
569 mraa_gpio_context io0_pullup = mraa_gpio_init_raw(216);
570 mraa_gpio_context io1_output = mraa_gpio_init_raw(249);
571 mraa_gpio_context io1_pullup = mraa_gpio_init_raw(217);
572 mraa_gpio_dir(io0_output, MRAA_GPIO_OUT);
573 mraa_gpio_dir(io0_pullup, MRAA_GPIO_OUT);
574 mraa_gpio_dir(io1_output, MRAA_GPIO_OUT);
575 mraa_gpio_dir(io1_pullup, MRAA_GPIO_IN);
577 mraa_gpio_write(io0_output, 0);
578 mraa_gpio_write(io0_pullup, 0);
579 mraa_gpio_write(io1_output, 1);
581 mraa_gpio_close(io0_output);
582 mraa_gpio_close(io0_pullup);
583 mraa_gpio_close(io1_output);
584 mraa_gpio_close(io1_pullup);
587 ret = mraa_intel_edison_pinmode_change(130, 1); // IO0 RX
588 ret = mraa_intel_edison_pinmode_change(131, 1); // IO1 TX
593 mraa_intel_edison_uart_init_post(mraa_uart_context uart)
595 return mraa_gpio_write(tristate, 1);
599 mraa_intel_edsion_mmap_unsetup()
601 if (mmap_reg == NULL) {
602 syslog(LOG_ERR, "edison mmap: null register cant unsetup");
603 return MRAA_ERROR_INVALID_RESOURCE;
605 munmap(mmap_reg, mmap_size);
607 if (close(mmap_fd) != 0) {
608 return MRAA_ERROR_INVALID_RESOURCE;
614 mraa_intel_edison_mmap_write(mraa_gpio_context dev, int value)
616 uint8_t offset = ((dev->pin / 32) * sizeof(uint32_t));
625 *(volatile uint32_t*) (mmap_reg + offset + valoff) = (uint32_t)(1 << (dev->pin % 32));
631 mraa_intel_edison_mmap_read(mraa_gpio_context dev)
633 uint8_t offset = ((dev->pin / 32) * sizeof(uint32_t));
636 value = *(volatile uint32_t*) (mmap_reg + 0x04 + offset);
637 if (value & (uint32_t)(1 << (dev->pin % 32))) {
644 mraa_intel_edison_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
647 syslog(LOG_ERR, "edison mmap: context not valid");
648 return MRAA_ERROR_INVALID_HANDLE;
652 if (dev->mmap_write == NULL && dev->mmap_read == NULL) {
653 syslog(LOG_ERR, "edison mmap: can't disable disabled mmap gpio");
654 return MRAA_ERROR_INVALID_PARAMETER;
656 dev->mmap_write = NULL;
657 dev->mmap_read = NULL;
659 if (mmap_count == 0) {
660 return mraa_intel_edsion_mmap_unsetup();
665 if (dev->mmap_write != NULL && dev->mmap_read != NULL) {
666 syslog(LOG_ERR, "edison mmap: can't enable enabled mmap gpio");
667 return MRAA_ERROR_INVALID_PARAMETER;
670 // Might need to make some elements of this thread safe.
671 // For example only allow one thread to enter the following block
672 // to prevent mmap'ing twice.
673 if (mmap_reg == NULL) {
674 if ((mmap_fd = open(MMAP_PATH, O_RDWR)) < 0) {
675 syslog(LOG_ERR, "edison map: unable to open resource0 file");
676 return MRAA_ERROR_INVALID_HANDLE;
680 fstat(mmap_fd, &fd_stat);
681 mmap_size = fd_stat.st_size;
684 (uint8_t*) mmap(NULL, fd_stat.st_size, PROT_READ | PROT_WRITE, MAP_FILE | MAP_SHARED, mmap_fd, 0);
685 if (mmap_reg == MAP_FAILED) {
686 syslog(LOG_ERR, "edison mmap: failed to mmap");
689 return MRAA_ERROR_NO_RESOURCES;
692 dev->mmap_write = &mraa_intel_edison_mmap_write;
693 dev->mmap_read = &mraa_intel_edison_mmap_read;
700 mraa_intel_edison_i2c_freq(mraa_i2c_context dev, mraa_i2c_mode_t mode)
704 switch (dev->busnum) {
706 sysnode = open("/sys/devices/pci0000:00/0000:00:08.0/i2c_dw_sysnode/mode", O_RDWR);
709 sysnode = open("/sys/devices/pci0000:00/0000:00:09.1/i2c_dw_sysnode/mode", O_RDWR);
712 syslog(LOG_NOTICE, "i2c bus selected does not support frequency changes");
713 return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
716 return MRAA_ERROR_INVALID_RESOURCE;
723 length = snprintf(bu, sizeof(bu), "std");
726 length = snprintf(bu, sizeof(bu), "fast");
729 length = snprintf(bu, sizeof(bu), "high");
732 syslog(LOG_ERR, "Invalid i2c mode selected");
734 return MRAA_ERROR_INVALID_PARAMETER;
736 if (write(sysnode, bu, length * sizeof(char)) == -1) {
738 return MRAA_ERROR_INVALID_RESOURCE;
745 mraa_intel_edison_miniboard(mraa_board_t* b)
748 b->phy_pin_count = 56;
749 b->gpio_count = 56; // A bit of a hack I suppose
751 b->pwm_default_period = 5000;
752 b->pwm_max_period = 218453;
753 b->pwm_min_period = 1;
755 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * 56);
756 if (b->pins == NULL) {
757 return MRAA_ERROR_UNSPECIFIED;
760 advance_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
762 advance_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
763 advance_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
764 advance_func->i2c_set_frequency_replace = &mraa_intel_edison_i2c_freq;
765 advance_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
766 advance_func->gpio_mode_replace = &mraa_intel_edsion_mb_gpio_mode;
767 advance_func->uart_init_pre = &mraa_intel_edison_uart_init_pre;
768 advance_func->gpio_mmap_setup = &mraa_intel_edison_mmap_setup;
771 strncpy(b->pins[pos].name, "J17-1", 8);
772 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
773 b->pins[pos].gpio.pinmap = 182;
774 b->pins[pos].gpio.mux_total = 0;
775 b->pins[pos].pwm.pinmap = 2;
776 b->pins[pos].pwm.parent_id = 0;
777 b->pins[pos].pwm.mux_total = 0;
780 strncpy(b->pins[pos].name, "J17-2", 8);
781 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
783 strncpy(b->pins[pos].name, "J17-3", 8);
784 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
786 strncpy(b->pins[pos].name, "J17-4", 8);
787 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
790 strncpy(b->pins[pos].name, "J17-5", 8);
791 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
792 b->pins[pos].gpio.pinmap = 135;
793 b->pins[pos].gpio.mux_total = 0;
796 strncpy(b->pins[pos].name, "J17-6", 8);
797 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
800 strncpy(b->pins[pos].name, "J17-7", 8);
801 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
802 b->pins[pos].gpio.pinmap = 27;
803 b->pins[pos].gpio.mux_total = 0;
804 b->pins[pos].i2c.pinmap = 1;
805 b->pins[pos].i2c.mux_total = 0;
808 strncpy(b->pins[pos].name, "J17-8", 8);
809 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
810 b->pins[pos].gpio.pinmap = 20;
811 b->pins[pos].gpio.mux_total = 0;
812 b->pins[pos].i2c.pinmap = 1;
813 b->pins[pos].i2c.mux_total = 0;
816 strncpy(b->pins[pos].name, "J17-9", 8);
817 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
818 b->pins[pos].gpio.pinmap = 28;
819 b->pins[pos].gpio.mux_total = 0;
820 b->pins[pos].i2c.pinmap = 1;
821 b->pins[pos].i2c.mux_total = 0;
824 strncpy(b->pins[pos].name, "J17-10", 8);
825 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
826 b->pins[pos].gpio.pinmap = 111;
827 b->pins[pos].gpio.mux_total = 0;
828 b->pins[pos].spi.pinmap = 5;
829 b->pins[pos].spi.mux_total = 0;
832 strncpy(b->pins[pos].name, "J17-11", 8);
833 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
834 b->pins[pos].gpio.pinmap = 109;
835 b->pins[pos].gpio.mux_total = 0;
836 b->pins[pos].spi.pinmap = 5;
837 b->pins[pos].spi.mux_total = 0;
840 strncpy(b->pins[pos].name, "J17-12", 8);
841 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
842 b->pins[pos].gpio.pinmap = 115;
843 b->pins[pos].gpio.mux_total = 0;
844 b->pins[pos].spi.pinmap = 5;
845 b->pins[pos].spi.mux_total = 0;
847 strncpy(b->pins[pos].name, "J17-13", 8);
848 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
851 strncpy(b->pins[pos].name, "J17-14", 8);
852 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
853 b->pins[pos].gpio.pinmap = 128;
854 b->pins[pos].gpio.parent_id = 0;
855 b->pins[pos].gpio.mux_total = 0;
858 strncpy(b->pins[pos].name, "J18-1", 8);
859 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
860 b->pins[pos].gpio.pinmap = 13;
861 b->pins[pos].gpio.mux_total = 0;
862 b->pins[pos].pwm.pinmap = 1;
863 b->pins[pos].pwm.parent_id = 0;
864 b->pins[pos].pwm.mux_total = 0;
867 strncpy(b->pins[pos].name, "J18-2", 8);
868 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
869 b->pins[pos].gpio.pinmap = 165;
870 b->pins[pos].gpio.mux_total = 0;
872 strncpy(b->pins[pos].name, "J18-3", 8);
873 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
875 strncpy(b->pins[pos].name, "J18-4", 8);
876 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
878 strncpy(b->pins[pos].name, "J18-5", 8);
879 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
882 strncpy(b->pins[pos].name, "J18-6", 8);
883 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
884 b->pins[pos].gpio.pinmap = 19;
885 b->pins[pos].gpio.mux_total = 0;
886 b->pins[pos].i2c.pinmap = 1;
887 b->pins[pos].i2c.mux_total = 0;
890 strncpy(b->pins[pos].name, "J18-7", 8);
891 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
892 b->pins[pos].gpio.pinmap = 12;
893 b->pins[pos].gpio.mux_total = 0;
894 b->pins[pos].pwm.pinmap = 0;
895 b->pins[pos].pwm.parent_id = 0;
896 b->pins[pos].pwm.mux_total = 0;
899 strncpy(b->pins[pos].name, "J18-8", 8);
900 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
901 b->pins[pos].gpio.pinmap = 183;
902 b->pins[pos].gpio.mux_total = 0;
903 b->pins[pos].pwm.pinmap = 3;
904 b->pins[pos].pwm.parent_id = 0;
905 b->pins[pos].pwm.mux_total = 0;
907 strncpy(b->pins[pos].name, "J18-9", 8);
908 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
911 strncpy(b->pins[pos].name, "J18-10", 8);
912 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
913 b->pins[pos].gpio.pinmap = 110;
914 b->pins[pos].gpio.mux_total = 0;
915 b->pins[pos].spi.pinmap = 5;
916 b->pins[pos].spi.mux_total = 0;
918 strncpy(b->pins[pos].name, "J18-11", 8);
919 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
920 b->pins[pos].gpio.pinmap = 114;
921 b->pins[pos].gpio.mux_total = 0;
922 b->pins[pos].spi.pinmap = 5;
923 b->pins[pos].spi.mux_total = 0;
926 strncpy(b->pins[pos].name, "J18-12", 8);
927 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
928 b->pins[pos].gpio.pinmap = 129;
929 b->pins[pos].gpio.mux_total = 0;
931 strncpy(b->pins[pos].name, "J18-13", 8);
932 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
933 b->pins[pos].gpio.pinmap = 130;
934 b->pins[pos].gpio.mux_total = 0;
935 b->pins[pos].uart.pinmap = 0;
936 b->pins[pos].uart.parent_id = 0;
937 b->pins[pos].uart.mux_total = 0;
940 strncpy(b->pins[pos].name, "J18-14", 8);
941 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
944 strncpy(b->pins[pos].name, "J19-1", 8);
945 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
947 strncpy(b->pins[pos].name, "J19-2", 8);
948 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
950 strncpy(b->pins[pos].name, "J19-3", 8);
951 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
954 strncpy(b->pins[pos].name, "J19-4", 8);
955 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
956 b->pins[pos].gpio.pinmap = 44;
957 b->pins[pos].gpio.mux_total = 0;
959 strncpy(b->pins[pos].name, "J19-5", 8);
960 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
961 b->pins[pos].gpio.pinmap = 46;
962 b->pins[pos].gpio.mux_total = 0;
964 strncpy(b->pins[pos].name, "J19-6", 8);
965 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
966 b->pins[pos].gpio.pinmap = 48;
967 b->pins[pos].gpio.mux_total = 0;
970 strncpy(b->pins[pos].name, "J19-7", 8);
971 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
974 strncpy(b->pins[pos].name, "J19-8", 8);
975 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
976 b->pins[pos].gpio.pinmap = 131;
977 b->pins[pos].gpio.mux_total = 0;
978 b->pins[pos].uart.pinmap = 0;
979 b->pins[pos].uart.parent_id = 0;
980 b->pins[pos].uart.mux_total = 0;
983 strncpy(b->pins[pos].name, "J19-9", 8);
984 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
985 b->pins[pos].gpio.pinmap = 14;
986 b->pins[pos].gpio.mux_total = 0;
989 strncpy(b->pins[pos].name, "J19-10", 8);
990 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
991 b->pins[pos].gpio.pinmap = 40;
992 b->pins[pos].gpio.mux_total = 0;
994 strncpy(b->pins[pos].name, "J19-11", 8);
995 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
996 b->pins[pos].gpio.pinmap = 43;
997 b->pins[pos].gpio.mux_total = 0;
999 strncpy(b->pins[pos].name, "J19-12", 8);
1000 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1001 b->pins[pos].gpio.pinmap = 77;
1002 b->pins[pos].gpio.mux_total = 0;
1004 strncpy(b->pins[pos].name, "J19-13", 8);
1005 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1006 b->pins[pos].gpio.pinmap = 82;
1007 b->pins[pos].gpio.mux_total = 0;
1009 strncpy(b->pins[pos].name, "J19-14", 8);
1010 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1011 b->pins[pos].gpio.pinmap = 83;
1012 b->pins[pos].gpio.mux_total = 0;
1015 strncpy(b->pins[pos].name, "J20-1", 8);
1016 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1018 strncpy(b->pins[pos].name, "J20-2", 8);
1019 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1021 strncpy(b->pins[pos].name, "J20-3", 8);
1022 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1024 strncpy(b->pins[pos].name, "J20-4", 8);
1025 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1026 b->pins[pos].gpio.pinmap = 45;
1027 b->pins[pos].gpio.mux_total = 0;
1029 strncpy(b->pins[pos].name, "J20-5", 8);
1030 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1031 b->pins[pos].gpio.pinmap = 47;
1032 b->pins[pos].gpio.mux_total = 0;
1034 strncpy(b->pins[pos].name, "J20-6", 8);
1035 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1036 b->pins[pos].gpio.pinmap = 49;
1037 b->pins[pos].gpio.mux_total = 0;
1039 strncpy(b->pins[pos].name, "J20-7", 8);
1040 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1041 b->pins[pos].gpio.pinmap = 15;
1042 b->pins[pos].gpio.mux_total = 0;
1044 strncpy(b->pins[pos].name, "J20-8", 8);
1045 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1046 b->pins[pos].gpio.pinmap = 84;
1047 b->pins[pos].gpio.mux_total = 0;
1049 strncpy(b->pins[pos].name, "J20-9", 8);
1050 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1051 b->pins[pos].gpio.pinmap = 42;
1052 b->pins[pos].gpio.mux_total = 0;
1054 strncpy(b->pins[pos].name, "J20-10", 8);
1055 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1056 b->pins[pos].gpio.pinmap = 41;
1057 b->pins[pos].gpio.mux_total = 0;
1059 strncpy(b->pins[pos].name, "J20-11", 8);
1060 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1061 b->pins[pos].gpio.pinmap = 78;
1062 b->pins[pos].gpio.mux_total = 0;
1064 strncpy(b->pins[pos].name, "J20-12", 8);
1065 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1066 b->pins[pos].gpio.pinmap = 79;
1067 b->pins[pos].gpio.mux_total = 0;
1069 strncpy(b->pins[pos].name, "J20-13", 8);
1070 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1071 b->pins[pos].gpio.pinmap = 80;
1072 b->pins[pos].gpio.mux_total = 0;
1074 strncpy(b->pins[pos].name, "J20-14", 8);
1075 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1076 b->pins[pos].gpio.pinmap = 81;
1077 b->pins[pos].gpio.mux_total = 0;
1081 b->i2c_bus_count = 9;
1084 for (ici = 0; ici < 9; ici++) {
1085 b->i2c_bus[ici].bus_id = -1;
1087 b->i2c_bus[1].bus_id = 1;
1088 b->i2c_bus[1].sda = 7;
1089 b->i2c_bus[1].scl = 19;
1091 b->i2c_bus[6].bus_id = 6;
1092 b->i2c_bus[6].sda = 8;
1093 b->i2c_bus[6].scl = 6;
1095 b->spi_bus_count = 1;
1097 b->spi_bus[0].bus_id = 5;
1098 b->spi_bus[0].slave_s = 1;
1099 b->spi_bus[0].cs = 23;
1100 b->spi_bus[0].mosi = 11;
1101 b->spi_bus[0].miso = 24;
1102 b->spi_bus[0].sclk = 10;
1104 b->uart_dev_count = 1;
1105 b->def_uart_dev = 0;
1106 b->uart_dev[0].rx = 26;
1107 b->uart_dev[0].tx = 35;
1108 b->uart_dev[0].device_path = UART_DEV_PATH;
1110 return MRAA_SUCCESS;
1114 mraa_intel_edison_fab_c()
1116 mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
1121 b->platform_name = PLATFORM_NAME;
1122 // This seciton will also check if the arduino board is there
1123 tristate = mraa_gpio_init_raw(214);
1124 if (tristate == NULL) {
1125 syslog(LOG_INFO, "edison: Failed to initialise Arduino board TriState,\
1126 assuming Intel Edison Miniboard\n");
1127 if (mraa_intel_edison_miniboard(b) != MRAA_SUCCESS) {
1132 // Now Assuming the edison is attached to the Arduino board.
1133 b->phy_pin_count = 20;
1137 advance_func->gpio_dir_pre = &mraa_intel_edison_gpio_dir_pre;
1138 advance_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
1139 advance_func->gpio_close_pre = &mraa_intel_edison_gpio_close_pre;
1140 advance_func->gpio_dir_post = &mraa_intel_edison_gpio_dir_post;
1141 advance_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
1142 advance_func->i2c_set_frequency_replace = &mraa_intel_edison_i2c_freq;
1143 advance_func->aio_get_valid_fp = &mraa_intel_edison_aio_get_fp;
1144 advance_func->aio_init_pre = &mraa_intel_edison_aio_init_pre;
1145 advance_func->aio_init_post = &mraa_intel_edison_aio_init_post;
1146 advance_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
1147 advance_func->pwm_init_post = &mraa_intel_edison_pwm_init_post;
1148 advance_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
1149 advance_func->spi_init_post = &mraa_intel_edison_spi_init_post;
1150 advance_func->gpio_mode_replace = &mraa_intel_edison_gpio_mode_replace;
1151 advance_func->uart_init_pre = &mraa_intel_edison_uart_init_pre;
1152 advance_func->uart_init_post = &mraa_intel_edison_uart_init_post;
1153 advance_func->gpio_mmap_setup = &mraa_intel_edison_mmap_setup;
1154 advance_func->spi_lsbmode_replace = &mraa_intel_edison_spi_lsbmode_replace;
1156 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_EDISON_PINCOUNT);
1157 if (b->pins == NULL) {
1161 mraa_gpio_dir(tristate, MRAA_GPIO_OUT);
1162 mraa_intel_edison_misc_spi();
1165 b->adc_supported = 10;
1166 b->pwm_default_period = 5000;
1167 b->pwm_max_period = 218453;
1168 b->pwm_min_period = 1;
1170 strncpy(b->pins[0].name, "IO0", 8);
1171 b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1172 b->pins[0].gpio.pinmap = 130;
1173 b->pins[0].gpio.parent_id = 0;
1174 b->pins[0].gpio.mux_total = 0;
1175 b->pins[0].uart.pinmap = 0;
1176 b->pins[0].uart.parent_id = 0;
1177 b->pins[0].uart.mux_total = 0;
1179 strncpy(b->pins[1].name, "IO1", 8);
1180 b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1181 b->pins[1].gpio.pinmap = 131;
1182 b->pins[1].gpio.parent_id = 0;
1183 b->pins[1].gpio.mux_total = 0;
1184 b->pins[1].uart.pinmap = 0;
1185 b->pins[1].uart.parent_id = 0;
1186 b->pins[1].uart.mux_total = 0;
1188 strncpy(b->pins[2].name, "IO2", 8);
1189 b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1190 b->pins[2].gpio.pinmap = 128;
1191 b->pins[2].gpio.parent_id = 0;
1192 b->pins[2].gpio.mux_total = 0;
1194 strncpy(b->pins[3].name, "IO3", 8);
1195 b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
1196 b->pins[3].gpio.pinmap = 12;
1197 b->pins[3].gpio.parent_id = 0;
1198 b->pins[3].gpio.mux_total = 0;
1199 b->pins[3].pwm.pinmap = 0;
1200 b->pins[3].pwm.parent_id = 0;
1201 b->pins[3].pwm.mux_total = 0;
1203 strncpy(b->pins[4].name, "IO4", 8);
1204 b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1205 b->pins[4].gpio.pinmap = 129;
1206 b->pins[4].gpio.parent_id = 0;
1207 b->pins[4].gpio.mux_total = 0;
1209 strncpy(b->pins[5].name, "IO5", 8);
1210 b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
1211 b->pins[5].gpio.pinmap = 13;
1212 b->pins[5].gpio.parent_id = 0;
1213 b->pins[5].gpio.mux_total = 0;
1214 b->pins[5].pwm.pinmap = 1;
1215 b->pins[5].pwm.parent_id = 0;
1216 b->pins[5].pwm.mux_total = 0;
1218 strncpy(b->pins[6].name, "IO6", 8);
1219 b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
1220 b->pins[6].gpio.pinmap = 182;
1221 b->pins[6].gpio.parent_id = 0;
1222 b->pins[6].gpio.mux_total = 0;
1223 b->pins[6].pwm.pinmap = 2;
1224 b->pins[6].pwm.parent_id = 0;
1225 b->pins[6].pwm.mux_total = 0;
1227 strncpy(b->pins[7].name, "IO7", 8);
1228 b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1229 b->pins[7].gpio.pinmap = 48;
1230 b->pins[7].gpio.parent_id = 0;
1231 b->pins[7].gpio.mux_total = 0;
1233 strncpy(b->pins[8].name, "IO8", 8);
1234 b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1235 b->pins[8].gpio.pinmap = 49;
1236 b->pins[8].gpio.parent_id = 0;
1237 b->pins[8].gpio.mux_total = 0;
1239 strncpy(b->pins[9].name, "IO9", 8);
1240 b->pins[9].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
1241 b->pins[9].gpio.pinmap = 183;
1242 b->pins[9].gpio.parent_id = 0;
1243 b->pins[9].gpio.mux_total = 0;
1244 b->pins[9].pwm.pinmap = 3;
1245 b->pins[9].pwm.parent_id = 0;
1246 b->pins[9].pwm.mux_total = 0;
1248 strncpy(b->pins[10].name, "IO10", 8);
1249 b->pins[10].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1250 b->pins[10].gpio.pinmap = 41;
1251 b->pins[10].gpio.parent_id = 0;
1252 b->pins[10].gpio.mux_total = 2;
1253 b->pins[10].gpio.mux[0].pin = 263;
1254 b->pins[10].gpio.mux[0].value = 1;
1255 b->pins[10].gpio.mux[1].pin = 240;
1256 b->pins[10].gpio.mux[1].value = 0;
1257 b->pins[10].spi.pinmap = 5;
1258 b->pins[10].spi.mux_total = 2;
1259 b->pins[10].spi.mux[0].pin = 263;
1260 b->pins[10].spi.mux[0].value = 1;
1261 b->pins[10].spi.mux[1].pin = 240;
1262 b->pins[10].spi.mux[1].value = 1;
1264 strncpy(b->pins[11].name, "IO11", 8);
1265 b->pins[11].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1266 b->pins[11].gpio.pinmap = 43;
1267 b->pins[11].gpio.parent_id = 0;
1268 b->pins[11].gpio.mux_total = 2;
1269 b->pins[11].gpio.mux[0].pin = 262;
1270 b->pins[11].gpio.mux[0].value = 1;
1271 b->pins[11].gpio.mux[1].pin = 241;
1272 b->pins[11].gpio.mux[1].value = 0;
1273 b->pins[11].spi.pinmap = 5;
1274 b->pins[11].spi.mux_total = 2;
1275 b->pins[11].spi.mux[0].pin = 262;
1276 b->pins[11].spi.mux[0].value = 1;
1277 b->pins[11].spi.mux[1].pin = 241;
1278 b->pins[11].spi.mux[1].value = 1;
1280 strncpy(b->pins[12].name, "IO12", 8);
1281 b->pins[12].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1282 b->pins[12].gpio.pinmap = 42;
1283 b->pins[12].gpio.parent_id = 0;
1284 b->pins[12].gpio.mux_total = 1;
1285 b->pins[12].gpio.mux[0].pin = 242;
1286 b->pins[12].gpio.mux[0].value = 0;
1287 b->pins[12].spi.pinmap = 5;
1288 b->pins[12].spi.mux_total = 1;
1289 b->pins[12].spi.mux[0].pin = 242;
1290 b->pins[12].spi.mux[0].value = 1;
1292 strncpy(b->pins[13].name, "IO13", 8);
1293 b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1294 b->pins[13].gpio.pinmap = 40;
1295 b->pins[13].gpio.parent_id = 0;
1296 b->pins[13].gpio.mux_total = 1;
1297 b->pins[13].gpio.mux[0].pin = 243;
1298 b->pins[13].gpio.mux[0].value = 0;
1299 b->pins[13].spi.pinmap = 5;
1300 b->pins[13].spi.mux_total = 1;
1301 b->pins[13].spi.mux[0].pin = 243;
1302 b->pins[13].spi.mux[0].value = 1;
1304 strncpy(b->pins[14].name, "A0", 8);
1305 b->pins[14].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1306 b->pins[14].aio.pinmap = 0;
1307 b->pins[14].aio.mux_total = 1;
1308 b->pins[14].aio.mux[0].pin = 200;
1309 b->pins[14].aio.mux[0].value = 1;
1310 b->pins[14].gpio.pinmap = 44;
1311 b->pins[14].gpio.mux_total = 1;
1312 b->pins[14].gpio.mux[0].pin = 200;
1313 b->pins[14].gpio.mux[0].value = 0;
1315 strncpy(b->pins[15].name, "A1", 8);
1316 b->pins[15].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1317 b->pins[15].aio.pinmap = 1;
1318 b->pins[15].aio.mux_total = 1;
1319 b->pins[15].aio.mux[0].pin = 201;
1320 b->pins[15].aio.mux[0].value = 1;
1321 b->pins[15].gpio.pinmap = 45;
1322 b->pins[15].gpio.mux_total = 1;
1323 b->pins[15].gpio.mux[0].pin = 201;
1324 b->pins[15].gpio.mux[0].value = 0;
1326 strncpy(b->pins[16].name, "A2", 8);
1327 b->pins[16].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1328 b->pins[16].aio.pinmap = 2;
1329 b->pins[16].aio.mux_total = 1;
1330 b->pins[16].aio.mux[0].pin = 202;
1331 b->pins[16].aio.mux[0].value = 1;
1332 b->pins[16].gpio.pinmap = 46;
1333 b->pins[16].gpio.mux_total = 1;
1334 b->pins[16].gpio.mux[0].pin = 202;
1335 b->pins[16].gpio.mux[0].value = 0;
1337 strncpy(b->pins[17].name, "A3", 8);
1338 b->pins[17].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1339 b->pins[17].aio.pinmap = 3;
1340 b->pins[17].aio.mux_total = 1;
1341 b->pins[17].aio.mux[0].pin = 203;
1342 b->pins[17].aio.mux[0].value = 1;
1343 b->pins[17].gpio.pinmap = 47;
1344 b->pins[17].gpio.mux_total = 1;
1345 b->pins[17].gpio.mux[0].pin = 203;
1346 b->pins[17].gpio.mux[0].value = 0;
1348 strncpy(b->pins[18].name, "A4", 8);
1349 b->pins[18].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1, 0 };
1350 b->pins[18].i2c.pinmap = 1;
1351 b->pins[18].i2c.mux_total = 1;
1352 b->pins[18].i2c.mux[0].pin = 204;
1353 b->pins[18].i2c.mux[0].value = 0;
1354 b->pins[18].aio.pinmap = 4;
1355 b->pins[18].aio.mux_total = 1;
1356 b->pins[18].aio.mux[0].pin = 204;
1357 b->pins[18].aio.mux[0].value = 1;
1358 b->pins[18].gpio.pinmap = 14;
1359 b->pins[18].gpio.mux_total = 1;
1360 b->pins[18].gpio.mux[0].pin = 204;
1361 b->pins[18].gpio.mux[0].value = 0;
1363 strncpy(b->pins[19].name, "A5", 8);
1364 b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1, 0 };
1365 b->pins[19].i2c.pinmap = 1;
1366 b->pins[19].i2c.mux_total = 1;
1367 b->pins[19].i2c.mux[0].pin = 205;
1368 b->pins[19].i2c.mux[0].value = 0;
1369 b->pins[19].aio.pinmap = 5;
1370 b->pins[19].aio.mux_total = 1;
1371 b->pins[19].aio.mux[0].pin = 205;
1372 b->pins[19].aio.mux[0].value = 1;
1373 b->pins[19].gpio.pinmap = 165;
1374 b->pins[19].gpio.mux_total = 1;
1375 b->pins[19].gpio.mux[0].pin = 205;
1376 b->pins[19].gpio.mux[0].value = 0;
1379 b->i2c_bus_count = 9;
1382 for (ici = 0; ici < 9; ici++) {
1383 b->i2c_bus[ici].bus_id = -1;
1385 b->i2c_bus[6].bus_id = 6;
1386 b->i2c_bus[6].sda = 18;
1387 b->i2c_bus[6].scl = 19;
1389 b->spi_bus_count = 1;
1391 b->spi_bus[0].bus_id = 5;
1392 b->spi_bus[0].slave_s = 1;
1393 b->spi_bus[0].cs = 10;
1394 b->spi_bus[0].mosi = 11;
1395 b->spi_bus[0].miso = 12;
1396 b->spi_bus[0].sclk = 13;
1398 b->uart_dev_count = 1;
1399 b->def_uart_dev = 0;
1400 b->uart_dev[0].rx = 0;
1401 b->uart_dev[0].tx = 1;
1402 b->uart_dev[0].device_path = UART_DEV_PATH;
1405 for (il = 0; il < MRAA_INTEL_EDISON_PINCOUNT; il++) {
1406 pinmodes[il].gpio.sysfs = -1;
1407 pinmodes[il].gpio.mode = -1;
1408 pinmodes[il].pwm.sysfs = -1;
1409 pinmodes[il].pwm.mode = -1;
1410 pinmodes[il].i2c.sysfs = -1;
1411 pinmodes[il].i2c.mode = -1;
1412 pinmodes[il].spi.sysfs = -1;
1413 pinmodes[il].spi.mode = -1;
1414 pinmodes[il].uart.sysfs = -1;
1415 pinmodes[il].uart.mode = -1;
1417 pinmodes[0].gpio.sysfs = 130;
1418 pinmodes[0].gpio.mode = 0;
1419 pinmodes[0].uart.sysfs = 130;
1420 pinmodes[0].uart.mode = 1;
1421 pinmodes[1].gpio.sysfs = 131;
1422 pinmodes[1].gpio.mode = 0;
1423 pinmodes[1].uart.sysfs = 131;
1424 pinmodes[1].uart.mode = 1;
1425 pinmodes[2].gpio.sysfs = 128;
1426 pinmodes[2].gpio.mode = 0;
1427 pinmodes[2].uart.sysfs = 128;
1428 pinmodes[2].uart.mode = 1;
1429 pinmodes[3].gpio.sysfs = 12;
1430 pinmodes[3].gpio.mode = 0;
1431 pinmodes[3].pwm.sysfs = 12;
1432 pinmodes[3].pwm.mode = 1;
1434 pinmodes[4].gpio.sysfs = 129;
1435 pinmodes[4].gpio.mode = 0;
1436 pinmodes[4].uart.sysfs = 129;
1437 pinmodes[4].uart.mode = 1;
1438 pinmodes[5].gpio.sysfs = 13;
1439 pinmodes[5].gpio.mode = 0;
1440 pinmodes[5].pwm.sysfs = 13;
1441 pinmodes[5].pwm.mode = 1;
1442 pinmodes[6].gpio.sysfs = 182;
1443 pinmodes[6].gpio.mode = 0;
1444 pinmodes[6].pwm.sysfs = 182;
1445 pinmodes[6].pwm.mode = 1;
1447 // 7 and 8 are provided by something on i2c, very simplepinmodes[3].gpio.sysfs = 12;
1448 pinmodes[9].gpio.sysfs = 183;
1449 pinmodes[9].gpio.mode = 0;
1450 pinmodes[9].pwm.sysfs = 183;
1451 pinmodes[9].pwm.mode = 1;
1453 pinmodes[10].gpio.sysfs = 41;
1454 pinmodes[10].gpio.mode = 0;
1455 pinmodes[10].spi.sysfs = 111; // Different pin provides, switched at mux level.
1456 pinmodes[10].spi.mode = 1;
1458 pinmodes[11].gpio.sysfs = 43;
1459 pinmodes[11].gpio.mode = 0;
1460 pinmodes[11].spi.sysfs = 115; // Different pin provides, switched at mux level.
1461 pinmodes[11].spi.mode = 1;
1463 pinmodes[12].gpio.sysfs = 42;
1464 pinmodes[12].gpio.mode = 0;
1465 pinmodes[12].spi.sysfs = 114; // Different pin provides, switched at mux level.
1466 pinmodes[12].spi.mode = 1;
1468 pinmodes[13].gpio.sysfs = 40;
1469 pinmodes[13].gpio.mode = 0;
1470 pinmodes[13].spi.sysfs = 109; // Different pin provides, switched at mux level.
1471 pinmodes[13].spi.mode = 1;
1472 // Everything else but A4 A5 LEAVE
1473 pinmodes[18].gpio.sysfs = 14;
1474 pinmodes[18].gpio.mode = 0;
1475 pinmodes[18].i2c.sysfs = 28;
1476 pinmodes[18].i2c.mode = 1;
1478 pinmodes[19].gpio.sysfs = 165;
1479 pinmodes[19].gpio.mode = 0;
1480 pinmodes[19].i2c.sysfs = 27;
1481 pinmodes[19].i2c.mode = 1;
1485 syslog(LOG_CRIT, "edison: Arduino board failed to initialise");